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Change subject: vc/google/chromeos: Add configurable compression for logo file in cbfs
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83420/comment/a72383cf_666ed038?us… :
PS5, Line 15: ~760ms
> This is too big of savings - almost 1 second. Definitely LZMA decompression or loading an uncompressed file does not take that long. Can you please confirm?
seriously 760ms ?
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Change subject: device/pci_ids: Add new Intel PTL device IDs for eSPI/LPC
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Patch Set 1:
(1 comment)
File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/83506/comment/41584a2d_fea6ebc2?us… :
PS1, Line 3180: #define PCI_DID_INTEL_PTL_H_ESPI_9 0xe409
> What I described in https://review.coreboot.org/c/coreboot/+/83506/comment/ef041abf_b118bd01/ would avoid the problem as well
I have shared some thoughts there as well why we eventually need to describe all support PCH IDs
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Change subject: device/pci_ids: Add new Intel PTL device IDs for eSPI/LPC
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Patch Set 1:
(1 comment)
File src/soc/intel/common/block/lpc/lpc.c:
https://review.coreboot.org/c/coreboot/+/83506/comment/547ed64d_88d29f12?us… :
PS1, Line 143: static const unsigned short pci_device_ids[] = {
> For another patch: bind the LPC/eSPI ops through the chipset devicetree instead of having such a long list of IDs. See CB:79167 for an example. Yes, this can also be done for other devices.
I guess there are two parts of it, what you have suggested can solve the binding problem for PCI driver but how about report_platform.c where we parse all PCH DIDs to know if this is known/support ID. Ultimately we have to maintain a long list there as well.
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Change subject: mb/google/brya/var/xol: Change touchpad I2C interrupt type to GPIO_INT
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Patch Set 3: Code-Review+1
This change is ready for review.
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Change subject: util/liveiso/nixos: Install various extractor tools
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Patch Set 1: Code-Review+2
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Change subject: tgl,adl,rpl mainboards: Drop superfluous cpu_cluster device
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Patch Set 2: Code-Review+2
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Change subject: soc/intel/tigerlake: Add cpu_cluster device to PCH-H devicetree
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Patch Set 1: Code-Review+2
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Change subject: tgl,adl,rpl mainboards: Drop superfluous cpu_cluster device
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Patch Set 2:
(1 comment)
File src/mainboard/system76/tgl-h/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/83523/comment/3817c243_056d9d27?us… :
PS1, Line 80: device cpu_cluster 0 on end
> `cpu_cluster` is missing from `soc/intel/tigerlake/chipset_pch_h.cb`.
Thanks! CB:83536
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Change subject: soc/intel/tigerlake: Add cpu_cluster device to PCH-H devicetree
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soc/intel/tigerlake: Add cpu_cluster device to PCH-H devicetree
Change-Id: I30a98ae4989edc97d56d2b538930b3c67565d9dc
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/soc/intel/tigerlake/chipset_pch_h.cb
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/83536/1
diff --git a/src/soc/intel/tigerlake/chipset_pch_h.cb b/src/soc/intel/tigerlake/chipset_pch_h.cb
index b0eabe9..40f613f 100644
--- a/src/soc/intel/tigerlake/chipset_pch_h.cb
+++ b/src/soc/intel/tigerlake/chipset_pch_h.cb
@@ -1,4 +1,5 @@
chip soc/intel/tigerlake
+ device cpu_cluster 0 on end
device domain 0 on
device gpio 0 alias pch_gpio on end
device pci 00.0 alias system_agent on end
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