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Maciej Pijanowski has posted comments on this change by Maciej Pijanowski. ( https://review.coreboot.org/c/coreboot/+/80609?usp=email )
Change subject: mb/lenovo: Add ThinkCentre M920q (Coffee Lake)
......................................................................
Patch Set 12:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80609/comment/3194a8e7_9fe01258?us… :
PS10, Line 26: - PCIe x8 port
> Tested by `dnssound.` on the coreboot Discord using a `BA7H70 Rev 1. […]
Thanks for this testing effort. Added some note on this in documentation.
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Attention is currently required from: Alexander Couzens, Angel Pons, Felix Singer, Michał Kopeć, Paul Menzel.
Hello Alexander Couzens, Angel Pons, Felix Singer, Michał Kopeć, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80609?usp=email
to look at the new patch set (#13).
Change subject: mb/lenovo: Add ThinkCentre M920q (Coffee Lake)
......................................................................
mb/lenovo: Add ThinkCentre M920q (Coffee Lake)
It may come with 8th or 9th Gen CPUs. i5-8500T has been tested here.
Works:
- Serial adapter from daughter board (COM1 connector)
- USB ports front and back
- USB-C port (charging, data)
- HDMI
- Ethernet
- SATA
- NVMe
- internal speaker
- TPM2.0
- PCIe x8 port (x8 riser tested, x4 not)
Does not work:
- front audio jacks
Change-Id: Iea1dc5745c0ecf687fa18b793f0aab4b0855d6d4
Signed-off-by: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com>
---
M Documentation/mainboard/index.md
A Documentation/mainboard/lenovo/m920q.md
A src/mainboard/lenovo/m920q/Kconfig
A src/mainboard/lenovo/m920q/Kconfig.name
A src/mainboard/lenovo/m920q/Makefile.mk
A src/mainboard/lenovo/m920q/acpi/ec.asl
A src/mainboard/lenovo/m920q/acpi/mainboard.asl
A src/mainboard/lenovo/m920q/acpi/superio.asl
A src/mainboard/lenovo/m920q/board_info.txt
A src/mainboard/lenovo/m920q/bootblock.c
A src/mainboard/lenovo/m920q/cmos.default
A src/mainboard/lenovo/m920q/cmos.layout
A src/mainboard/lenovo/m920q/data.vbt
A src/mainboard/lenovo/m920q/devicetree.cb
A src/mainboard/lenovo/m920q/dsdt.asl
A src/mainboard/lenovo/m920q/gma-mainboard.ads
A src/mainboard/lenovo/m920q/gpio.c
A src/mainboard/lenovo/m920q/hda_verb.c
A src/mainboard/lenovo/m920q/include/mainboard/gpio.h
A src/mainboard/lenovo/m920q/ramstage.c
A src/mainboard/lenovo/m920q/romstage.c
21 files changed, 841 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/80609/13
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Change subject: mb/lenovo: Add ThinkCentre M920q (Coffee Lake)
......................................................................
Patch Set 12:
(8 comments)
Patchset:
PS12:
Marked the obvious documentation threads as Resolved.
File Documentation/mainboard/lenovo/m920q.md:
https://review.coreboot.org/c/coreboot/+/80609/comment/7cbc41c9_fedf3171?us… :
PS10, Line 1: # Dell OptiPlex 9010
> Sorry, working late sometimes does this kind of stuff. Fixed.
Done
https://review.coreboot.org/c/coreboot/+/80609/comment/99430fa2_a1545a95?us… :
PS10, Line 9: 8nd Gen or 9rd Gen
> Oof, copy-pasta error? ("2***nd*** Gen or 3***rd*** Gen) […]
Done
https://review.coreboot.org/c/coreboot/+/80609/comment/bcaef8aa_54790cd2?us… :
PS10, Line 11: DIMM
> ```suggestion […]
Done
https://review.coreboot.org/c/coreboot/+/80609/comment/c12614ef_4ee78fd8?us… :
PS10, Line 45: yes?
> I feel this could confuse people into believing that installing coreboot via the internal programmer […]
Done
https://review.coreboot.org/c/coreboot/+/80609/comment/8f40d7ea_ca165351?us… :
PS10, Line 53: flashrom -p internal -w coreboot.rom --ifd -i bios
> I thought one needs `--noverify-all` too?
Done
https://review.coreboot.org/c/coreboot/+/80609/comment/0f7142c9_6412e3fa?us… :
PS10, Line 55: will
> Huh? Will... […]
Done
https://review.coreboot.org/c/coreboot/+/80609/comment/0e8c6ad7_9bca6a11?us… :
PS10, Line 71: BIOS1 and BIOS1
> I hope they're not marked the same 😄 […]
Done
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Change subject: mb/lenovo: Add ThinkCentre M920q (Coffee Lake)
......................................................................
Patch Set 10:
(2 comments)
Patchset:
PS10:
Fixed documentation problems, thanks for reviewing it
File Documentation/mainboard/lenovo/m920q.md:
https://review.coreboot.org/c/coreboot/+/80609/comment/4457ac9b_063c71c9?us… :
PS10, Line 1: # Dell OptiPlex 9010
> Ahem. […]
Sorry, working late sometimes does this kind of stuff. Fixed.
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Hello Alexander Couzens, Angel Pons, Felix Singer, Michał Kopeć, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80609?usp=email
to look at the new patch set (#12).
Change subject: mb/lenovo: Add ThinkCentre M920q (Coffee Lake)
......................................................................
mb/lenovo: Add ThinkCentre M920q (Coffee Lake)
It may come with 8th or 9th Gen CPUs. i5-8500T has been tested here.
Works:
- Serial adapter from daughter board (COM1 connector)
- USB ports front and back
- USB-C port (charging, data)
- HDMI
- Ethernet
- SATA
- NVMe
- internal speaker
- TPM2.0
Does not work:
- front audio jacks
Not tested:
- PCIe x8 port
Change-Id: Iea1dc5745c0ecf687fa18b793f0aab4b0855d6d4
Signed-off-by: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com>
---
M Documentation/mainboard/index.md
A Documentation/mainboard/lenovo/m920q.md
A src/mainboard/lenovo/m920q/Kconfig
A src/mainboard/lenovo/m920q/Kconfig.name
A src/mainboard/lenovo/m920q/Makefile.mk
A src/mainboard/lenovo/m920q/acpi/ec.asl
A src/mainboard/lenovo/m920q/acpi/mainboard.asl
A src/mainboard/lenovo/m920q/acpi/superio.asl
A src/mainboard/lenovo/m920q/board_info.txt
A src/mainboard/lenovo/m920q/bootblock.c
A src/mainboard/lenovo/m920q/cmos.default
A src/mainboard/lenovo/m920q/cmos.layout
A src/mainboard/lenovo/m920q/data.vbt
A src/mainboard/lenovo/m920q/devicetree.cb
A src/mainboard/lenovo/m920q/dsdt.asl
A src/mainboard/lenovo/m920q/gma-mainboard.ads
A src/mainboard/lenovo/m920q/gpio.c
A src/mainboard/lenovo/m920q/hda_verb.c
A src/mainboard/lenovo/m920q/include/mainboard/gpio.h
A src/mainboard/lenovo/m920q/ramstage.c
A src/mainboard/lenovo/m920q/romstage.c
21 files changed, 843 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/80609/12
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Change subject: mb/lenovo: Add ThinkCentre M920q (Coffee Lake)
......................................................................
mb/lenovo: Add ThinkCentre M920q (Coffee Lake)
It may come with 8th or 9th Gen CPUs. i5-8500T has been tested here.
Works:
- Serial adapter from daughter board (COM1 connector)
- USB ports front and back
- USB-C port (charging, data)
- HDMI
- Ethernet
- SATA
- NVMe
- internal speaker
- TPM2.0
Does not work:
- front audio jacks
Not tested:
- PCIe x8 port
Change-Id: Iea1dc5745c0ecf687fa18b793f0aab4b0855d6d4
Signed-off-by: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com>
---
M Documentation/mainboard/index.md
A Documentation/mainboard/lenovo/m920q.md
A src/mainboard/lenovo/m920q/Kconfig
A src/mainboard/lenovo/m920q/Kconfig.name
A src/mainboard/lenovo/m920q/Makefile.mk
A src/mainboard/lenovo/m920q/acpi/ec.asl
A src/mainboard/lenovo/m920q/acpi/mainboard.asl
A src/mainboard/lenovo/m920q/acpi/superio.asl
A src/mainboard/lenovo/m920q/board_info.txt
A src/mainboard/lenovo/m920q/bootblock.c
A src/mainboard/lenovo/m920q/cmos.default
A src/mainboard/lenovo/m920q/cmos.layout
A src/mainboard/lenovo/m920q/data.vbt
A src/mainboard/lenovo/m920q/devicetree.cb
A src/mainboard/lenovo/m920q/dsdt.asl
A src/mainboard/lenovo/m920q/gma-mainboard.ads
A src/mainboard/lenovo/m920q/gpio.c
A src/mainboard/lenovo/m920q/hda_verb.c
A src/mainboard/lenovo/m920q/include/mainboard/gpio.h
A src/mainboard/lenovo/m920q/ramstage.c
A src/mainboard/lenovo/m920q/romstage.c
21 files changed, 843 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/80609/11
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Change subject: src/lib: Add Kconfig variable for fw_config default value
......................................................................
Patch Set 2:
(1 comment)
File src/Kconfig:
https://review.coreboot.org/c/coreboot/+/83153/comment/33f7633d_b7c821e7?us… :
PS2, Line 548: 0x00000
unable to follow the motivation.
if CBI is not provision that is as good as `don't select CBI Kconfig` for your mainboard. Ideally CBI value should be in sync with config.star hence, what is the point of overriding with something that doesn't make any sense.
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Change subject: mb/google/brox/var/lotso: GPP_B14 used for buzzer
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mainboard/google/brox: Add FW_CONFIG and SKU definitions to support lotso
......................................................................
Patch Set 3:
(2 comments)
File src/mainboard/google/brox/variants/brox/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/82630/comment/aee13149_9d09a0c8?us… :
PS3, Line 19: option AUDIO_REALTEK_ALC3287 2
> I believe this was included to simply keep the the bit fields aligned between the brox reference des […]
Yeah, as Shelley pointed out each variant can have its own FW_CONFIG and hence no need to align them.
File src/mainboard/google/brox/variants/lotso/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/82630/comment/b7542be1_83a7b229?us… :
PS1, Line 31: hip soc/intel/alderlake
:
: device domain 0 on
: end
:
: end
> Should this be removed?
Your CL has a merge conflict. Probably you need to rebase on top of the coreboot tree. Also the update you are trying to do has already been done here by the ODM team - https://review.coreboot.org/c/coreboot/+/83051
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Gerrit-MessageType: comment
Gerrit-Project: coreboot
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Gerrit-Change-Id: I52cf42b79eff91ab2b4e98a7b5961310e60f2ea7
Gerrit-Change-Number: 82630
Gerrit-PatchSet: 3
Gerrit-Owner: Bob Moragues <moragues(a)chromium.org>
Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Reviewer: Shelley Chen <shchen(a)google.com>
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83186?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: util/autoport: Remove extra blank lines from generated files
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util/autoport: Remove extra blank lines from generated files
The generated dsdt.asl and early_init.c files contained 2 consecutive
blank lines, so remove one of them.
Change-Id: Iad74098518320c5389cb86badb8737e81dd656ae
Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83186
Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M util/autoport/bd82x6x.go
M util/autoport/main.go
2 files changed, 1 insertion(+), 3 deletions(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go
index 8ad0c17..d31cd6b 100644
--- a/util/autoport/bd82x6x.go
+++ b/util/autoport/bd82x6x.go
@@ -294,7 +294,6 @@
sb.WriteString(`#include <bootblock_common.h>
#include <device/pci_ops.h>
#include <southbridge/intel/bd82x6x/pch.h>
-
`)
usbPortConfig := "{\n"
diff --git a/util/autoport/main.go b/util/autoport/main.go
index 6426dd3..99099d5 100644
--- a/util/autoport/main.go
+++ b/util/autoport/main.go
@@ -837,8 +837,7 @@
Add_gpl(dsdt)
dsdt.WriteString(
- `
-#include <acpi/acpi.h>
+`#include <acpi/acpi.h>
DefinitionBlock(
"dsdt.aml",
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Iad74098518320c5389cb86badb8737e81dd656ae
Gerrit-Change-Number: 83186
Gerrit-PatchSet: 3
Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>