coreboot-gerrit June 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: doc/getting_started: Update embedded-table examples
by Nicholas Chin (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Nico Huber. Nicholas Chin has posted comments on this change by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/81503?usp=email ) Change subject: doc/getting_started: Update embedded-table examples ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: Hmm, seems like commit 37c8c85b3066 (documentation: Fix evaluation of reStructuredText) also made the same changes as this patch, so I guess this can be abandoned. -- To view, visit https://review.coreboot.org/c/coreboot/+/81503?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1b0d0b029fd527e0e18c71371806cd248ea0ecdf Gerrit-Change-Number: 81503 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Tue, 25 Jun 2024 01:21:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: util/autoport: Extend Add_gpl to more files
by Nicholas Chin (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Angel Pons. Nicholas Chin has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/83184?usp=email ) Change subject: util/autoport: Extend Add_gpl to more files ...................................................................... Patch Set 2: (1 comment) File util/autoport/main.go: https://review.coreboot.org/c/coreboot/+/83184/comment/04c00771_a46069ab?us… : PS2, Line 882: gma.WriteString(`-- SPDX-License-Identifier: GPL-2.0-or-later > This has been changed to generate `GPL-2.0-only` instead. […] I made a note about it in the commit message. I don't feel strongly either way so if anyone objects to changing the one in the generated file I can change it back. -- To view, visit https://review.coreboot.org/c/coreboot/+/83184?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I24a1ccd0afb7045e878bf6eaae7a23f828a9240d Gerrit-Change-Number: 83184 Gerrit-PatchSet: 2 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 00:55:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[M] Change in coreboot[main]: util/autoport: Extend Add_gpl to more files
by Nicholas Chin (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Nicholas Chin. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83184?usp=email to look at the new patch set (#3). Change subject: util/autoport: Extend Add_gpl to more files ...................................................................... util/autoport: Extend Add_gpl to more files Previously, Add_gpl() was only used with C and ASL source code files, and was hard coded to use the C /* */ style comment. Add a new argument to specify a filetype, which is used to look up a format string with the appropriate comment style. This allows the hard coded gma-mainboard.c SPDX header to be replaced with a call to Add_gpl(), as the original function would not be able to generate -- style Ada comments. Note that this does change the original hard coded GPL-2.0-or-later header to GPL-2.0-only as a result of using Add_gpl(). An SPDX header is also added to Kconfig and Makefile sources; as previous commits added them to all such files in the tree. Change-Id: I24a1ccd0afb7045e878bf6eaae7a23f828a9240d Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- M util/autoport/azalia.go M util/autoport/bd82x6x.go M util/autoport/ec_fixme.go M util/autoport/ec_lenovo.go M util/autoport/ec_none.go M util/autoport/main.go 6 files changed, 42 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/83184/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/83184?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I24a1ccd0afb7045e878bf6eaae7a23f828a9240d Gerrit-Change-Number: 83184 Gerrit-PatchSet: 3 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com>

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[M] Change in coreboot[main]: acpi: Add support for DHRD size reporting
by Shuo Liu (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, Cliff Huang, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jeff Daly, Jincheng Li, Johnny Lin, Jonathan Zhang, Kapil Porwal, Lance Zhao, Lean Sheng Tan, Nick Vaccaro, Nico Huber, Patrick Rudolph, Paul Menzel, Sean Rhodes, Subrata Banik, Tarun, Tim Chu, Tim Wawrzynczak, Vanessa Eusebio, Werner Zeh. Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82429?usp=email ) Change subject: acpi: Add support for DHRD size reporting ...................................................................... Patch Set 15: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/82429/comment/adbd8c1b_7ea04d87?us… : PS15, Line 11: the register set is 2^N 4 KB pages. > If the value of N is zero, what happens? I didn't find an answer in the VT-d spec (`D51397-016`). When N is zero, the size would be 2^0 4KB pages, a.k.a. 1 * 4KB page, which is as the case of the previous spec not specifying the size and 4KB page is used by default. File src/acpi/acpi_dmar.c: https://review.coreboot.org/c/coreboot/+/82429/comment/a6f51724_87e13469?us… : PS15, Line 50: drhd->bar = bar; > VT-d spec (`D51397-016`) says: […] Good catch, we need an assert here. https://review.coreboot.org/c/coreboot/+/82429/comment/5c5d9fb1_6a556533?us… : PS15, Line 51: drhd->size = log2(size) - 12; : /* : * Refer to chapter 8.3 of https://cdrdv2.intel.com/v1/dl/getContent/671081 : * only bit 3:0 are allowed to be used : */ : assert(!(drhd->size >> 4)); > Although this check is correct, I find it rather convoluted. How about: […] Fix applied. -- To view, visit https://review.coreboot.org/c/coreboot/+/82429?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I49dd5de2eca257a5f6240e36d05755cabca96d1c Gerrit-Change-Number: 82429 Gerrit-PatchSet: 15 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 00:47:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[L] Change in coreboot[main]: mb/google/fatcat: Add minimal code support for fatcat
by Nick Vaccaro (Code Review) 24 Jun '24

24 Jun '24

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[L] Change in coreboot[main]: mb/google/fatcat: Add minimal code support for fatcat
by Nick Vaccaro (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Subrata Banik. Nick Vaccaro has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/83197?usp=email ) Change subject: mb/google/fatcat: Add minimal code support for fatcat ...................................................................... Patch Set 3: (12 comments) File src/mainboard/google/fatcat/Kconfig: https://review.coreboot.org/c/coreboot/+/83197/comment/6c8fd3f3_7c85ffe3?us… : PS3, Line 52: select GBB_FLAG_FORCE_DEV_BOOT_USB NIT - Given these are alphabetical, this should be moved up 1 line https://review.coreboot.org/c/coreboot/+/83197/comment/f2dad971_b39f61b0?us… : PS3, Line 94: DRIVER_TPM_I2C_ADDR NIT - should this be above DRIVER_TPM_I2C_BUS to be in alphabetical order, or should it stay here given one thinks of I2C bus first, then the address on that bus? I'm fine if this stays like it is if the deviation from alphabetising was on purpose due to what I just noted. File src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb: https://review.coreboot.org/c/coreboot/+/83197/comment/9c992354_b9ee78e6?us… : PS3, Line 1: meteorlake Just to confirm, this is for SOC N-1, yes? File src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/ec.h: https://review.coreboot.org/c/coreboot/+/83197/comment/dcedf294_b0345b1a?us… : PS3, Line 8: #include <baseboard/gpio.h> NIT - alphabetically, this should be first https://review.coreboot.org/c/coreboot/+/83197/comment/207f8d7a_acbd3235?us… : PS3, Line 11: (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_MKBP) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX)) NIT - should these be alphabetized? https://review.coreboot.org/c/coreboot/+/83197/comment/2b93cfe2_bef66014?us… : PS3, Line 47: EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN)) : NIT - alphabetize? https://review.coreboot.org/c/coreboot/+/83197/comment/b13b2925_b19a8520?us… : PS3, Line 51: EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_HANG_DETECT)) NIT - alphabetize? https://review.coreboot.org/c/coreboot/+/83197/comment/f420cdf6_3bfd49b0?us… : PS3, Line 55: (EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN) |\ : EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC)) NIT - alphabetize? https://review.coreboot.org/c/coreboot/+/83197/comment/2290c438_152e1cc7?us… : PS3, Line 68: #define EC_ENABLE_LID_SWITCH : #define EC_ENABLE_WAKE_PIN GPE_EC_WAKE : /* Enable EC backed PD MCU device in ACPI */ : #define EC_ENABLE_PD_MCU_DEVICE : #define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */ : #define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ : #define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */ : : #define EC_ENABLE_SYNC_IRQ /* Enable tight timestamp / wake support */ : #define EC_SYNC_IRQ_WAKE_CAPABLE /* Let the OS know ec_sync is wake capable */ NIT - alphabetize? File src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/gpio.h: https://review.coreboot.org/c/coreboot/+/83197/comment/f320bd62_91831845?us… : PS3, Line 11: #define GPIO_PCH_WP 0 : /* GPIO IRQ for tight timestamps / wake support */ : #define EC_SYNC_IRQ 0 : /* eSPI virtual wire reporting */ : #define EC_SCI_GPI 0 : NIT - alphabetize? File src/mainboard/google/fatcat/variants/baseboard/fatcat/memory.c: https://review.coreboot.org/c/coreboot/+/83197/comment/631031c6_8973b48d?us… : PS3, Line 22: variant_is_half_populated(void) : { Does PTL have two channels? My understanding is that WCL will only have 1, in which case I wouldn't think this would be needed, but not sure about PTL. File src/mainboard/google/fatcat/variants/fatcat/gpio.c: https://review.coreboot.org/c/coreboot/+/83197/comment/7c0250fe_deef9ebb?us… : PS3, Line 12: #include <soc/gpio.h> NIT - alphabetize -- To view, visit https://review.coreboot.org/c/coreboot/+/83197?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iad78aec51b2f0f240991c9c35842764a60be988e Gerrit-Change-Number: 83197 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Mon, 24 Jun 2024 22:12:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/google/brox: Disable Touchscreen for hardware board version 1
by Karthik Ramasubramanian (Code Review) 24 Jun '24

24 Jun '24

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83199?usp=email ) Change subject: mb/google/brox: Disable Touchscreen for hardware board version 1 ...................................................................... mb/google/brox: Disable Touchscreen for hardware board version 1 On board version 1 and later, touchscreen is not stuffed. Hence configure the relevant GPIOs as not connected, disable the concerned I2C bus in the devicetree as well as SoC chip config for board version 1. BUG=b:347333500 TEST=Build Brox BIOS image and boot to OS. Ensure that there are no peripherals detected in I2C 1 bus through i2cdetect tool. Ensure that no touchscreen devices are exported through ACPI SSDT table. Ensure that other I2C peripherals - eg. Trackpad and Ti50 are functional. Ensure that the device is able to suspend and resume for 25 cycles. Change-Id: Ia0578b90b0e8158ae28bcc51add637844ba6acf6 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/brox/variants/brox/gpio.c M src/mainboard/google/brox/variants/brox/ramstage.c M src/mainboard/google/brox/variants/brox/variant.c 3 files changed, 40 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/83199/1 diff --git a/src/mainboard/google/brox/variants/brox/gpio.c b/src/mainboard/google/brox/variants/brox/gpio.c index 5af3552..3f6767e 100644 --- a/src/mainboard/google/brox/variants/brox/gpio.c +++ b/src/mainboard/google/brox/variants/brox/gpio.c @@ -1,11 +1,34 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <baseboard/gpio.h> #include <baseboard/variants.h> #include <boardid.h> #include <soc/gpio.h> +/* Pad configuration in ramstage */ +static const struct pad_config override_gpio_table[] = { + /* GPP_F7 : [NF6: USB_C_GPP_F7] ==> NC */ + PAD_NC(GPP_F7, NONE), + /* GPP_F16 : [NF1: GSXCLK NF3: THC1_SPI2_CS# NF4: GSPI1_CS0# NF6: USB_C_GPP_F16] ==> NC */ + PAD_NC(GPP_F16, NONE), + /* GPP_F17 : [NF3: THC1_SPI2_RST# NF6: USB_C_GPP_F17] ==> NC */ + PAD_NC(GPP_F17, NONE), + /* GPP_F18 : [NF3: THC1_SPI2_INT# NF6: USB_C_GPP_F18] ==> NC */ + PAD_NC(GPP_F18, NONE), + /* GPP_H6 : [NF1: I2C1_SDA NF6: USB_C_GPP_H6] ==> NC */ + PAD_NC(GPP_H6, NONE), + /* GPP_H7 : [NF1: I2C1_SCL NF6: USB_C_GPP_H7] ==> NC */ + PAD_NC(GPP_H7, NONE), +}; + const struct pad_config *variant_gpio_override_table(size_t *num) { + uint32_t board_version = board_id(); + *num = 0; + if (board_version >= 1) { + *num = ARRAY_SIZE(override_gpio_table); + return override_gpio_table; + } return NULL; } diff --git a/src/mainboard/google/brox/variants/brox/ramstage.c b/src/mainboard/google/brox/variants/brox/ramstage.c index 86418da..c81dd7e 100644 --- a/src/mainboard/google/brox/variants/brox/ramstage.c +++ b/src/mainboard/google/brox/variants/brox/ramstage.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <baseboard/variants.h> +#include <boardid.h> #include <device/pci_ids.h> #include <ec/google/chromeec/ec.h> #include <intelblocks/power_limit.h> @@ -44,6 +45,7 @@ void __weak variant_devtree_update(void) { + uint32_t board_version = board_id(); printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); const struct cpu_power_limits *limits = performance_efficient_limits; @@ -51,4 +53,12 @@ variant_update_power_limits(limits, limits_size); variant_update_psys_power_limits(limits, sys_limits, limits_size, &psys_config); + + /* Disable I2C bus device for Touchscreen */ + if (board_version >= 1) { + struct device *i2c1_dev = DEV_PTR(i2c1); + + if (i2c1_dev) + i2c1_dev->enabled = false; + } } diff --git a/src/mainboard/google/brox/variants/brox/variant.c b/src/mainboard/google/brox/variants/brox/variant.c index e085a86..332d152 100644 --- a/src/mainboard/google/brox/variants/brox/variant.c +++ b/src/mainboard/google/brox/variants/brox/variant.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <assert.h> +#include <boardid.h> #include <baseboard/variants.h> #include <chip.h> #include <fw_config.h> @@ -8,10 +9,16 @@ void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) { + uint32_t board_version = board_id(); + if (fw_config_probe(FW_CONFIG(WIFI_BT, WIFI_BT_CNVI))) { printk(BIOS_INFO, "CNVi bluetooth enabled by fw_config\n"); config->cnvi_bt_core = true; } + + /* Disable I2C bus device for Touchscreen for board version 1*/ + if (board_version >= 1) + config->serial_io_i2c_mode[PchSerialIoIndexI2C1] = PchSerialIoDisabled; } const char *get_wifi_sar_cbfs_filename(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/83199?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia0578b90b0e8158ae28bcc51add637844ba6acf6 Gerrit-Change-Number: 83199 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com>

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[L] Change in coreboot[main]: mb/lenovo: Add ThinkCentre M920q (Coffee Lake)
by Angel Pons (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Alexander Couzens, Felix Singer, Maciej Pijanowski, Michał Kopeć, Paul Menzel. Angel Pons has posted comments on this change by Maciej Pijanowski. ( https://review.coreboot.org/c/coreboot/+/80609?usp=email ) Change subject: mb/lenovo: Add ThinkCentre M920q (Coffee Lake) ...................................................................... Patch Set 13: Code-Review+1 (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/80609/comment/e76786c6_70958358?us… : PS10, Line 26: - PCIe x8 port > Thanks for this testing effort. Added some note on this in documentation. Looks good File Documentation/mainboard/lenovo/m920q.md: https://review.coreboot.org/c/coreboot/+/80609/comment/0dc6d083_b464a0c6?us… : PS10, Line 85: - PCIe x8 port > This port works, but see comments about riser problems. Done File src/mainboard/lenovo/m920q/gpio.c: PS13: To address Felix's comments, I would just remove all occurrences of `\t/* GPIO */`. Yes, it would remove a few more comments, but they're not that useful anyway (one can see something is used as a GPIO from the pad macro) File src/mainboard/lenovo/m920q/hda_verb.c: https://review.coreboot.org/c/coreboot/+/80609/comment/ca02c410_a8de2d14?us… : PS10, Line 12: 0x411111f0 > ```suggestion […] FWIW, these changes are as per CB:82394 and should be reproducible. -- To view, visit https://review.coreboot.org/c/coreboot/+/80609?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea1dc5745c0ecf687fa18b793f0aab4b0855d6d4 Gerrit-Change-Number: 80609 Gerrit-PatchSet: 13 Gerrit-Owner: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Comment-Date: Mon, 24 Jun 2024 21:56:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[M] Change in coreboot[main]: mb: source site-local mainboard Kconfig.name and Kconfig files
by Matt DeVillier (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Alexander Couzens, Evgeny Zinoviev, Felix Held, Felix Singer, Jeremy Soller, Jonathon Hall, Martin L Roth, Matt DeVillier, Michael Niewöhner, Michał Żygowski, Philipp Hug, Piotr Król, Ron Minnich, Sean Rhodes, Tim Crawford. Matt DeVillier has posted comments on this change by Martin L Roth. ( https://review.coreboot.org/c/coreboot/+/83119?usp=email ) Change subject: mb: source site-local mainboard Kconfig.name and Kconfig files ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/83119?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4106fea7197c979e6648ebbbbaa107070c916727 Gerrit-Change-Number: 83119 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 24 Jun 2024 21:38:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: Makefiles: Add site_local-target to run early in the build
by Matt DeVillier (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Martin L Roth. Matt DeVillier has posted comments on this change by Martin L Roth. ( https://review.coreboot.org/c/coreboot/+/83198?usp=email ) Change subject: Makefiles: Add site_local-target to run early in the build ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/83198?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I01f98c9cf8375bca21ab87f9becf66a25402c758 Gerrit-Change-Number: 83198 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Mon, 24 Jun 2024 21:38:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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