coreboot-gerrit June 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: lotso: Add generic property list
by Karthik Ramasubramanian (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Jian Tong, Kun Liu, Paul Menzel, Shelley Chen, Subrata Banik. Karthik Ramasubramanian has posted comments on this change by Kun Liu. ( https://review.coreboot.org/c/coreboot/+/83139?usp=email ) Change subject: lotso: Add generic property list ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83139?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8b18e0a2925e6fd36e3a470bde9910661b7558b8 Gerrit-Change-Number: 83139 Gerrit-PatchSet: 5 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 03:13:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: lotso: Add generic property list
by Kun Liu (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Jian Tong, Karthik Ramasubramanian, Paul Menzel, Shelley Chen, Subrata Banik. Hello Jian Tong, Karthik Ramasubramanian, Shelley Chen, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83139?usp=email to look at the new patch set (#5). Change subject: lotso: Add generic property list ...................................................................... lotso: Add generic property list Add generic property list BUG=b:342932183 BRANCH=None TEST=emerge-brox coreboot Change-Id: I8b18e0a2925e6fd36e3a470bde9910661b7558b8 Signed-off-by: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> --- M src/drivers/spi/acpi/acpi.c M src/drivers/spi/acpi/chip.h 2 files changed, 9 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/83139/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/83139?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8b18e0a2925e6fd36e3a470bde9910661b7558b8 Gerrit-Change-Number: 83139 Gerrit-PatchSet: 5 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

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[M] Change in coreboot[main]: acpi: Add support for DHRD size reporting
by Shuo Liu (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, Cliff Huang, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jeff Daly, Jincheng Li, Johnny Lin, Jonathan Zhang, Kapil Porwal, Lance Zhao, Lean Sheng Tan, Nick Vaccaro, Nico Huber, Patrick Rudolph, Paul Menzel, Sean Rhodes, Subrata Banik, Tarun, Tim Chu, Tim Wawrzynczak, Vanessa Eusebio, Werner Zeh. Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82429?usp=email ) Change subject: acpi: Add support for DHRD size reporting ...................................................................... Patch Set 15: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/82429/comment/c139148d_373fbf58?us… : PS15, Line 7: DHRD > typo: DRHD Done File src/include/acpi/acpi.h: https://review.coreboot.org/c/coreboot/+/82429/comment/aad287d1_41f52174?us… : PS15, Line 1852: unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags, : u16 segment, u64 bar, u32 size); > To avoid having to touch all platforms, would it make sense to have a specialised `acpi_create_dmar_ […] I made some attempts between using npages or size, and didn't get clear benefit of using npages because even using npages, we still need to do log() and we need to transform size to npages in the caller as well. Due to this reason I keep the size as of now. -- To view, visit https://review.coreboot.org/c/coreboot/+/82429?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I49dd5de2eca257a5f6240e36d05755cabca96d1c Gerrit-Change-Number: 82429 Gerrit-PatchSet: 15 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 02:57:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[S] Change in coreboot[main]: lotso: Add hid report address for gt7986u
by Kun Liu (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Jian Tong, Karthik Ramasubramanian, Paul Menzel, Shelley Chen, Subrata Banik. Kun Liu has posted comments on this change by Kun Liu. ( https://review.coreboot.org/c/coreboot/+/83139?usp=email ) Change subject: lotso: Add hid report address for gt7986u ...................................................................... Patch Set 4: (2 comments) File src/drivers/spi/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/83139/comment/487e4765_54b566e8?us… : PS3, Line 151: /* Add generic property list */ : acpi_dp_add_property_list(dsd, config->property_list, : config->property_count); > Nit: Please add one more tab to the indentation. Done File src/mainboard/google/brox/variants/lotso/overridetree.cb: https://review.coreboot.org/c/coreboot/+/83139/comment/b1f7af60_6410d715?us… : PS3, Line 374: register "property_count" = "1" : register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" : register "property_list[0].name" = ""goodix,hid-report-addr"" : register "property_list[0].integer" = "0x22c8c" > Keep this mainboard change in a separate CL. I will submit a separate CL -- To view, visit https://review.coreboot.org/c/coreboot/+/83139?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8b18e0a2925e6fd36e3a470bde9910661b7558b8 Gerrit-Change-Number: 83139 Gerrit-PatchSet: 4 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 02:56:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com>

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[S] Change in coreboot[main]: lotso: Add hid report address for gt7986u
by Kun Liu (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Jian Tong, Kun Liu, Paul Menzel, Shelley Chen, Subrata Banik. Hello Jian Tong, Karthik Ramasubramanian, Shelley Chen, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83139?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: lotso: Add hid report address for gt7986u ...................................................................... lotso: Add hid report address for gt7986u Add hid report address for gt7986u BUG=b:342932183 BRANCH=None TEST=Verify touchscreen work normal Change-Id: I8b18e0a2925e6fd36e3a470bde9910661b7558b8 Signed-off-by: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> --- M src/drivers/spi/acpi/acpi.c M src/drivers/spi/acpi/chip.h 2 files changed, 9 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/83139/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/83139?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8b18e0a2925e6fd36e3a470bde9910661b7558b8 Gerrit-Change-Number: 83139 Gerrit-PatchSet: 4 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Kun Liu <liukun11(a)huaqin.corp-partner.google.com>

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[XS] Change in coreboot[main]: mb/google/nissa/var/nivviks: Enable Bluetooth for PCIE
by Eric Lai (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Dinesh Gehlot, Nick Vaccaro, Poornima Tom, Poornima Tom, Subrata Banik, V Sowmya. Eric Lai has posted comments on this change by Poornima Tom. ( https://review.coreboot.org/c/coreboot/+/83076?usp=email ) Change subject: mb/google/nissa/var/nivviks: Enable Bluetooth for PCIE ...................................................................... Patch Set 8: (1 comment) File src/mainboard/google/brya/variants/nivviks/overridetree.cb: https://review.coreboot.org/c/coreboot/+/83076/comment/f6753c21_249f908a?us… : PS8, Line 665: probe WIFI_CATEGORY WIFI_7 > Hi Eric, […] Cool!! thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/83076?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I989cf6122f2555cc89f622e4ce5d21b574d0458e Gerrit-Change-Number: 83076 Gerrit-PatchSet: 8 Gerrit-Owner: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Poornima Tom <poornima.tom(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Poornima Tom <poornima.tom(a)intel.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 25 Jun 2024 02:42:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Poornima Tom <poornima.tom(a)intel.com> Comment-In-Reply-To: Eric Lai <ericllai(a)google.com>

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[S] Change in coreboot[main]: Kconfig: Update FW_CONFIG Kconfig options
by Elyes Haouas (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Julius Werner, Martin L Roth, Martin Roth, Nico Huber. Elyes Haouas has posted comments on this change by Martin L Roth. ( https://review.coreboot.org/c/coreboot/+/83118?usp=email ) Change subject: Kconfig: Update FW_CONFIG Kconfig options ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83118?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icf170dc2ef790d6f5a897a9c7c2ea64033bf1dc9 Gerrit-Change-Number: 83118 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Tue, 25 Jun 2024 02:34:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XL] Change in coreboot[main]: vc/intel/fsp/snr: Add FSP headers for Snow Ridge SoC
by Name of user not set (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Jérémy Compostella, Shuo Liu. Hello Jérémy Compostella, Shuo Liu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83192?usp=email to look at the new patch set (#2). Change subject: vc/intel/fsp/snr: Add FSP headers for Snow Ridge SoC ...................................................................... vc/intel/fsp/snr: Add FSP headers for Snow Ridge SoC Change-Id: I333b137c1dc08a3c06bdd3f7a78ca44a5dd043cc Signed-off-by: Yuchi Chen <yuchi.chen(a)intel.com> --- A src/vendorcode/intel/fsp/fsp2_0/snowridge/FspUpd.h A src/vendorcode/intel/fsp/fsp2_0/snowridge/FspmUpd.h A src/vendorcode/intel/fsp/fsp2_0/snowridge/FspsUpd.h A src/vendorcode/intel/fsp/fsp2_0/snowridge/FsptUpd.h 4 files changed, 1,391 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/83192/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83192?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I333b137c1dc08a3c06bdd3f7a78ca44a5dd043cc Gerrit-Change-Number: 83192 Gerrit-PatchSet: 2 Gerrit-Owner: yuchi.chen(a)intel.com Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com>

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[M] Change in coreboot[main]: drivers/wifi: Support Bluetooth Regulator Domain Settings
by Jérémy Compostella (Code Review) 24 Jun '24

24 Jun '24

Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83200?usp=email ) Change subject: drivers/wifi: Support Bluetooth Regulator Domain Settings ...................................................................... drivers/wifi: Support Bluetooth Regulator Domain Settings The 'Bluetooth Increased Power Mode - SAR Limitation' feature provides ability to utilize increased device Transmit power capability for Bluetooth applications in coordination with Wi-Fi adhering to product SAR limit when Bluetooth and Wi-Fi run together. This feature is required for Meteor Lake rex karis variant. The implementation follow document 559910 Intel Connectivity Platforms BIOS Guideline revision 8.3 specification. BUG=b:348345301 TEST=BRDS method is added to the CNVW device and return the data supplied by the SAR binary blob Change-Id: Iebe95815c944d045f4cf686abcd1874a8a45e209 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/drivers/wifi/generic/acpi.c M src/include/sar.h M src/vendorcode/google/chromeos/sar.c 3 files changed, 76 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/83200/1 diff --git a/src/drivers/wifi/generic/acpi.c b/src/drivers/wifi/generic/acpi.c index 2d08b87..5eb7a3e 100644 --- a/src/drivers/wifi/generic/acpi.c +++ b/src/drivers/wifi/generic/acpi.c @@ -15,8 +15,9 @@ #include "wifi.h" #include "wifi_private.h" -/* WIFI Domain type */ +/* Domain type */ #define DOMAIN_TYPE_WIFI 0x7 +#define DOMAIN_TYPE_BLUETOOTH 0x12 /* Maximum number DSM UUID bifurcations in _DSM */ #define MAX_DSM_FUNCS 2 @@ -489,6 +490,55 @@ acpigen_write_package_end(); } +static void sar_emit_brds(const struct bsar_profile *bsar) +{ + int i; + size_t package_size, table_size; + const uint8_t *set; + + if (bsar == NULL) + return; + + /* + * Name ("BRDS", Package () { + * Revision, + * Package () { + * Domain Type, // 0x12:Bluetooth + * Bluetooth SAR BIOS, // BIOS SAR Enable/disable + * Bluetooth Increase Power Mode // SAR Limitation Enable/disable + * Bluetooth SAR Power Restriction, // 00000000 - 0dBm + * // 11111111 - 31.875dBm + * // (Step 0.125dBm) + * Bluetooth SAR Table // SAR Tx power limit table + * } + * }) + */ + if (bsar->revision != BSAR_REVISION) { + printk(BIOS_ERR, "Unsupported BSAR table revision: %d\n", + bsar->revision); + return; + } + + acpigen_write_name("BRDS"); + acpigen_write_package(2); + acpigen_write_dword(bsar->revision); + + table_size = sizeof(*bsar) - + offsetof(struct bsar_profile, sar_lb_power_restriction); + package_size = 1 + 1 + table_size; + acpigen_write_package(package_size); + acpigen_write_dword(DOMAIN_TYPE_BLUETOOTH); + acpigen_write_dword(1); + acpigen_write_dword(bsar->increased_power_mode_limitation); + + set = (const uint8_t *)&bsar->sar_lb_power_restriction; + for (i = 0; i < table_size; i++) + acpigen_write_byte(set[i]); + + acpigen_write_package_end(); + acpigen_write_package_end(); +} + static void emit_sar_acpi_structures(const struct device *dev, struct dsm_profile *dsm) { union wifi_sar_limits sar_limits = {{NULL, NULL, NULL, NULL, NULL} }; @@ -511,6 +561,7 @@ sar_emit_wgds(sar_limits.wgds); sar_emit_ppag(sar_limits.ppag); sar_emit_wtas(sar_limits.wtas); + sar_emit_brds(sar_limits.bsar); /* copy the dsm data to be later used for creating _DSM function */ if (sar_limits.dsm != NULL) diff --git a/src/include/sar.h b/src/include/sar.h index c201cea..7c1b95d 100644 --- a/src/include/sar.h +++ b/src/include/sar.h @@ -9,8 +9,9 @@ #define MAX_DENYLIST_ENTRY 16 #define MAX_DSAR_SET_COUNT 3 #define MAX_GEO_OFFSET_REVISION 3 -#define MAX_PROFILE_COUNT 5 +#define MAX_PROFILE_COUNT 6 #define MAX_SAR_REVISION 2 +#define BSAR_REVISION 1 #define REVISION_SIZE 1 #define SAR_REV0_CHAINS_COUNT 2 #define SAR_REV0_SUBBANDS_COUNT 5 @@ -60,6 +61,18 @@ uint32_t enablement_11be; }; +struct bsar_profile { + uint8_t revision; + uint8_t increased_power_mode_limitation; + uint8_t sar_lb_power_restriction; + uint8_t br_modulation; + uint8_t edr2_modulation; + uint8_t edr3_modulation; + uint8_t le_modulation; + uint8_t le2_mhz_modulation; + uint8_t le_lr_modulation; +} __packed; + struct sar_header { char marker[SAR_STR_PREFIX_SIZE]; uint8_t version; @@ -74,6 +87,7 @@ struct gain_profile *ppag; struct avg_profile *wtas; struct dsm_profile *dsm; + struct bsar_profile *bsar; }; void *profile[MAX_PROFILE_COUNT]; }; diff --git a/src/vendorcode/google/chromeos/sar.c b/src/vendorcode/google/chromeos/sar.c index c42bf65..4b5c7e8 100644 --- a/src/vendorcode/google/chromeos/sar.c +++ b/src/vendorcode/google/chromeos/sar.c @@ -94,6 +94,14 @@ return sizeof(struct dsm_profile); } +static int bsar_table_size(const struct bsar_profile *bsar) +{ + if (bsar == NULL) + return 0; + + return sizeof(struct bsar_profile); +} + static bool valid_legacy_length(size_t bin_len) { if (bin_len == LEGACY_SAR_WGDS_BIN_SIZE) @@ -145,6 +153,7 @@ expected_sar_bin_size += gain_table_size(sar_limits->ppag); expected_sar_bin_size += sar_avg_table_size(sar_limits->wtas); expected_sar_bin_size += dsm_table_size(sar_limits->dsm); + expected_sar_bin_size += bsar_table_size(sar_limits->bsar); if (sar_bin_size != expected_sar_bin_size) { printk(BIOS_ERR, "Invalid SAR size, expected: %zu, obtained: %zu\n", -- To view, visit https://review.coreboot.org/c/coreboot/+/83200?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iebe95815c944d045f4cf686abcd1874a8a45e209 Gerrit-Change-Number: 83200 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[S] Change in coreboot[main]: drivers/wifi: Support Wi-Fi 7 11be Enablement
by Jérémy Compostella (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Dinesh Sharma, Ravishankar Sarawadi, Ravishankar Sarawadi. Jérémy Compostella has uploaded a new patch set (#9) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/82207?usp=email ) The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: drivers/wifi: Support Wi-Fi 7 11be Enablement ...................................................................... drivers/wifi: Support Wi-Fi 7 11be Enablement Add support for Wi-Fi 7 11be enable/disable based on document: 559910_Intel_Connectivity_Platforms_BIOS_Guidelines_Rev8_2.pdf Wi-Fi 7 320 MHz is disabled default in some countries like Japan. This adds capability for customers to enable by updating settings provided. BUG=b:348345300 BRANCH=None TEST=To test on Rex/Screebo Change-Id: Ifa1482d7511f48f5138d4c68566f07ce79f37a7a Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com> --- M src/drivers/wifi/generic/acpi.c M src/include/sar.h 2 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/82207/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/82207?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifa1482d7511f48f5138d4c68566f07ce79f37a7a Gerrit-Change-Number: 82207 Gerrit-PatchSet: 9 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Dinesh Sharma <dinesh.sharma(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Dinesh Sharma <dinesh.sharma(a)intel.corp-partner.google.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com>

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coreboot-gerrit June 2024