Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83118?usp=email )
Change subject: Kconfig: Update FW_CONFIG Kconfig options
......................................................................
Kconfig: Update FW_CONFIG Kconfig options
If a board supports FW_CONFIG or ChromeEC CBI, the options should be
selected by the mainboard. These are not something that need to be a
choice to enable or disable in Kconfig.
The defaults are pointless, so remove them. The symbols default to no.
Correct the descriptions of FW_CONFIG_SOURCE_CBFS and
FW_CONFIG_SOURCE_VPD. They come after CBI and do not override any other
options.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: Icf170dc2ef790d6f5a897a9c7c2ea64033bf1dc9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83118
Reviewed-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr>
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
---
M src/Kconfig
1 file changed, 8 insertions(+), 12 deletions(-)
Approvals:
Matt DeVillier: Looks good to me, approved
Nico Huber: Looks good to me, approved
Elyes Haouas: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/Kconfig b/src/Kconfig
index 1ec7552..ef3c72c 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -506,42 +506,38 @@
If your colors seem all wrong, try this option.
config FW_CONFIG
- bool "Firmware Configuration Probing"
- default n
+ bool
help
Enable support for probing devices with fw_config. This is a simple
bitmask broken into fields and options for probing.
+ Select this option in the Mainboard Kconfig.
config FW_CONFIG_SOURCE_CHROMEEC_CBI
- bool "Obtain Firmware Configuration value from Google Chrome EC CBI"
+ bool
depends on FW_CONFIG && EC_GOOGLE_CHROMEEC
- default n
help
This option tells coreboot to read the firmware configuration value
from the Google Chrome Embedded Controller CBI interface. This source
is not tried if FW_CONFIG_SOURCE_CBFS is enabled and the value was
found in CBFS.
+ Select this option in the Mainboard Kconfig.
config FW_CONFIG_SOURCE_CBFS
bool "Obtain Firmware Configuration value from CBFS"
depends on FW_CONFIG
- default n
help
With this option enabled coreboot will look for the 32bit firmware
configuration value in CBFS at the selected prefix with the file name
- "fw_config". This option will override other sources and allow the
- local image to preempt the mainboard selected source and can be used as
- FW_CONFIG_SOURCE_CHROMEEC_CBI fallback option.
+ "fw_config". This option gets run if no value is found with CBI, so acts
+ as a FW_CONFIG_SOURCE_CHROMEEC_CBI fallback option.
config FW_CONFIG_SOURCE_VPD
bool "Obtain Firmware Configuration value from VPD"
depends on FW_CONFIG && VPD
- default n
help
With this option enabled coreboot will look for the 32bit firmware
- configuration value in VPD key name "fw_config". This option will
- override other sources and allow the local image to preempt the mainboard
- selected source and can be used for other FW_CONFIG_SOURCEs fallback option.
+ configuration value in VPD key name "fw_config". This option runs if no
+ FW_CONFIG value is set by either CBI or CBFS.
config HAVE_RAMPAYLOAD
bool
--
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Nico Huber has posted comments on this change by Martin L Roth. ( https://review.coreboot.org/c/coreboot/+/83118?usp=email )
Change subject: Kconfig: Update FW_CONFIG Kconfig options
......................................................................
Patch Set 2: Code-Review+2
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Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83206?usp=email )
Change subject: soc/intel/common: Extend WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS to 1500ms
......................................................................
soc/intel/common: Extend WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS to 1500ms
Some dongles require more time to be ready,
this CL extedns the DP mode entry timeout from 0.5s to 1.5s and make
sure the tested dongle display works.
Before
[WARN ] DP not ready after 500ms. Abort.
After
[INFO ] DP ready after 1211 ms
BUG:b348309582
TEST:emerge coreboot
verify tested dongles and monitors display works
Change-Id: I22d7800b50f6f7de9f147ae6998a5015d0dc0be9
Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>
---
M src/soc/intel/common/block/tcss/tcss.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/83206/1
diff --git a/src/soc/intel/common/block/tcss/tcss.c b/src/soc/intel/common/block/tcss/tcss.c
index 1c4b9b3..5ebc129 100644
--- a/src/soc/intel/common/block/tcss/tcss.c
+++ b/src/soc/intel/common/block/tcss/tcss.c
@@ -21,7 +21,7 @@
#define BIAS_CTRL_VW_INDEX_SHIFT 16
#define BIAS_CTRL_BIT_POS_SHIFT 8
#define WAIT_FOR_DISPLAYPORT_TIMEOUT_MS 1000
-#define WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS 500
+#define WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS 1500
#define WAIT_FOR_HPD_TIMEOUT_MS 3000
static uint32_t tcss_make_conn_cmd(int u, int u3, int u2, int ufp, int hsl,
--
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Change subject: acpi: Add support for DRHD size reporting
......................................................................
Abandoned
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Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82429?usp=email )
Change subject: acpi: Add support for DRHD size reporting
......................................................................
Patch Set 16:
(1 comment)
File src/acpi/acpi_dmar.c:
https://review.coreboot.org/c/coreboot/+/82429/comment/508f6f4b_8268d4fb?us… :
PS15, Line 50: drhd->bar = bar;
> Good catch, we need an assert here.
Done
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