coreboot-gerrit June 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: Makefile: Update symlink target
by Martin L Roth (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Christian Walter, Felix Held. Martin L Roth has posted comments on this change by Martin L Roth. ( https://review.coreboot.org/c/coreboot/+/83122?usp=email ) Change subject: Makefile: Update symlink target ...................................................................... Patch Set 3: (1 comment) File Makefile: https://review.coreboot.org/c/coreboot/+/83122/comment/d0ef5636_a54953b3?us… : PS3, Line 494: symlink: To help review, let me explain what's going on below. 495 - 498: If there are no link files in the variable, populated earlier, exit. 500 - 519: Loop through all of the link files 501: Get the contents of the link file. This says where we're linking to. 502: Get the path of the link file. This is where we're linking from. 503 - 506: If the link already exists, go to the next link file. 507: Change the relative path of the link-to location to an absolute path. 508 - 511: Make sure the link-to location is inside the coreboot repo by removing the path of the coreboot repo from the link-to location. If it doesn't change, it's outside of the repo. Go to next link file. 512 - 518: See if the link-to location exists as something other than a link. If it doesn't, create the link. If that fails, print a warning (This should be unusual.) If the link-to location does already exist, print a warning. -- To view, visit https://review.coreboot.org/c/coreboot/+/83122?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9b0d1b5bc19556bc41ca98519390e69ea104bd1b Gerrit-Change-Number: 83122 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 24 Jun 2024 16:09:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: device/azalia: Separate codec checking and initialization
by Felix Held (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Nicholas Sudsgaard, Paul Menzel. Felix Held has posted comments on this change by Nicholas Sudsgaard. ( https://review.coreboot.org/c/coreboot/+/80332?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: device/azalia: Separate codec checking and initialization ...................................................................... Patch Set 10: (2 comments) File src/device/azalia_device.c: https://review.coreboot.org/c/coreboot/+/80332/comment/45443893_75c35505?us… : PS10, Line 274: >= 0 i'd either use '== CB_SUCCESS' here or make codec_is_operative return a bool. i'd prefer the bool return type, since that's more what i'd expect from a function whose name contains 'is' https://review.coreboot.org/c/coreboot/+/80332/comment/13d8a852_5635c113?us… : PS10, Line 280: if (!codec_can_init(codec_mask, base, i)) : continue; : azalia_codec_init(base, i, cim_verb_data, cim_verb_data_size); i'd keep the logic as it was before and not do the inverse logic and a continue like it's done now. if (codec_can_init(codec_mask, base, i)) azalia_codec_init(base, i, cim_verb_data, cim_verb_data_size); at least to me that's easier to read -- To view, visit https://review.coreboot.org/c/coreboot/+/80332?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I92b6d184abccdbe0e1bfce98a2c959a97a618a29 Gerrit-Change-Number: 80332 Gerrit-PatchSet: 10 Gerrit-Owner: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Comment-Date: Mon, 24 Jun 2024 15:49:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/google/brox: Add support for batteryless booting
by Karthik Ramasubramanian (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Angel Pons, Deepti Deshatty, Paul Menzel, Shelley Chen. Karthik Ramasubramanian has posted comments on this change by Shelley Chen. ( https://review.coreboot.org/c/coreboot/+/83087?usp=email ) Change subject: mb/google/brox: Add support for batteryless booting ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83087?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie36f16b2c938dce29cd2130a86fc8c08f5ba0902 Gerrit-Change-Number: 83087 Gerrit-PatchSet: 5 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Mon, 24 Jun 2024 15:29:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: acpi: Add support for DHRD size reporting
by Angel Pons (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, Cliff Huang, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jeff Daly, Jincheng Li, Johnny Lin, Jonathan Zhang, Kapil Porwal, Lance Zhao, Lean Sheng Tan, Nick Vaccaro, Nico Huber, Patrick Rudolph, Paul Menzel, Sean Rhodes, Shuo Liu, Subrata Banik, Tarun, Tim Chu, Tim Wawrzynczak, Vanessa Eusebio, Werner Zeh. Angel Pons has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82429?usp=email ) Change subject: acpi: Add support for DHRD size reporting ...................................................................... Patch Set 15: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/82429/comment/b0cb3a2c_cd33ed81?us… : PS15, Line 7: DHRD typo: DRHD https://review.coreboot.org/c/coreboot/+/82429/comment/3be958e3_75053b3e?us… : PS15, Line 11: the register set is 2^N 4 KB pages. If the value of N is zero, what happens? I didn't find an answer in the VT-d spec (`D51397-016`). File src/acpi/acpi_dmar.c: https://review.coreboot.org/c/coreboot/+/82429/comment/b292fb68_15386f17?us… : PS15, Line 50: drhd->bar = bar; VT-d spec (`D51397-016`) says: > This address must be aligned according to the size of the register set size reported in the Size field of this structure. ``` ``` https://review.coreboot.org/c/coreboot/+/82429/comment/c094befc_53b75ea8?us… : PS15, Line 51: drhd->size = log2(size) - 12; : /* : * Refer to chapter 8.3 of https://cdrdv2.intel.com/v1/dl/getContent/671081 : * only bit 3:0 are allowed to be used : */ : assert(!(drhd->size >> 4)); Although this check is correct, I find it rather convoluted. How about: ```suggestion drhd->size = log2(size) - 12; /* * Refer to chapter 8.3 of https://cdrdv2.intel.com/v1/dl/getContent/671081 * only bit 3:0 are allowed to be used */ assert(size <= (1 << 15) * (4 * KiB)); /* max 2^15 pages, 4 KiB each */ ``` I intentionally kept the multiplications explicit: it's easier to see what the numbers mean, and the compiler will do constant folding anyway. Even better: since size is always a multiple of 4 KiB (page size), why not have a `pages` parameter instead? It would avoid having to put `4 * KiB` on every call site. ```suggestion /* * Refer to chapter 8.3 of https://cdrdv2.intel.com/v1/dl/getContent/671081 * only bit 3:0 are allowed to be used */ assert(pages <= 1 << 15); /* max 2^15 pages */ drhd->size = log2(pages); ``` File src/include/acpi/acpi.h: https://review.coreboot.org/c/coreboot/+/82429/comment/fbf49e69_bc841c71?us… : PS15, Line 644: } __packed dmar_entry_t; I think this used to be a generic DMAR entry structure, but it has become a DRHD structure. VT-d spec `(D51397-016)` says only the first two fields are common across all entries. Anyway, nothing to do in this patchset. https://review.coreboot.org/c/coreboot/+/82429/comment/b02365fa_8a08d135?us… : PS15, Line 1852: unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags, : u16 segment, u64 bar, u32 size); To avoid having to touch all platforms, would it make sense to have a specialised `acpi_create_dmar_drhd_4k` function? I would make a preparation change that renames the existing `acpi_create_dmar_drhd` function to `acpi_create_dmar_drhd_4k`, then this change would (re-)add `acpi_create_dmar_drhd` with the size parameter. End result would be: ```suggestion unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags, u16 segment, u64 bar, u32 size); static inline unsigned long acpi_create_dmar_drhd_4k(unsigned long current, u8 flags, u16 segment, u64 bar) { return acpi_create_dmar_drhd(current, flags, segment, bar, 4 * KiB); } ``` If changing the function signature to use pages instead of size, this also needs to be adapted. -- To view, visit https://review.coreboot.org/c/coreboot/+/82429?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I49dd5de2eca257a5f6240e36d05755cabca96d1c Gerrit-Change-Number: 82429 Gerrit-PatchSet: 15 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Comment-Date: Mon, 24 Jun 2024 15:27:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: lotso: Add hid report address for gt7986u
by Karthik Ramasubramanian (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Jian Tong, Kun Liu, Paul Menzel, Shelley Chen, Subrata Banik. Karthik Ramasubramanian has posted comments on this change by Kun Liu. ( https://review.coreboot.org/c/coreboot/+/83139?usp=email ) Change subject: lotso: Add hid report address for gt7986u ...................................................................... Patch Set 3: (2 comments) File src/drivers/spi/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/83139/comment/176148b4_d1d0c2f8?us… : PS3, Line 151: /* Add generic property list */ : acpi_dp_add_property_list(dsd, config->property_list, : config->property_count); Nit: Please add one more tab to the indentation. File src/mainboard/google/brox/variants/lotso/overridetree.cb: https://review.coreboot.org/c/coreboot/+/83139/comment/0781ed3f_af190fdd?us… : PS3, Line 374: register "property_count" = "1" : register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" : register "property_list[0].name" = ""goodix,hid-report-addr"" : register "property_list[0].integer" = "0x22c8c" Keep this mainboard change in a separate CL. -- To view, visit https://review.coreboot.org/c/coreboot/+/83139?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8b18e0a2925e6fd36e3a470bde9910661b7558b8 Gerrit-Change-Number: 83139 Gerrit-PatchSet: 3 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Attention: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 24 Jun 2024 15:21:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: acpigen_ps2_keybd: Support a Do Not Disturb key
by Felix Held (Code Review) 24 Jun '24

24 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82997?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: acpigen_ps2_keybd: Support a Do Not Disturb key ...................................................................... acpigen_ps2_keybd: Support a Do Not Disturb key This commit simply adds support for a Do Not Disturb key. HUTRR94 added support for a new usage titled "System Do Not Disturb" which toggles a system-wide Do Not Disturb setting. BUG=b:342467600 TEST=Build and flash a board that generates a scancode for a Do Not Disturb key. Verify that KEY_DO_NOT_DISTURB is generated in the Linux kernel with patches[0] that add this new event code using `evtest`. [0] - https://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git/commit/?id=22d6… Change-Id: I26e719bbde5106305282fe43dd15833a3e48e41e Signed-off-by: Aseda Aboagye <aaboagye(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82997 Reviewed-by: Caveh Jalali <caveh(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Forest Mittelberg <bmbm(a)google.com> --- M src/acpi/acpigen_ps2_keybd.c M src/ec/google/chromeec/ec_acpi.c M src/include/acpi/acpigen_ps2_keybd.h 3 files changed, 3 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Forest Mittelberg: Looks good to me, but someone else must approve Caveh Jalali: Looks good to me, approved diff --git a/src/acpi/acpigen_ps2_keybd.c b/src/acpi/acpigen_ps2_keybd.c index e4322c1..43a1ece 100644 --- a/src/acpi/acpigen_ps2_keybd.c +++ b/src/acpi/acpigen_ps2_keybd.c @@ -58,6 +58,7 @@ [PS2_KEY_MENU] = KEYMAP(0xdd, KEY_CONTROLPANEL), /* e0d5 */ [PS2_KEY_DICTATE] = KEYMAP(0xa7, KEY_DICTATE), /* e027*/ [PS2_KEY_ACCESSIBILITY] = KEYMAP(0xa9, KEY_ACCESSIBILITY), /* e029 */ + [PS2_KEY_DO_NOT_DISTURB] = KEYMAP(0xa8, KEY_DO_NOT_DISTURB), /* e028 */ }; /* Keymap for numeric keypad keys */ diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c index 6e36a7fd..1c97dcc 100644 --- a/src/ec/google/chromeec/ec_acpi.c +++ b/src/ec/google/chromeec/ec_acpi.c @@ -235,6 +235,7 @@ [TK_MENU] = PS2_KEY_MENU, [TK_DICTATE] = PS2_KEY_DICTATE, [TK_ACCESSIBILITY] = PS2_KEY_ACCESSIBILITY, + [TK_DONOTDISTURB] = PS2_KEY_DO_NOT_DISTURB, }; static void fill_ssdt_ps2_keyboard(const struct device *dev) diff --git a/src/include/acpi/acpigen_ps2_keybd.h b/src/include/acpi/acpigen_ps2_keybd.h index fe1101b..deb755b 100644 --- a/src/include/acpi/acpigen_ps2_keybd.h +++ b/src/include/acpi/acpigen_ps2_keybd.h @@ -29,6 +29,7 @@ PS2_KEY_MENU, PS2_KEY_DICTATE, PS2_KEY_ACCESSIBILITY, + PS2_KEY_DO_NOT_DISTURB, }; #define PS2_MIN_TOP_ROW_KEYS 2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82997?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I26e719bbde5106305282fe43dd15833a3e48e41e Gerrit-Change-Number: 82997 Gerrit-PatchSet: 4 Gerrit-Owner: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Forest Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: YH Lin <yueherngl(a)google.com>

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[XS] Change in coreboot[main]: acpigen_ps2_keybd: Support an Accessibility key
by Felix Held (Code Review) 24 Jun '24

24 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82996?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: acpigen_ps2_keybd: Support an Accessibility key ...................................................................... acpigen_ps2_keybd: Support an Accessibility key Add support for an Accessibility key. HUTRR116 added support for a new usage titled "System Accessibility Binding" which toggles a system-wide bound accessibility UI or command. BUG=b:333095388 TEST=Build and flash a board that contains an accessibility key. Verify that KEY_ACCESSIBILITY is generated in the Linux kernel with patches[0] that add this new event code using `evtest`. ``` Testing ... (interrupt to exit) Event: time 1718924048.882841, -------------- SYN_REPORT ------------ Event: time 1718924054.062428, type 4 (EV_MSC), code 4 (MSC_SCAN), value a9 Event: time 1718924054.062428, type 1 (EV_KEY), code 590 (?), value 1 Event: time 1718924054.062428, -------------- SYN_REPORT ------------ Event: time 1718924054.195904, type 4 (EV_MSC), code 4 (MSC_SCAN), value a9 Event: time 1718924054.195904, type 1 (EV_KEY), code 590 (?), value 0 Event: time 1718924054.195904, -------------- SYN_REPORT ------------ ``` [0] - https://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git/commit/?id=0c7d… Change-Id: Ifc639b37e89ec251f55859331ab5c2f4b2b45a7d Signed-off-by: Aseda Aboagye <aaboagye(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82996 Reviewed-by: Caveh Jalali <caveh(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Forest Mittelberg <bmbm(a)google.com> --- M src/acpi/acpigen_ps2_keybd.c M src/ec/google/chromeec/ec_acpi.c M src/include/acpi/acpigen_ps2_keybd.h 3 files changed, 3 insertions(+), 0 deletions(-) Approvals: Forest Mittelberg: Looks good to me, but someone else must approve Caveh Jalali: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/acpi/acpigen_ps2_keybd.c b/src/acpi/acpigen_ps2_keybd.c index 4a05225..e4322c1 100644 --- a/src/acpi/acpigen_ps2_keybd.c +++ b/src/acpi/acpigen_ps2_keybd.c @@ -57,6 +57,7 @@ [PS2_KEY_KBD_BKLIGHT_TOGGLE] = KEYMAP(0x9e, KEY_KBDILLUMTOGGLE), /* e01e */ [PS2_KEY_MENU] = KEYMAP(0xdd, KEY_CONTROLPANEL), /* e0d5 */ [PS2_KEY_DICTATE] = KEYMAP(0xa7, KEY_DICTATE), /* e027*/ + [PS2_KEY_ACCESSIBILITY] = KEYMAP(0xa9, KEY_ACCESSIBILITY), /* e029 */ }; /* Keymap for numeric keypad keys */ diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c index c8eee77..6e36a7fd 100644 --- a/src/ec/google/chromeec/ec_acpi.c +++ b/src/ec/google/chromeec/ec_acpi.c @@ -234,6 +234,7 @@ [TK_MICMUTE] = PS2_KEY_MICMUTE, [TK_MENU] = PS2_KEY_MENU, [TK_DICTATE] = PS2_KEY_DICTATE, + [TK_ACCESSIBILITY] = PS2_KEY_ACCESSIBILITY, }; static void fill_ssdt_ps2_keyboard(const struct device *dev) diff --git a/src/include/acpi/acpigen_ps2_keybd.h b/src/include/acpi/acpigen_ps2_keybd.h index 5a55356..fe1101b 100644 --- a/src/include/acpi/acpigen_ps2_keybd.h +++ b/src/include/acpi/acpigen_ps2_keybd.h @@ -28,6 +28,7 @@ PS2_KEY_MICMUTE, PS2_KEY_MENU, PS2_KEY_DICTATE, + PS2_KEY_ACCESSIBILITY, }; #define PS2_MIN_TOP_ROW_KEYS 2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82996?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifc639b37e89ec251f55859331ab5c2f4b2b45a7d Gerrit-Change-Number: 82996 Gerrit-PatchSet: 5 Gerrit-Owner: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Forest Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: mb/google/brya: Create tereid variant
by Felix Held (Code Review) 24 Jun '24

24 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83145?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/brya: Create tereid variant ...................................................................... mb/google/brya: Create tereid variant This patch creates a new tereid variant, which is a Twin Lake platform. This variant uses Nereid board mounted with the Twin Lake SOC and hence the plan is to reuse the existing nereid variant code. BUG=b:346442939 TEST=Generate the Tereid firmware builds and verify with boot check. Change-Id: I052c3ba93d00e2df7e205c3127210bacaa956ca0 Signed-off-by: Sowmya V <v.sowmya(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83145 Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/Kconfig.name 2 files changed, 14 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Kapil Porwal: Looks good to me, approved diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 464f8ce..59b09e0 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -514,6 +514,14 @@ select DRIVERS_GENESYSLOGIC_GL9763E_L1_MAX select INTEL_GMA_HAVE_VBT +config BOARD_GOOGLE_TEREID + select BOARD_GOOGLE_BASEBOARD_NISSA + select BOARD_ROMSIZE_KB_32768 + select DRIVERS_GENERIC_BAYHUB_LV2 + select DRIVERS_GENERIC_GPIO_KEYS + select INTEL_GMA_HAVE_VBT + select SOC_INTEL_TWINLAKE + config BOARD_GOOGLE_TIVVIKS select BOARD_GOOGLE_BASEBOARD_NISSA select BOARD_ROMSIZE_KB_32768 @@ -675,6 +683,7 @@ default 0x1 if BOARD_GOOGLE_TAEKO default 0x3 if BOARD_GOOGLE_TAEKO4ES default 0x1 if BOARD_GOOGLE_TANIKS + default 0x0 if BOARD_GOOGLE_TEREID default 0x0 if BOARD_GOOGLE_TIVVIKS default 0x0 if BOARD_GOOGLE_TRULO default 0x0 if BOARD_GOOGLE_ULDREN @@ -767,6 +776,7 @@ default "Taeko" if BOARD_GOOGLE_TAEKO default "Taeko4ES" if BOARD_GOOGLE_TAEKO4ES default "Taniks" if BOARD_GOOGLE_TANIKS + default "Tereid" if BOARD_GOOGLE_TEREID default "Tivviks" if BOARD_GOOGLE_TIVVIKS default "Trulo" if BOARD_GOOGLE_TRULO default "Uldren" if BOARD_GOOGLE_ULDREN @@ -812,6 +822,7 @@ default "mithrax" if BOARD_GOOGLE_MITHRAX default "moli" if BOARD_GOOGLE_MOLI default "nereid" if BOARD_GOOGLE_NEREID + default "nereid" if BOARD_GOOGLE_TEREID default "nivviks" if BOARD_GOOGLE_NIVVIKS default "nivviks" if BOARD_GOOGLE_TIVVIKS default "nokris" if BOARD_GOOGLE_NOKRIS diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 3229b18..a929d01 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -140,6 +140,9 @@ config BOARD_GOOGLE_TANIKS bool "-> Taniks" +config BOARD_GOOGLE_TEREID + bool "-> Tereid" + config BOARD_GOOGLE_TIVVIKS bool "-> Tivviks" -- To view, visit https://review.coreboot.org/c/coreboot/+/83145?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I052c3ba93d00e2df7e205c3127210bacaa956ca0 Gerrit-Change-Number: 83145 Gerrit-PatchSet: 4 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: mb/google/brox: Add support for batteryless booting
by Shelley Chen (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Angel Pons, Deepti Deshatty, Karthik Ramasubramanian, Paul Menzel. Shelley Chen has posted comments on this change by Shelley Chen. ( https://review.coreboot.org/c/coreboot/+/83087?usp=email ) Change subject: mb/google/brox: Add support for batteryless booting ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/brox/variants/baseboard/brox/ramstage.c: https://review.coreboot.org/c/coreboot/+/83087/comment/e1b5a73f_0ee0200c?us… : PS4, Line 102: 54 | 56 > Are these correct? They come out to be 94 and 96 for 86% efficiency of 110 W. Yes, when the adapter is very high we don't need to set the PsysPL2 and PL4 values as high as the power consumption of the processor will never get that high. It leaves more power for the rest of the system. -- To view, visit https://review.coreboot.org/c/coreboot/+/83087?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie36f16b2c938dce29cd2130a86fc8c08f5ba0902 Gerrit-Change-Number: 83087 Gerrit-PatchSet: 4 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 24 Jun 2024 15:15:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com>

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[M] Change in coreboot[main]: mb/google/brox: Add support for batteryless booting
by Karthik Ramasubramanian (Code Review) 24 Jun '24

24 Jun '24

Attention is currently required from: Angel Pons, Deepti Deshatty, Paul Menzel, Shelley Chen. Karthik Ramasubramanian has posted comments on this change by Shelley Chen. ( https://review.coreboot.org/c/coreboot/+/83087?usp=email ) Change subject: mb/google/brox: Add support for batteryless booting ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/brox/variants/baseboard/brox/ramstage.c: https://review.coreboot.org/c/coreboot/+/83087/comment/abc20ddb_6a5d24a7?us… : PS4, Line 102: 54 | 56 Are these correct? They come out to be 94 and 96 for 86% efficiency of 110 W. -- To view, visit https://review.coreboot.org/c/coreboot/+/83087?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie36f16b2c938dce29cd2130a86fc8c08f5ba0902 Gerrit-Change-Number: 83087 Gerrit-PatchSet: 4 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Mon, 24 Jun 2024 15:11:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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