Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83148?usp=email )
Change subject: mb/google/nissa/var/nivviks: Disable CNVi Bluetooth based on fw_config
......................................................................
mb/google/nissa/var/nivviks: Disable CNVi Bluetooth based on fw_config
When CNVi based Wifi6 is disabled, CNVi based Bluetooth must be turned
off, based on fw_config. Otherwise, when device boots without the cbi
settings for wifi6, boot may fail with assertion error for line 817 &
819 of file 'src/soc/intel/alderlake/fsp_params.c'.
BUG=b:345596420
BRANCH=NONE
TEST=Dut boots fine with both Wifi6 & Wifi7 based cbi settings, along
with enumeration of corresponding BT device.
Change-Id: I03fde02fa4b36f4e47d6f0e95675feddb3bee7cd
Signed-off-by: Poornima Tom <poornima.tom(a)intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83148
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal(a)google.com>
Reviewed-by: Eric Lai <ericllai(a)google.com>
---
M src/mainboard/google/brya/variants/nivviks/fw_config.c
1 file changed, 10 insertions(+), 0 deletions(-)
Approvals:
Kapil Porwal: Looks good to me, approved
Eric Lai: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/google/brya/variants/nivviks/fw_config.c b/src/mainboard/google/brya/variants/nivviks/fw_config.c
index 5f00892..ae4baf3 100644
--- a/src/mainboard/google/brya/variants/nivviks/fw_config.c
+++ b/src/mainboard/google/brya/variants/nivviks/fw_config.c
@@ -110,6 +110,16 @@
PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG),
};
+void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
+{
+ if (!fw_config_probe(FW_CONFIG(WIFI_CATEGORY, WIFI_6))) {
+ printk(BIOS_INFO, "CNVi bluetooth disabled by fw_config\n");
+ config->cnvi_bt_core = false;
+ printk(BIOS_INFO, "CNVi bluetooth audio offload disabled by fw_config\n");
+ config->cnvi_bt_audio_offload = false;
+ }
+}
+
void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
{
if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) {
--
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Gerrit-Change-Number: 83148
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Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83074?usp=email )
Change subject: mb/google/nissa/var/nivviks: Add fw_config fields for wifi6 and wifi7
......................................................................
mb/google/nissa/var/nivviks: Add fw_config fields for wifi6 and wifi7
Add a new fw config field for wifi category as WIFI_6, which is CNVi
based and WIFI_7, which is PCIe based. Also, enable WIFI_6 for existing
CNVi based wifi port as well as bluetooth port.
BUG=b:345596420
BRANCH=NONE
TEST=Verified Wifi6 module detection
Change-Id: I4b218f772405bdb1b741b4d5e640d7b4f145cd76
Signed-off-by: Poornima Tom <poornima.tom(a)intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83074
Reviewed-by: Eric Lai <ericllai(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Subrata Banik <subratabanik(a)google.com>
---
M src/mainboard/google/brya/variants/nivviks/overridetree.cb
1 file changed, 8 insertions(+), 1 deletion(-)
Approvals:
Eric Lai: Looks good to me, approved
build bot (Jenkins): Verified
Subrata Banik: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
index 444a9a0..4528016 100644
--- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb
+++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
@@ -20,6 +20,10 @@
option STYLUS_PRESENT 0
option STYLUS_ABSENT 1
end
+ field WIFI_CATEGORY 7
+ option WIFI_6 0 # CNVi
+ option WIFI_7 1 # PCIe
+ end
end
chip soc/intel/alderlake
@@ -289,6 +293,7 @@
register "enable_cnvi_ddr_rfim" = "true"
device generic 0 on end
end
+ probe WIFI_CATEGORY WIFI_6
end
device ref i2c1 on
chip drivers/i2c/hid
@@ -628,7 +633,9 @@
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
- device ref usb2_port10 on end
+ device ref usb2_port10 on
+ probe WIFI_CATEGORY WIFI_6
+ end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (MLB)""
--
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Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83138?usp=email )
(
4 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: mb/google/nissa/var/nivviks: Update config for CNVi
......................................................................
mb/google/nissa/var/nivviks: Update config for CNVi
Add wake configuration and set 'add_acpi_dma_property'=true for CNVi.
Also, add "set 'add_acpi_dma_property' to true to tell the OS to enforce DMA protection for this device.
BUG=b:345596420
BRANCH=NONE
TEST=SSDT dump showed below:
Scope (\_SB.PCI0.RP01.WF00)
{
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x23,
0x03
})
Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
{
ToUUID ("70d24161-6dd5-4c9e-8070-705531292865"),
Package (0x01)
{
Package (0x02)
{
"DmaProperty",
One
}
}
Change-Id: If04539fe8dceb5c2edfc06a324ede11147b78b6d
Signed-off-by: Poornima Tom <poornima.tom(a)intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83138
Reviewed-by: Kapil Porwal <kapilporwal(a)google.com>
Reviewed-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-by: Eric Lai <ericllai(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/mainboard/google/brya/variants/nivviks/overridetree.cb
1 file changed, 2 insertions(+), 0 deletions(-)
Approvals:
Kapil Porwal: Looks good to me, approved
Subrata Banik: Looks good to me, approved
Eric Lai: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
index d7be804..444a9a0 100644
--- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb
+++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
@@ -284,6 +284,8 @@
end
device ref cnvi_wifi on
chip drivers/wifi/generic
+ register "wake" = "GPE0_PME_B0"
+ register "add_acpi_dma_property" = "true"
register "enable_cnvi_ddr_rfim" = "true"
device generic 0 on end
end
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Eric Lai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/83228?usp=email )
Change subject: soc/intel/cmn/cse: Modify dependency on CSE lite configs
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> > Like low battery, brown out, […]
I see, good to know. Cool!
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Poornima Tom has posted comments on this change by Poornima Tom. ( https://review.coreboot.org/c/coreboot/+/83138?usp=email )
Change subject: mb/google/nissa/var/nivviks: Update config for CNVi
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83138/comment/fffa218f_41cceaae?us… :
PS3, Line 9: Also, set 'add_acpi_dma_property' to
: true.
:
> > see https://learn.microsoft. […]
Done
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Hello Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik, V Sowmya, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83138?usp=email
to look at the new patch set (#5).
Change subject: mb/google/nissa/var/nivviks: Update config for CNVi
......................................................................
mb/google/nissa/var/nivviks: Update config for CNVi
Add wake configuration and set 'add_acpi_dma_property'=true for CNVi.
Also, add "set 'add_acpi_dma_property' to true to tell the OS to enforce DMA protection for this device.
BUG=b:345596420
BRANCH=NONE
TEST=SSDT dump showed below:
Scope (\_SB.PCI0.RP01.WF00)
{
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x23,
0x03
})
Name (_DSD, Package (0x02) // _DSD: Device-Specific Data
{
ToUUID ("70d24161-6dd5-4c9e-8070-705531292865"),
Package (0x01)
{
Package (0x02)
{
"DmaProperty",
One
}
}
Change-Id: If04539fe8dceb5c2edfc06a324ede11147b78b6d
Signed-off-by: Poornima Tom <poornima.tom(a)intel.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/nivviks/overridetree.cb
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/83138/5
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Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/83228?usp=email )
Change subject: soc/intel/cmn/cse: Modify dependency on CSE lite configs
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Like low battery, brown out,
Those are independent scenarios and nothing specifically linked to the CSE sync. with EFS2 being enabled for EC, we are good to low battery charging etc. CSE sync is no where related to boost the battery capacity if running the CSE from RO till depthcharge.
> hmm. Just thinking could it recover if update fail in dc mode. Dose sync in payload still need reboot?
if update fail in DC then system will go to recovery boot. The reason to migrate CSE sync into depthcharge to ensure that all CSE update blobs are staying into inside block storage and not into the SPI flash. This way we could save 8MB at minimum SPI usage in Panther Lake SoC platform.
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