coreboot-gerrit May 2024

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[L] Change in coreboot[main]: mb/dell: Add Latitude E6430 (Ivy Bridge)
by Felix Singer (Code Review) 01 May '24

01 May '24

Attention is currently required from: Martin L Roth, Nicholas Chin, Paul Menzel. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77444?usp=email ) Change subject: mb/dell: Add Latitude E6430 (Ivy Bridge) ...................................................................... Patch Set 12: (10 comments) File src/mainboard/dell/snb_ivb_latitude/devicetree.cb: https://review.coreboot.org/c/coreboot/+/77444/comment/c3cd5080_8ae590a0 : PS12, Line 18: device ref host_bridge on end Already enabled in chipset devicetree, remove https://review.coreboot.org/c/coreboot/+/77444/comment/7499a014_8dc49a21 : PS12, Line 19: device ref peg10 off end Disabled in chipset devicetree, remove https://review.coreboot.org/c/coreboot/+/77444/comment/1bd1237b_2134bdb5 : PS12, Line 24: register "gen1_dec" = "0x007c0681" : register "gen2_dec" = "0x005c0921" : register "gen3_dec" = "0x003c07e1" : Move into lpc device scope. https://review.coreboot.org/c/coreboot/+/77444/comment/f6ee08a8_59ad895e : PS12, Line 31: register "sata_interface_speed_support" = "0x3" : Move into SATA device scope https://review.coreboot.org/c/coreboot/+/77444/comment/ddfa00ff_3b5bd675 : PS12, Line 36: device ref mei1 on end Enabled in chipset devicetree, remove https://review.coreboot.org/c/coreboot/+/77444/comment/8ff717c8_59a21042 : PS12, Line 37: device ref mei2 off end : Disabled in chipset devicetree, remove https://review.coreboot.org/c/coreboot/+/77444/comment/4f13db1c_410d2269 : PS12, Line 49: device ref pcie_rp7 off end : Disabled in chipset devicetree, remove https://review.coreboot.org/c/coreboot/+/77444/comment/3b68ab21_bbbbe870 : PS12, Line 52: device ref pci_bridge off end Disabled in chipset devicetree, remove https://review.coreboot.org/c/coreboot/+/77444/comment/bc356b8b_d2d99cc2 : PS12, Line 59: device ref smbus on end Enabled in chipset devicetree, remove https://review.coreboot.org/c/coreboot/+/77444/comment/f2f29bc8_8a105d91 : PS12, Line 60: device ref sata2 off end : Disabled in chipset devicetree, remove -- To view, visit https://review.coreboot.org/c/coreboot/+/77444?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908 Gerrit-Change-Number: 77444 Gerrit-PatchSet: 12 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Iru Cai <mytbk920423(a)gmail.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Wed, 01 May 2024 21:31:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/dell: Add Latitude E6430 (Ivy Bridge)
by Nicholas Chin (Code Review) 01 May '24

01 May '24

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[L] Change in coreboot[main]: mb/dell: Add Latitude E6430 (Ivy Bridge)
by Nicholas Chin (Code Review) 01 May '24

01 May '24

Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel. Hello Martin L Roth, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77444?usp=email to look at the new patch set (#12). Change subject: mb/dell: Add Latitude E6430 (Ivy Bridge) ...................................................................... mb/dell: Add Latitude E6430 (Ivy Bridge) Mainboard is QAL80/LA-7781P (UMA). The version with an Nvidia dGPU was not tested. This is based on the autoport output with some manual fixes. The VBT was obtained using `intelvbttool --inlegacy --outvbt data.vbt` while running version A24 (latest version) of the vendor firmware. The flash is 8MiB + 4MiB, and can be easily accessed by removing the keyboard. It can also be internally flashed by sending a command to the EC, which causes the EC to pull the FDO pin low and the firmware to skip setting up any chipset based write protections [1]. The EC is the SMSC MEC5055, which seems to be compatible with the existing MEC5035 code. Working: - Libgfxinit - USB EHCI debug (left side usb port is HCD index 2, middle port on the right side is HCD index 1) with the CH347 - Keyboard - Touchpad/trackpoint - ExpressCard (tested with USB 3.0 card) - Audio - Ethernet - SD card reader - mPCIe WiFi - SeaBIOS 1.16.3 - edk2 (MrChromebox's fork, uefipayload_202309) - Internal flashing using dell-flash-unlock Not working: - S3 suspend: Possibly EC related, DRAM power is getting cut when entering S3 - Physical wireless switch: this triggers an SMI handler in the vendor firmware which sends commands to the EC to enable/disable wireless devices, and has not been reimplemented - Battery reporting: needs ACPI code for the EC - Brightness hotkeys: probably EC related - The system reports that the power button was pressed and shuts down when the CPU hits around 86 degrees Celsius, before the CPU can thermal throttle. Likely EC and possibly PECI related. - Integrated keyboard with upstream GRUB 2.12 payload: Upstream GRUB initializes the 8042 PS/2 controller in a way that is incompatible with how the EC firmware emulates it. GRUB tries to initialize the controller with scan code set 2 without translation, but the EC only ever returns set 1 scan codes to the system and thus is only works as an untranslated set 1 keyboard or a translated set 2 keyboard, regardless of commands to set the scan code. A USB keyboard works fine. Unknown/untested: - Dock - eSATA - TPM - dGPU on non-UMA model - Bluetooth module (not included on my system) [1] https://gitlab.com/nic3-14159/dell-flash-unlock Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908 Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- A src/mainboard/dell/snb_ivb_latitude/Kconfig A src/mainboard/dell/snb_ivb_latitude/Kconfig.name A src/mainboard/dell/snb_ivb_latitude/Makefile.mk A src/mainboard/dell/snb_ivb_latitude/acpi/ec.asl A src/mainboard/dell/snb_ivb_latitude/acpi/platform.asl A src/mainboard/dell/snb_ivb_latitude/acpi/superio.asl A src/mainboard/dell/snb_ivb_latitude/board_info.txt A src/mainboard/dell/snb_ivb_latitude/cmos.default A src/mainboard/dell/snb_ivb_latitude/cmos.layout A src/mainboard/dell/snb_ivb_latitude/devicetree.cb A src/mainboard/dell/snb_ivb_latitude/dsdt.asl A src/mainboard/dell/snb_ivb_latitude/gma-mainboard.ads A src/mainboard/dell/snb_ivb_latitude/mainboard.c A src/mainboard/dell/snb_ivb_latitude/variants/e6430/data.vbt A src/mainboard/dell/snb_ivb_latitude/variants/e6430/early_init.c A src/mainboard/dell/snb_ivb_latitude/variants/e6430/gpio.c A src/mainboard/dell/snb_ivb_latitude/variants/e6430/hda_verb.c A src/mainboard/dell/snb_ivb_latitude/variants/e6430/overridetree.cb 18 files changed, 591 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/77444/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/77444?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908 Gerrit-Change-Number: 77444 Gerrit-PatchSet: 12 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Iru Cai <mytbk920423(a)gmail.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: mb/dell: Add Latitude E6530 (Ivy Bridge)
by Nicholas Chin (Code Review) 01 May '24

01 May '24

Attention is currently required from: Paul Menzel. Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79012?usp=email ) Change subject: mb/dell: Add Latitude E6530 (Ivy Bridge) ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79012/comment/83ea4126_b34dd755 : PS2, Line 10: I created the port : based on autoport output and sent to me > s/and sent to me/sent to me from someone with device access/ Ack. I reworded those sections in all the commit messages in the patchtrain. File src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt: PS2: > Is this also from autoport? Would be nice if you could document the vendor system firmware version t […] Done. I also addressed this in the rest of the ports. Autoport doesn't currently pull the vbt; most of the vbt files in these ports were manually pulled from `/sys/kernel/debug/dri/0/i915_vbt`. -- To view, visit https://review.coreboot.org/c/coreboot/+/79012?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9fcd73416018574f8934962f92c8222d0101cb71 Gerrit-Change-Number: 79012 Gerrit-PatchSet: 3 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 01 May 2024 20:17:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/dell: Add Latitude E6430 (Ivy Bridge)
by Nicholas Chin (Code Review) 01 May '24

01 May '24

Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel. Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77444?usp=email ) Change subject: mb/dell: Add Latitude E6430 (Ivy Bridge) ...................................................................... Patch Set 11: (4 comments) File src/mainboard/dell/snb_ivb_latitude/devicetree.cb: PS10: > Missing license header Done File src/mainboard/dell/snb_ivb_latitude/dsdt.asl: https://review.coreboot.org/c/coreboot/+/77444/comment/5b97f8be_5f4c4f39 : PS10, Line 3: /* SPDX-License-Identifier: GPL-2.0-only */ > Move license header before the others Done. It's probably a quirk in autoport where the license header function gets called to late (side note, I think the way autoport is structured with all text inline with the code makes it more difficult to make updates to the output format when things change). It seems like those defines are only really relevant to the the ThinkPads, so I just removed them. File src/mainboard/dell/snb_ivb_latitude/gma-mainboard.ads: https://review.coreboot.org/c/coreboot/+/77444/comment/b7415cc9_f095b271 : PS10, Line 14: DP2, -- dock DP : DP3, -- dock DP > Add HDMI for dock DVI ports Done File src/mainboard/dell/snb_ivb_latitude/variants/e6430/overridetree.cb: PS10: > Missing license header Done. It should also be fixed in the rest of the ports now. -- To view, visit https://review.coreboot.org/c/coreboot/+/77444?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908 Gerrit-Change-Number: 77444 Gerrit-PatchSet: 11 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Iru Cai <mytbk920423(a)gmail.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 01 May 2024 20:14:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/dell: Add Latitude E6230 (Ivy Bridge)
by Nicholas Chin (Code Review) 01 May '24

01 May '24

Nicholas Chin has uploaded a new patch set (#3). ( https://review.coreboot.org/c/coreboot/+/82153?usp=email ) Change subject: mb/dell: Add Latitude E6230 (Ivy Bridge) ...................................................................... mb/dell: Add Latitude E6230 (Ivy Bridge) This was adapted from CB:22693 from Iru Cai, which was based on autoport. I do not physically have this system. This new version has not been tested. The EC is the SMSC MEC5055, which seems to be compatible with the existing MEC5035 code. As with the other Dell systems with this EC, this board is assumed to be internally flashable using an EC command that tells it to pull the FDO pin low on the next boot, which also tells the vendor firmware to disable all write protections to the flash [1]. [1] https://gitlab.com/nic3-14159/dell-flash-unlock Original-Change-Id: I8cdc01e902e670310628809416290045c2102340 Change-Id: I32927beea7c29b96a851ab77ed15b0160f16d369 Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- M src/mainboard/dell/snb_ivb_latitude/Kconfig M src/mainboard/dell/snb_ivb_latitude/Kconfig.name A src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c A src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c A src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c A src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb 6 files changed, 286 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/82153/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/82153?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I32927beea7c29b96a851ab77ed15b0160f16d369 Gerrit-Change-Number: 82153 Gerrit-PatchSet: 3 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: mb/dell: Add Latitude E6330 (Ivy Bridge)
by Nicholas Chin (Code Review) 01 May '24

01 May '24

Nicholas Chin has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/82152?usp=email ) Change subject: mb/dell: Add Latitude E6330 (Ivy Bridge) ...................................................................... mb/dell: Add Latitude E6330 (Ivy Bridge) Mainboard is QAL70/LA-7741P. I do not physically have this system; someone with physical access to one sent me the output of autoport which I then modified to produce this port. I was also sent the VBT binary, which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running version A21 of the vendor firmware. This port has not been tested. The EC is the SMSC MEC5055, which seems to be compatible with the existing MEC5035 code. As with the other Dell systems with this EC, this board is assumed to be internally flashable using an EC command that tells it to pull the FDO pin low on the next boot, which also tells the vendor firmware to disable all write protections to the flash [1]. [1] https://gitlab.com/nic3-14159/dell-flash-unlock Change-Id: I827826e9ff8a9a534c50250458b399104478e06c Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- M src/mainboard/dell/snb_ivb_latitude/Kconfig M src/mainboard/dell/snb_ivb_latitude/Kconfig.name A src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt A src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c A src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c A src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c A src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb 7 files changed, 287 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/82152/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82152?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I827826e9ff8a9a534c50250458b399104478e06c Gerrit-Change-Number: 82152 Gerrit-PatchSet: 2 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: mb/dell: Add Latitude E6220 (Sandy Bridge)
by Nicholas Chin (Code Review) 01 May '24

01 May '24

Nicholas Chin has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/82131?usp=email ) Change subject: mb/dell: Add Latitude E6220 (Sandy Bridge) ...................................................................... mb/dell: Add Latitude E6220 (Sandy Bridge) Mainboard is codenamed Vida. I do not physically have this system; someone with physical access to one sent me the output of autoport which I then modified to produce this port. This port has not been tested. The EC is the SMSC MEC5055, which seems to be compatible with the existing MEC5035 code. As with the other Dell systems with this EC, this board is assumed to be internally flashable using an EC command that tells it to pull the FDO pin low on the next boot, which also tells the vendor firmware to disable all write protections to the flash [1]. [1] https://gitlab.com/nic3-14159/dell-flash-unlock Change-Id: I570023b0837521b75aac6d5652c74030c06b8a4c Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- M src/mainboard/dell/snb_ivb_latitude/Kconfig M src/mainboard/dell/snb_ivb_latitude/Kconfig.name A src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c A src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c A src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c A src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb 6 files changed, 285 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/82131/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82131?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I570023b0837521b75aac6d5652c74030c06b8a4c Gerrit-Change-Number: 82131 Gerrit-PatchSet: 2 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: mb/dell: Add Latitude E6320 (Sandy Bridge)
by Nicholas Chin (Code Review) 01 May '24

01 May '24

Nicholas Chin has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/82130?usp=email ) Change subject: mb/dell: Add Latitude E6320 (Sandy Bridge) ...................................................................... mb/dell: Add Latitude E6320 (Sandy Bridge) Mainboard is PAL70/LA-6611P. I do not physically have this system; someone with physical access to one sent me the output of autoport which I then modified to produce this port. I was also sent the VBT binary, which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running version A22 of the vendor firmware. This port has not been tested. The EC is the SMSC MEC5055, which seems to be compatible with the existing MEC5035 code. As with the other Dell systems with this EC, this board is assumed to be internally flashable using an EC command that tells it to pull the FDO pin low on the next boot, which also tells the vendor firmware to disable all write protections to the flash [1]. [1] https://gitlab.com/nic3-14159/dell-flash-unlock Change-Id: I5905f8c6a8dbad56e03bdeedc2179600d0c4ba46 Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- M src/mainboard/dell/snb_ivb_latitude/Kconfig M src/mainboard/dell/snb_ivb_latitude/Kconfig.name A src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt A src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c A src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c A src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c A src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb 7 files changed, 281 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/82130/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82130?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5905f8c6a8dbad56e03bdeedc2179600d0c4ba46 Gerrit-Change-Number: 82130 Gerrit-PatchSet: 2 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: mb/dell: Add Latitude E5420 (Sandy Bridge)
by Nicholas Chin (Code Review) 01 May '24

01 May '24

Nicholas Chin has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/82129?usp=email ) Change subject: mb/dell: Add Latitude E5420 (Sandy Bridge) ...................................................................... mb/dell: Add Latitude E5420 (Sandy Bridge) Mainboard is Krug 14". I do not physically have this system; someone with physical access to one sent me the output of autoport which I then modified to produce this port. I was also sent the VBT binary, which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running version A02 of the vendor firmware. This was originally tested and found to be working as a standalone board port in Libreboot, but this variant based port in upstream coreboot has not been tested. This can be internally flashed by sending a command to the EC, which causes the EC to pull the FDO pin low and the firmware to skip setting up any chipset based write protections [1]. The EC is the SMSC MEC5055, which seems to be compatible with the existing MEC5035 code. [1] https://gitlab.com/nic3-14159/dell-flash-unlock Change-Id: I0283653156083768e1fd451bcf539b4e028589f4 Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- M src/mainboard/dell/snb_ivb_latitude/Kconfig M src/mainboard/dell/snb_ivb_latitude/Kconfig.name A src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt A src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c A src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c A src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c A src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb 7 files changed, 290 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/82129/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82129?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0283653156083768e1fd451bcf539b4e028589f4 Gerrit-Change-Number: 82129 Gerrit-PatchSet: 2 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2024