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Change subject: drivers/crb: Check for PTT before attempting to initialize CRB TPM
......................................................................
Patch Set 2: Code-Review+2
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Change subject: drivers/pc80/tpm: Disable device if TPM not present
......................................................................
Patch Set 4:
(1 comment)
File src/drivers/pc80/tpm/tis.c:
https://review.coreboot.org/c/coreboot/+/80455/comment/b6cdbe10_dd8a92a1 :
PS3, Line 911: &family
> `NULL` can be used instead.
Done
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Change subject: drivers/crb: Disable device if CRB TPM not present
......................................................................
Patch Set 3:
(1 comment)
File src/drivers/crb/tis.c:
https://review.coreboot.org/c/coreboot/+/80454/comment/39650653_893defe6 :
PS2, Line 212: &family
> You can use `NULL` now.
Done
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Change subject: drivers/pc80/tpm: Disable device if TPM not present
......................................................................
drivers/pc80/tpm: Disable device if TPM not present
If the TPM is not detected in the system it may mean it is inactive
due to enabled ME with active PTT. In such case, the chipset will route
the TPM traffic to PTT CRB TPM on Intel systems.
If TPM is not probed, disable the PC80 TPM device driver, so that
coreboot will not generate improper SSDT ACPI table.
Change-Id: I05972ad74a36abaafa2f17a16f09710550a3a3f3
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
---
M src/drivers/pc80/tpm/tis.c
1 file changed, 9 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/80455/4
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Hello Christian Walter, Sergii Dmytruk, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: drivers/crb: Disable device if CRB TPM not present
......................................................................
drivers/crb: Disable device if CRB TPM not present
If CRB TPM is not detected in the system it may mean it is inactive
due to disabled or neutered ME. In such case, the chipset will route
the TPM traffic to LPC/SPI on Intel systems.
If CRB TPM is not probed, disable the CRB TPM device driver, so that
coreboot will not generate improper SMBIOS/SSDT ACPI tables.
Change-Id: Ie0928536d9042b1f680d585e1ca9ad2cadf0c8ef
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
---
M src/drivers/crb/tis.c
1 file changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/80454/3
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Change subject: block/fast_spi: Use read32p/write32p for spi rw
......................................................................
block/fast_spi: Use read32p/write32p for spi rw
The current fast_spi impl. uses memcpy for rw. The memcpy impl. for
x86_64 changed to 8 byte copy and due to 4 byte limit, spi rw fails. MRC
cache rw regression observed in existing X86_64 platforms. Hence update
rw ops to use read32p/write32p.
BUG=b:242829490
TEST=Build and boot mtl 64-bit and verified MRC cache working.
Change-Id: I317c7160bf192dd2aeacebf6029a809bc97f3420
Signed-off-by: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com>
---
M src/soc/intel/common/block/fast_spi/fast_spi_flash.c
1 file changed, 30 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/82079/2
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Change subject: commonlib/bsd/cbfs_serialized: Remove condition on old gcc version
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Change subject: bsd/cbfs_serialized: Check the cbfs_file size also when using clang
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