coreboot-gerrit April 2024

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[XS] Change in coreboot[main]: mb/google/nissa/var/anraggar: Set EN_SPK_PA to low to avoid noise
by Jianeng Ceng (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jianeng Ceng, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik, Weimin Wu. Jianeng Ceng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81629?usp=email ) Change subject: mb/google/nissa/var/anraggar: Set EN_SPK_PA to low to avoid noise ...................................................................... Patch Set 5: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/81629?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5982be5a8d965086b46861f4c2c758d9bdee6e75 Gerrit-Change-Number: 81629 Gerrit-PatchSet: 5 Gerrit-Owner: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Wed, 03 Apr 2024 14:26:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: [Test-only]
by Jianeng Ceng (Code Review) 03 Apr '24

03 Apr '24

Jianeng Ceng has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81660?usp=email ) Change subject: [Test-only] ...................................................................... [Test-only] Change-Id: I0e25863e720f247bc2813e40e29dcbb984973084 Signed-off-by: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> --- A src/drivers/generic/rt5645/Kconfig A src/drivers/generic/rt5645/Makefile.inc A src/drivers/generic/rt5645/chip.h A src/drivers/generic/rt5645/rt5645.c M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/anraggar/overridetree.cb 6 files changed, 94 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/81660/1 diff --git a/src/drivers/generic/rt5645/Kconfig b/src/drivers/generic/rt5645/Kconfig new file mode 100644 index 0000000..a86d802 --- /dev/null +++ b/src/drivers/generic/rt5645/Kconfig @@ -0,0 +1,3 @@ +config DRIVERS_GENERIC_RT5645 + bool + depends on HAVE_ACPI_TABLES diff --git a/src/drivers/generic/rt5645/Makefile.inc b/src/drivers/generic/rt5645/Makefile.inc new file mode 100644 index 0000000..56f1601 --- /dev/null +++ b/src/drivers/generic/rt5645/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_DRIVERS_GENERIC_RT5645) += rt5645.c diff --git a/src/drivers/generic/rt5645/chip.h b/src/drivers/generic/rt5645/chip.h new file mode 100644 index 0000000..fdbccf6 --- /dev/null +++ b/src/drivers/generic/rt5645/chip.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi_device.h> + +struct drivers_generic_rt5645_config { + const char *hid; /* ACPI _HID */ + struct acpi_gpio sleeve; /* sleeve power gate GPIO */ +}; diff --git a/src/drivers/generic/rt5645/rt5645.c b/src/drivers/generic/rt5645/rt5645.c new file mode 100644 index 0000000..697d4f0 --- /dev/null +++ b/src/drivers/generic/rt5645/rt5645.c @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi_device.h> +#include <acpi/acpigen.h> +#include <console/console.h> +#include <device/device.h> +#include <device/path.h> +#include "chip.h" + +#define RT5645_ACPI_NAME "RT58" + +static void rt5645_fill_ssdt(const struct device *dev) +{ + struct drivers_generic_rt5645_config *config = dev->chip_info; + const char *path; + struct acpi_dp *dp; + + if (!config) + return; + + const char *scope = acpi_device_scope(dev); + const char *name = acpi_device_name(dev); + if (!scope || !name) + return; + + /* Device */ + acpigen_write_scope(scope); + acpigen_write_device(name); + + if (config->hid) + acpigen_write_name_string("_HID", config->hid); + else + acpigen_write_name_string("_HID", "10EC5650"); + acpigen_write_name_integer("_UID", 0); + acpigen_write_name_string("_DDN", dev->chip_ops->name); + acpigen_write_STA(acpi_device_status(dev)); + + /* Resources */ + acpigen_write_name("_CRS"); + acpigen_write_resourcetemplate_header(); + acpi_device_write_gpio(&config->sleeve); + acpigen_write_resourcetemplate_footer(); + + /* _DSD for devicetree properties */ + /* This points to the first pin in the first gpio entry in _CRS */ + path = acpi_device_path(dev); + dp = acpi_dp_new_table("_DSD"); + acpi_dp_add_gpio(dp, "cbj-sleeve-gpios", path, 0, 0, config->sleeve.active_low); + acpi_dp_write(dp); + + acpigen_pop_len(); /* Device */ + acpigen_pop_len(); /* Scope */ + + printk(BIOS_INFO, "%s: %s\n", path, dev->chip_ops->name); +} + +static const char *rt5645_acpi_name(const struct device *dev) +{ + return RT5645_ACPI_NAME; +} + +static struct device_operations rt5645_ops = { + .read_resources = noop_read_resources, + .set_resources = noop_set_resources, + .acpi_name = rt5645_acpi_name, + .acpi_fill_ssdt = rt5645_fill_ssdt, +}; + +static void rt5645_enable(struct device *dev) +{ + dev->ops = &rt5645_ops; +} + +struct chip_operations drivers_generic_rt5645_ops = { + CHIP_NAME("ASoC RT5645 Codec driver") + .enable_dev = rt5645_enable +}; diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 160d12a..0c629d8 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -2,6 +2,7 @@ config BOARD_GOOGLE_BRYA_COMMON def_bool n + select DRIVERS_GENERIC_RT5645 select DRIVERS_GENERIC_ALC1015 select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_MAX98357A diff --git a/src/mainboard/google/brya/variants/anraggar/overridetree.cb b/src/mainboard/google/brya/variants/anraggar/overridetree.cb index c7942c1..4da0a04 100644 --- a/src/mainboard/google/brya/variants/anraggar/overridetree.cb +++ b/src/mainboard/google/brya/variants/anraggar/overridetree.cb @@ -359,6 +359,10 @@ register "property_list[0].integer" = "2" device i2c 1a on end end + chip drivers/generic/rt5645 + register "hid" = ""10EC5650"" + register "sleeve" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)" + end end device ref i2c5 on chip drivers/i2c/hid -- To view, visit https://review.coreboot.org/c/coreboot/+/81660?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0e25863e720f247bc2813e40e29dcbb984973084 Gerrit-Change-Number: 81660 Gerrit-PatchSet: 1 Gerrit-Owner: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: Kconfig: Reverse ARCH_SUPPORTS_CLANG
by Arthur Heymans (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Julius Werner, Jérémy Compostella, Philipp Hug, ron minnich. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81659?usp=email ) Change subject: Kconfig: Reverse ARCH_SUPPORTS_CLANG ...................................................................... Kconfig: Reverse ARCH_SUPPORTS_CLANG Since most targets support clang it's easier to reverse the semantics of the Kconfig options. Change-Id: Ib28e7a4cb286b9f8b05be94dae3947179f43c746 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/Kconfig M src/arch/arm/Kconfig M src/arch/arm64/Kconfig M src/arch/ppc64/Kconfig M src/arch/riscv/Kconfig M src/arch/x86/Kconfig 6 files changed, 5 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/81659/1 diff --git a/src/Kconfig b/src/Kconfig index 645d16c..9045015 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -74,7 +74,7 @@ config COMPILER_LLVM_CLANG bool "LLVM/clang" - depends on ALLOW_EXPERIMENTAL_CLANG || ARCH_SUPPORTS_CLANG + depends on ALLOW_EXPERIMENTAL_CLANG || !CLANG_UNSUPPORTED help Use LLVM/clang to build coreboot. To use this, you must build the coreboot version of the clang compiler. Run the command @@ -85,7 +85,7 @@ endchoice -config ARCH_SUPPORTS_CLANG +config CLANG_UNSUPPORTED bool help Opt-in flag for architectures that generally work well with CLANG. @@ -93,7 +93,7 @@ config ALLOW_EXPERIMENTAL_CLANG bool "Allow experimental LLVM/Clang" - depends on !ARCH_SUPPORTS_CLANG + depends on CLANG_UNSUPPORTED help On some architectures CLANG does not work that well. Use this only to try to get CLANG working. diff --git a/src/arch/arm/Kconfig b/src/arch/arm/Kconfig index 64fe915..0829dcb 100644 --- a/src/arch/arm/Kconfig +++ b/src/arch/arm/Kconfig @@ -2,6 +2,7 @@ config ARCH_ARM bool + select CLANG_UNSUPPORTED config ARCH_BOOTBLOCK_ARM bool diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig index 9b89c37..1a90308 100644 --- a/src/arch/arm64/Kconfig +++ b/src/arch/arm64/Kconfig @@ -2,6 +2,7 @@ config ARCH_ARM64 bool + select CLANG_UNSUPPORTED config ARCH_BOOTBLOCK_ARM64 bool diff --git a/src/arch/ppc64/Kconfig b/src/arch/ppc64/Kconfig index 93e4929..25a0f50 100644 --- a/src/arch/ppc64/Kconfig +++ b/src/arch/ppc64/Kconfig @@ -2,7 +2,6 @@ config ARCH_PPC64 bool - select ARCH_SUPPORTS_CLANG config ARCH_BOOTBLOCK_PPC64 bool diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig index b570b01..66c64c2 100644 --- a/src/arch/riscv/Kconfig +++ b/src/arch/riscv/Kconfig @@ -10,7 +10,6 @@ config ARCH_RISCV bool - select ARCH_SUPPORTS_CLANG if ARCH_RISCV diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index d2ae320..03c4827 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -5,7 +5,6 @@ select PCI select RELOCATABLE_MODULES select HAVE_ASAN_IN_RAMSTAGE - select ARCH_SUPPORTS_CLANG if ARCH_X86 -- To view, visit https://review.coreboot.org/c/coreboot/+/81659?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib28e7a4cb286b9f8b05be94dae3947179f43c746 Gerrit-Change-Number: 81659 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: arch/arm: Build test all arm targets with clang
by Arthur Heymans (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Julius Werner, Paul Menzel. Hello Julius Werner, Martin L Roth, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69747?usp=email to look at the new patch set (#21). Change subject: arch/arm: Build test all arm targets with clang ...................................................................... arch/arm: Build test all arm targets with clang Some targets cannot be supported by clang as clang generates slightly larger binaries which the hardware won't accept. Other targets need more aggressive size optimization in the bootblock. Change-Id: I88cf8ce16fb6c61c19d615e396f5871179b06fc8 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/arm/Kconfig M src/soc/nvidia/tegra124/Makefile.mk M src/soc/qualcomm/ipq40xx/Makefile.mk M src/soc/qualcomm/ipq806x/Kconfig 4 files changed, 12 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/69747/21 -- To view, visit https://review.coreboot.org/c/coreboot/+/69747?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I88cf8ce16fb6c61c19d615e396f5871179b06fc8 Gerrit-Change-Number: 69747 Gerrit-PatchSet: 21 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: mb/google/brya: Sort Kconfig option alphabetically
by Varshit Pandya (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81631?usp=email ) Change subject: mb/google/brya: Sort Kconfig option alphabetically ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/brya/Kconfig: https://review.coreboot.org/c/coreboot/+/81631/comment/39806200_4ed246a0 : PS2, Line 135: select INTEL_GMA_HAVE_VBT > after line 135? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81631?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I878c14058e1edc0f64e37c2fc16b8dcf75b90192 Gerrit-Change-Number: 81631 Gerrit-PatchSet: 3 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 03 Apr 2024 14:21:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/google/brya: Sort Kconfig option alphabetically
by Varshit Pandya (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Varshit Pandya. Hello Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81631?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/brya: Sort Kconfig option alphabetically ...................................................................... mb/google/brya: Sort Kconfig option alphabetically Change-Id: I878c14058e1edc0f64e37c2fc16b8dcf75b90192 Signed-off-by: Varshit Pandya <pandyavarshit(a)gmail.com> --- M src/mainboard/google/brya/Kconfig 1 file changed, 153 insertions(+), 153 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/81631/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/81631?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I878c14058e1edc0f64e37c2fc16b8dcf75b90192 Gerrit-Change-Number: 81631 Gerrit-PatchSet: 3 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: mb/google/brya: Sort Kconfig option alphabetically
by Subrata Banik (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Varshit Pandya. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81631?usp=email ) Change subject: mb/google/brya: Sort Kconfig option alphabetically ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/brya/Kconfig: https://review.coreboot.org/c/coreboot/+/81631/comment/c3fd9f22_47a36f7e : PS2, Line 135: select INTEL_GMA_HAVE_VBT after line 135? -- To view, visit https://review.coreboot.org/c/coreboot/+/81631?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I878c14058e1edc0f64e37c2fc16b8dcf75b90192 Gerrit-Change-Number: 81631 Gerrit-PatchSet: 2 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 03 Apr 2024 14:12:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/screebo: Add FW_CONFIG and device for VPU
by Subrata Banik (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jamie Ryu, Kapil Porwal, Tarun, YH Lin. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81560?usp=email ) Change subject: mb/google/screebo: Add FW_CONFIG and device for VPU ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81560?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6d7b35dbf8ac9b0abb42f64a947b4bb94f3c6b0f Gerrit-Change-Number: 81560 Gerrit-PatchSet: 2 Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Daniel Kang <daniel.h.kang(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: YH Lin <yueherngl(a)google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Wed, 03 Apr 2024 14:08:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: security/tpm: make tis_probe() return tpm_family
by Sergii Dmytruk (Code Review) 03 Apr '24

03 Apr '24

Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69159?usp=email ) Change subject: security/tpm: make tis_probe() return tpm_family ...................................................................... Patch Set 27: (1 comment) Patchset: PS27: > With this patch we get problems on timeless build with mainboard siemens/mc_ehl1. […] I tried building the board with `BUILD_TIMELESS=1` set and it succeeded but of course you probably customize config. Also don't see timeless build affecting section sizes. This patch doesn't add much code (some parameters and an error string), so you were probably running out of space there and many things could have caused the overlap (like toolchain changes) and it just happened to be this change. I don't really see what could be thrown away to reduce size (would returning a struct instead of using output parameter help?). I'd look into why timeless builds have tighter space requirements and whether that could be lifted. -- To view, visit https://review.coreboot.org/c/coreboot/+/69159?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5006e0cdfef76ff79ce9e1cf280fcd5515ae01b0 Gerrit-Change-Number: 69159 Gerrit-PatchSet: 27 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Comment-Date: Wed, 03 Apr 2024 13:49:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: acpi: Move acpigen_write_OSC_pci_domain to Xeon-SP
by Felix Held (Code Review) 03 Apr '24

03 Apr '24

Attention is currently required from: Arthur Heymans, Christian Walter, Cliff Huang, Johnny Lin, Jonathan Zhang, Lance Zhao, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Shuo Liu, Tim Chu, Tim Wawrzynczak. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81652?usp=email ) Change subject: acpi: Move acpigen_write_OSC_pci_domain to Xeon-SP ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: since the acpi code seems to be part of the acpi spec (haven't checked, but the comments in the code suggest that), i'd be in favor of keeping this code in acpi/acpigen.c. i'd however like to not have weak function in the common code if that can be easily avoided which is the case here. i see two possibilities for this: pass the uint32_t osc feature flags as function argument or just remove the weak function implementations and require the soc code calling these functions to implement the get feature functions; socs hat don't call the 3 new functions won't need to implement the get feature functions, since those won't be called so the linker won't need the get feature functions to be resolvable symbols -- To view, visit https://review.coreboot.org/c/coreboot/+/81652?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia297e0a828f25b751032f18de04ec76f10131076 Gerrit-Change-Number: 81652 Gerrit-PatchSet: 1 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 03 Apr 2024 13:24:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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