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Change subject: soc/intel/xeon_sp/spr: Drop microcode constrains
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Is FSP-T used for this platform?
yes. But often FSP-T works just fine when it does not point to microcode. Probably worth adding a comment to bootblock.c
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Change subject: soc/intel/xeon_sp: Compress FSP-S
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Patch Set 1: Code-Review+2
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Change subject: soc/intel/xeon_sp/spr: Drop microcode constrains
......................................................................
Patch Set 1: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81635/comment/7fa03abc_c498638e :
PS1, Line 7: constrains
typo: constrain**t**s
Patchset:
PS1:
Is FSP-T used for this platform?
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Change subject: drivers/intel/fsp2_0: Support FSP 2.4 64-bits
......................................................................
drivers/intel/fsp2_0: Support FSP 2.4 64-bits
FSP 2.4 brings FSP 64-bits support which requires some adjustments in
coreboot:
- Stack alignment:
1. FSP functions must be called with the stack 16-bytes aligned.
This is already setup properly with the default value of the
`mpreferred-stack-boundary' compiler option (4).
2. The FSP stack buffer supplied by coreboot through the `StackBase'
UPD must be 16-bytes aligned.
- The EDK2 EFIAPI macro definition relies on compiler flags such as
__GNUC__ which is not working well when included by coreboot. While it
has no side-effect on i386 because the C calling convention used by
coreboot and FSP are the same, it breaks on x86_64 because FSP/UEFI
uses the Microsoft x64 calling convention while coreboot uses the
System V AMD64 ABI.
Fortunately, EDK2 header allows to override the EFIAPI
definition.
This appropriate attribute has to be set to all functions calling or
called by the FSP.
- Add FSP 2 Multi Processor Platform Initialization module a function
indirection to ensure that efi_ap_procedure functions are called with
the appropriate C calling convention.
- Add fsp print helper macros to print `efi_return_status_t' with the
appropriate format
- This commit adds a function indirection in MP PPI implementation to
ensure FSP callbacks are invoked using the appropriate C calling
convention.
BUG=b:329034258
TEST=verified on Lunar Lake RVP board (lnlrvp)
Change-Id: If0397f5cc8d0f4f1872bd37a001fe42e0c37ec99
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
---
D 3rdparty/vboot
M src/drivers/intel/fsp2_0/fsp_debug_event.c
M src/drivers/intel/fsp2_0/include/fsp/fsp_debug_event.h
M src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
M src/drivers/intel/fsp2_0/include/fsp/util.h
M src/drivers/intel/fsp2_0/ppi/mp_service1.c
M src/drivers/intel/fsp2_0/ppi/mp_service2.c
M src/include/efi/efi_datatype.h
8 files changed, 27 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/80277/33
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Change subject: drivers/intel/fsp2_0: Support FSP 2.4 64-bits
......................................................................
Patch Set 32:
(4 comments)
File src/drivers/intel/fsp2_0/include/fsp/info_header.h:
https://review.coreboot.org/c/coreboot/+/80277/comment/0ce26f59_60e01385 :
PS31, Line 15: #if CONFIG(PLATFORM_USES_FSP2_X86_32)
: struct fsp_header {
: uint32_t signature; //FSPH
: uint32_t header_length;
: uint8_t res1[2];
: uint8_t spec_version;
: uint8_t header_revision;
: uint32_t image_revision;
: char image_id[FSP_IMAGE_ID_LENGTH]; // not zero terminated
: uint32_t image_size;
: uint32_t image_base;
: uint16_t image_attribute;
: uint16_t component_attribute;
: uint32_t cfg_region_offset;
: uint32_t cfg_region_size;
: uint32_t res2;
: uint32_t temp_ram_init_entry_offset; //initial stack
: uint32_t res3;
: uint32_t notify_phase_entry_offset;
: uint32_t fsp_memory_init_entry_offset;
: uint32_t temp_ram_exit_entry_offset;
: uint32_t fsp_silicon_init_entry_offset;
: uint32_t fsp_multi_phase_si_init_entry_offset;
: uint16_t extended_image_revision;
: uint16_t res4;
: uint32_t fsp_multi_phase_mem_init_entry_offset;
: uint32_t res5;
: } __packed;
: #else
: #error You need to implement this struct for x86_64 FSP
: #endif
:
> should be a separate CL
Acknowledged
File src/drivers/intel/fsp2_0/include/fsp/soc_binding.h:
https://review.coreboot.org/c/coreboot/+/80277/comment/0f6bbee1_487e814a :
PS31, Line 10: #include <efi/efi_datatype.h>
> i'm not sure why we need this change
Will check and update
File src/drivers/intel/fsp2_0/memory_init.c:
https://review.coreboot.org/c/coreboot/+/80277/comment/2ba34a82_bbce7cab :
PS31, Line 37: static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(16);
> should be a separate CL
Acknowledged
File src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c:
https://review.coreboot.org/c/coreboot/+/80277/comment/7a780449_d18726a2 :
PS31, Line 15: struct efi_ap_procedure_caller_params {
> this file should put into a separate CL (nothing specific to 64-bit here, just calling convention ha […]
Acknowledged
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Change subject: vc/intel/fsp: Refactor FSP header inclusion for EDK2 compatibility
......................................................................
Patch Set 5:
(1 comment)
File src/vendorcode/intel/fsp/fsp2_0/IntelFspPkg/Include/FspInfoHeader.h:
https://review.coreboot.org/c/coreboot/+/81623/comment/887547b4_7c932bbf :
PS5, Line 7: vendorcode/intel/edk2/UDK2017/
> > > > > This prefix is used in other places in the tree. Can we use a Kconfig param for it that depends on the UDK kconfig? That would make this file trivial and same with vendorcode/intel/Makefile.mk
> > > >
> > > > can you please help to share a little more details which I can take as an incremental change.
> > > >
> > > > I'm sensing that you are asking to introduce a kconfig for each `UDK version` to mask the `vendorcode/intel/edk2/UDK2017` path ?
> > > >
> > > > Then, this file only includes only one header like
> > > >
> > > >
> > > > ```#include <CONFIG(UDK_PATH)/Include/Guid/FspHeaderFile.h>```
> > > >
> > > > UDK_PATH would depend on UDK configs like UDK_2017_VERSION etc.?
> > >
> > > Yes that would be my suggestion. It's used in other places (makefile) too so that's why I think it might be a good idea.
> >
> > sure, let me see if I can address it here or i will submit an incremental CL. sounds good to you ?
>
> Sure
question: wondering if we define a Kconfig with type string then we might ended up with double quote (which we might need to strip before concatenate for #include)?
```
config UDK_2017_PATH
string "vendorcode/intel/edk2/UDK2017"
#include <CONFIG(UDK_PATH)/Include/Guid/FspHeaderFile.h>
|
v
#include <"vendorcode/intel/edk2/UDK2017"/Include/Guid/FspHeaderFile.h>
```
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80277?usp=email )
Change subject: drivers/intel/fsp2_0: Support FSP 2.4 64-bits
......................................................................
Patch Set 31:
(4 comments)
File src/drivers/intel/fsp2_0/include/fsp/info_header.h:
https://review.coreboot.org/c/coreboot/+/80277/comment/ec81fa32_7f5b73e6 :
PS31, Line 15: #if CONFIG(PLATFORM_USES_FSP2_X86_32)
: struct fsp_header {
: uint32_t signature; //FSPH
: uint32_t header_length;
: uint8_t res1[2];
: uint8_t spec_version;
: uint8_t header_revision;
: uint32_t image_revision;
: char image_id[FSP_IMAGE_ID_LENGTH]; // not zero terminated
: uint32_t image_size;
: uint32_t image_base;
: uint16_t image_attribute;
: uint16_t component_attribute;
: uint32_t cfg_region_offset;
: uint32_t cfg_region_size;
: uint32_t res2;
: uint32_t temp_ram_init_entry_offset; //initial stack
: uint32_t res3;
: uint32_t notify_phase_entry_offset;
: uint32_t fsp_memory_init_entry_offset;
: uint32_t temp_ram_exit_entry_offset;
: uint32_t fsp_silicon_init_entry_offset;
: uint32_t fsp_multi_phase_si_init_entry_offset;
: uint16_t extended_image_revision;
: uint16_t res4;
: uint32_t fsp_multi_phase_mem_init_entry_offset;
: uint32_t res5;
: } __packed;
: #else
: #error You need to implement this struct for x86_64 FSP
: #endif
:
should be a separate CL
File src/drivers/intel/fsp2_0/include/fsp/soc_binding.h:
https://review.coreboot.org/c/coreboot/+/80277/comment/cfa3cfbb_40e34018 :
PS31, Line 10: #include <efi/efi_datatype.h>
i'm not sure why we need this change
File src/drivers/intel/fsp2_0/memory_init.c:
https://review.coreboot.org/c/coreboot/+/80277/comment/348207d6_9a9b8d8d :
PS31, Line 37: static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(16);
should be a separate CL
File src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c:
https://review.coreboot.org/c/coreboot/+/80277/comment/4d5cca3a_7b70ab5b :
PS31, Line 15: struct efi_ap_procedure_caller_params {
this file should put into a separate CL (nothing specific to 64-bit here, just calling convention has changed)
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Appukuttan V K has uploaded a new patch set (#32) to the change originally created by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/80277?usp=email )
Change subject: drivers/intel/fsp2_0: Support FSP 2.4 64-bits
......................................................................
drivers/intel/fsp2_0: Support FSP 2.4 64-bits
FSP 2.4 brings FSP 64-bits support which requires some adjustments in
coreboot:
- Stack alignment:
1. FSP functions must be called with the stack 16-bytes aligned.
This is already setup properly with the default value of the
`mpreferred-stack-boundary' compiler option (4).
2. The FSP stack buffer supplied by coreboot through the `StackBase'
UPD must be 16-bytes aligned.
- The EDK2 EFIAPI macro definition relies on compiler flags such as
__GNUC__ which is not working well when included by coreboot. While it
has no side-effect on i386 because the C calling convention used by
coreboot and FSP are the same, it breaks on x86_64 because FSP/UEFI
uses the Microsoft x64 calling convention while coreboot uses the
System V AMD64 ABI.
Fortunately, EDK2 header allows to override the EFIAPI
definition.
This appropriate attribute has to be set to all functions calling or
called by the FSP.
- Add FSP 2 Multi Processor Platform Initialization module a function
indirection to ensure that efi_ap_procedure functions are called with
the appropriate C calling convention.
- Add fsp print helper macros to print `efi_return_status_t' with the
appropriate format
- This commit adds a function indirection in MP PPI implementation to
ensure FSP callbacks are invoked using the appropriate C calling
convention.
BUG=b:329034258
TEST=verified on Lunar Lake RVP board (lnlrvp)
Change-Id: If0397f5cc8d0f4f1872bd37a001fe42e0c37ec99
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
---
D 3rdparty/vboot
M src/drivers/intel/fsp2_0/fsp_debug_event.c
M src/drivers/intel/fsp2_0/include/fsp/fsp_debug_event.h
M src/drivers/intel/fsp2_0/include/fsp/info_header.h
M src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
M src/drivers/intel/fsp2_0/include/fsp/util.h
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/ppi/mp_service1.c
M src/drivers/intel/fsp2_0/ppi/mp_service2.c
M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
M src/include/efi/efi_datatype.h
11 files changed, 60 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/80277/32
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