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Change subject: soc/intel/xeon_sp: Compress FSP-S
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81634/comment/d38da1dc_593cab26 :
PS1, Line 12: Test: Still boots on ibm/sbp1.
> That wasn't measured.
Per our check, the LZ4 decompression cost usually <1s, which should be acceptable in a server boot flow.
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Change subject: drivers/i2c/rt5645: Add i2c_acpi_write_gpio for public
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Hello Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Morgan Jang, Patrick Rudolph, Tim Chu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/81783?usp=email
to look at the new patch set (#3).
Change subject: soc/intel/xeon_sp: Remove MAINBOARD_USES_FSP2_0
......................................................................
soc/intel/xeon_sp: Remove MAINBOARD_USES_FSP2_0
MAINBOARD_USES_FSP2_0 selects PLATFORM_USES_FSP2_0 and
POSTCAR_STAGE which are used by all Xeon-SP platforms.
After the removal of MAINBOARD_USES_FSP2_0, PLATFORM_USES_FSP2_0
is implicitly selected by SoC Kconfigs in PLATFORM_USES_FSP2_X,
POSTCAR_STAGE is selected by XEON_SP_COMMON_BASE.
TSET=Build and boot on intel/archercity CRB
Change-Id: I45332d49dd21f9749fce458877777a4b783a1b11
Signed-off-by: Shuo Liu <shuo.liu(a)intel.com>
---
M src/mainboard/bytedance/bd_egs/Kconfig
M src/mainboard/ibm/sbp1/Kconfig
M src/mainboard/intel/archercity_crb/Kconfig
M src/mainboard/intel/cedarisland_crb/Kconfig
M src/mainboard/inventec/transformers/Kconfig
M src/mainboard/ocp/deltalake/Kconfig
M src/mainboard/ocp/tiogapass/Kconfig
M src/soc/intel/xeon_sp/Kconfig
M src/soc/intel/xeon_sp/skx/Kconfig
M src/soc/intel/xeon_sp/spr/Kconfig
10 files changed, 1 insertion(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/81783/3
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Change subject: tree: Drop unused <console/console.h>
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Patch Set 1: Code-Review+1
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Change subject: lenovo/haswell: enable ONBOARD_VGA_IS_PRIMARY
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
File src/mainboard/lenovo/haswell/Kconfig:
https://review.coreboot.org/c/coreboot/+/81645/comment/3f50ebdb_fdf233f9 :
PS1, Line 65: default y
I believe the W541 can use the dGPU as primary (it seems to have multiplexors). However, using the iGPU as primary by default shouldn't hurt: it's easier to initialise the iGPU, and people can still change this setting if they want to.
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Change subject: nb/haswell: Fully disable iGPU when dGPU is used
......................................................................
Patch Set 1:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81644/comment/d0461f6f_7d27d7c2 :
PS1, Line 9: My earlier patch
It's hard to know what "my earlier patch" refers to without reading the rest of the commit message first. So, I would preface the commit message with something like:
> This commit brings some parts of commit 1e2821882f (nb/haswell: Disable iGPU when dGPU is used) that were lost during review.
I'm not too inspired today, feel free to reword.
https://review.coreboot.org/c/coreboot/+/81644/comment/38b5dcbd_02762878 :
PS1, Line 11: you also need to disable the iGPU entirely.
> What do you mean by 'need to' ? Also a dGPU does not need to be on the PEG slot and probably works f […]
Without this patch, what happens on a system with both an iGPU and a dGPU?
https://review.coreboot.org/c/coreboot/+/81644/comment/611badf3_1c02676f :
PS1, Line 18: For more context, see:
:
: Author: Leah Rowe <info(a)minifree.org>
: Date: Fri Feb 23 13:33:31 2024 +0000
:
: nb/haswell: Disable iGPU when dGPU is used
:
: And now, look at the Gerrit comments for explanation:
:
: https://review.coreboot.org/c/coreboot/+/80717/
Please use commit hashes to reference stuff. I can't find a specific recommendation in the docs, but I think shortening hashes to the first 10 characters is OK. If not, I think the bot will complain.
> For more context, see commit 1e2821882f (nb/haswell: Disable iGPU when dGPU is used) and its review on Gerrit.
Notice how Gerrit highlights the commit part as a link? It's automatic 😊
https://review.coreboot.org/c/coreboot/+/81644/comment/484316e1_2beff0db :
PS1, Line 30: This patch fixes the issue. I tested on iGPU and dGPU, with both
: broadwell and haswell mrc.bin.
Please make sure that, when `CONFIG_ONBOARD_VGA_IS_PRIMARY=y` (used for Optimus setups):
- The iGPU is enabled and primary
- The dGPU is enabled
Even if the OptiPlex 9020 SFF is not an Optimus-enabled system, setting `CONFIG_ONBOARD_VGA_IS_PRIMARY=y` should still result in the same behaviour.
Patchset:
PS1:
I would earnestly appreciate a thorough description of the issue you're encountering.
File src/northbridge/intel/haswell/gma.c:
https://review.coreboot.org/c/coreboot/+/81644/comment/c1455e10_3c952c48 :
PS1, Line 469: Required
> It works when it's disabled? That might need additional context.
Please elaborate on "doesn't work".
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