coreboot-gerrit April 2024

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[XS] Change in coreboot[main]: soc/intel/lunarlake: Support stepping A0_2
by Saurabh Mishra (Code Review) 15 Apr '24

15 Apr '24

Attention is currently required from: Paul Menzel, Subrata Banik. Saurabh Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81847?usp=email ) Change subject: soc/intel/lunarlake: Support stepping A0_2 ...................................................................... Patch Set 3: (7 comments) Commit Message: PS2: > Just reading the commit message, I would have thought the diff to be different. […] ACK. https://review.coreboot.org/c/coreboot/+/81847/comment/65f610c2_13ccac2a : PS2, Line 7: soc/intel/{common, lunarlake}: Add support for new MCH > The prefix does not need to be the path. Maybe: […] ACK. https://review.coreboot.org/c/coreboot/+/81847/comment/e5d58c9b_8d3c6883 : PS2, Line 10: (ID:0x6410) > I’d write: … with id 0x640 […] Done https://review.coreboot.org/c/coreboot/+/81847/comment/8cb5fe71_10f971db : PS2, Line 10: The patch adds > “The patch” is redundant [1]. Just use the imperative mood: […] ACK. https://review.coreboot.org/c/coreboot/+/81847/comment/f233c9b8_1a1eb884 : PS2, Line 11: Add new CPU ID (ID:0xb06d1) > Add new CPU id 0xb06d1 ACK. https://review.coreboot.org/c/coreboot/+/81847/comment/97d6153c_7d410f6e : PS2, Line 16: TEST=Build and boot the system having MCH ID:0x6410. > Which log line is that? Updated. File src/include/device/pci_ids.h: https://review.coreboot.org/c/coreboot/+/81847/comment/bf42278b_611aded1 : PS2, Line 4292: #define PCI_DID_INTEL_LNL_M_ID_1 0x6410 > Name the above …1, and this one _2 for alignment reasons? ACK. -- To view, visit https://review.coreboot.org/c/coreboot/+/81847?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I976d7f269485633d835d204afa224736d71baaa8 Gerrit-Change-Number: 81847 Gerrit-PatchSet: 3 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 15 Apr 2024 13:53:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/intel/lunarlake: Support stepping A0_2
by Saurabh Mishra (Code Review) 15 Apr '24

15 Apr '24

Attention is currently required from: Saurabh Mishra, Subrata Banik. Hello Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81847?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/lunarlake: Support stepping A0_2 ...................................................................... soc/intel/lunarlake: Support stepping A0_2 Details: - Add support for new Lunar Lake MCH ID 0x6410 - Add new CPU id 0xb06d1 Reference: Lunar Lake External Design Specification Volume 1 (734362) TEST=Build, boot the system and verfiy below prints in bootblock stage. [DEBUG] MCH: device id 6410 (rev 02) is LunarLake M Change-Id: I976d7f269485633d835d204afa224736d71baaa8 Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com> --- M src/include/cpu/intel/cpu_ids.h M src/include/device/pci_ids.h M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/common/block/systemagent/systemagent.c 4 files changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/81847/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/81847?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I976d7f269485633d835d204afa224736d71baaa8 Gerrit-Change-Number: 81847 Gerrit-PatchSet: 3 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: soc/intel/common: Add Lunar Lake CNVI device IDs
by Saurabh Mishra (Code Review) 15 Apr '24

15 Apr '24

Attention is currently required from: Saurabh Mishra, Subrata Banik. Hello Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81846?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/common: Add Lunar Lake CNVI device IDs ...................................................................... soc/intel/common: Add Lunar Lake CNVI device IDs Reference: Lunar Lake External Design Specification Volume 1 (734362) Change-Id: I5a0a3fbc9f43a6a573e33fcf3901055e10faaed1 Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com> --- M src/soc/intel/common/block/cnvi/cnvi.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/81846/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/81846?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5a0a3fbc9f43a6a573e33fcf3901055e10faaed1 Gerrit-Change-Number: 81846 Gerrit-PatchSet: 3 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: superio/fintek/f81866d: Fix UART numbers
by Maxim (Code Review) 15 Apr '24

15 Apr '24

Maxim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81915?usp=email ) Change subject: superio/fintek/f81866d: Fix UART numbers ...................................................................... superio/fintek/f81866d: Fix UART numbers Change-Id: I996b8e56d943e26ab426f1802ada07cde805286d Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M src/superio/fintek/f81866d/f81866d.h 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/81915/1 diff --git a/src/superio/fintek/f81866d/f81866d.h b/src/superio/fintek/f81866d/f81866d.h index 4f81d5a..a31caa6 100644 --- a/src/superio/fintek/f81866d/f81866d.h +++ b/src/superio/fintek/f81866d/f81866d.h @@ -15,8 +15,8 @@ #define F81866D_SP2 0x11 /* UART2 */ #define F81866D_SP3 0x12 /* UART3 */ #define F81866D_SP4 0x13 /* UART4 */ -#define F81866D_SP5 0x14 /* UART3 */ -#define F81866D_SP6 0x15 /* UART4 */ +#define F81866D_SP5 0x14 /* UART5 */ +#define F81866D_SP6 0x15 /* UART6 */ #define F81866D_PP 0x03 /* Parallel Port */ #define F81866D_HWM 0x04 /* Hardware Monitor */ #define F81866D_KBC 0x05 /* Keyboard/Mouse */ -- To view, visit https://review.coreboot.org/c/coreboot/+/81915?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I996b8e56d943e26ab426f1802ada07cde805286d Gerrit-Change-Number: 81915 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: mb/google/fizz: Use variant-specific gma-mainboard.ads files
by Felix Held (Code Review) 15 Apr '24

15 Apr '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81901?usp=email ) Change subject: mb/google/fizz: Use variant-specific gma-mainboard.ads files ...................................................................... mb/google/fizz: Use variant-specific gma-mainboard.ads files The karma variant, being a Chromebase, has an internal eDP output for the built-in display whereas the fizz/endeavour variants do not. Use separate gma-mainboard.ads files so that karma's internal panel works properly with libgfxinit. TEST=build google/fizz (fizz/karma) with libgfxinit enabled, ensure correct gma-mainboard.ads file is included in the build. Change-Id: Ia6aca538ba8c13b48aa80901222071d704b5f0c0 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81901 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/fizz/Makefile.mk C src/mainboard/google/fizz/variants/endeavour/gma-mainboard.ads R src/mainboard/google/fizz/variants/fizz/gma-mainboard.ads A src/mainboard/google/fizz/variants/karma/gma-mainboard.ads 4 files changed, 20 insertions(+), 1 deletion(-) Approvals: Angel Pons: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/fizz/Makefile.mk b/src/mainboard/google/fizz/Makefile.mk index e192cff..6c20356 100644 --- a/src/mainboard/google/fizz/Makefile.mk +++ b/src/mainboard/google/fizz/Makefile.mk @@ -11,7 +11,7 @@ ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC) += ec.c ramstage-y += mainboard.c -ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads subdirs-y += variants/baseboard CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include diff --git a/src/mainboard/google/fizz/gma-mainboard.ads b/src/mainboard/google/fizz/variants/endeavour/gma-mainboard.ads similarity index 100% copy from src/mainboard/google/fizz/gma-mainboard.ads copy to src/mainboard/google/fizz/variants/endeavour/gma-mainboard.ads diff --git a/src/mainboard/google/fizz/gma-mainboard.ads b/src/mainboard/google/fizz/variants/fizz/gma-mainboard.ads similarity index 100% rename from src/mainboard/google/fizz/gma-mainboard.ads rename to src/mainboard/google/fizz/variants/fizz/gma-mainboard.ads diff --git a/src/mainboard/google/fizz/variants/karma/gma-mainboard.ads b/src/mainboard/google/fizz/variants/karma/gma-mainboard.ads new file mode 100644 index 0000000..fcfbd75 --- /dev/null +++ b/src/mainboard/google/fizz/variants/karma/gma-mainboard.ads @@ -0,0 +1,19 @@ +-- SPDX-License-Identifier: GPL-2.0-or-later + +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + + ports : constant Port_List := + (eDP, + DP1, + DP2, + HDMI1, + HDMI2, + others => Disabled); + +end GMA.Mainboard; -- To view, visit https://review.coreboot.org/c/coreboot/+/81901?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia6aca538ba8c13b48aa80901222071d704b5f0c0 Gerrit-Change-Number: 81901 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: sb/intel/bd82x6x: Add four new USB currents
by Felix Held (Code Review) 15 Apr '24

15 Apr '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81427?usp=email ) Change subject: sb/intel/bd82x6x: Add four new USB currents ...................................................................... sb/intel/bd82x6x: Add four new USB currents Found by inteltool on HP Pro 3500 Series running vendor firmware version 8.14 Rev.A. Change-Id: I156787e533c2605e7440548a2d3bf711bb1af5d7 Signed-off-by: Joel Linn <jl(a)conductive.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81427 Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/southbridge/intel/bd82x6x/early_usb.c 1 file changed, 2 insertions(+), 1 deletion(-) Approvals: Angel Pons: Looks good to me, but someone else must approve build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c index 35bfeca..6d3d096 100644 --- a/src/southbridge/intel/bd82x6x/early_usb.c +++ b/src/southbridge/intel/bd82x6x/early_usb.c @@ -18,7 +18,8 @@ }; const u32 currents[] = { USBIR_TXRX_GAIN_MOBILE_LOW, USBIR_TXRX_GAIN_DEFAULT, USBIR_TXRX_GAIN_HIGH, 0x20000f51, 0x2000094a, 0x2000035f, - USBIR_TXRX_GAIN_DESKTOP_LOW, 0x20000357, 0x20000353 }; + USBIR_TXRX_GAIN_DESKTOP_LOW, 0x20000357, 0x20000353, + 0x20000253, 0x20000053, 0x2000055f, 0x20000f5f}; int i; /* Unlock registers. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/81427?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I156787e533c2605e7440548a2d3bf711bb1af5d7 Gerrit-Change-Number: 81427 Gerrit-PatchSet: 5 Gerrit-Owner: Joel Linn <jl_coreboot(a)conductive.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: drivers/crb: use crb_tpm_ prefix instead of tpm2_
by Felix Held (Code Review) 15 Apr '24

15 Apr '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81860?usp=email ) Change subject: drivers/crb: use crb_tpm_ prefix instead of tpm2_ ...................................................................... drivers/crb: use crb_tpm_ prefix instead of tpm2_ This prevents name clashes with drivers/spi/tpm and allows both to be potentially compiled in at the same time. Change-Id: I0aa2686103546e0696ab8dcf77e2b99bf9734915 Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81860 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M src/acpi/acpi.c M src/drivers/crb/tis.c M src/drivers/crb/tpm.c M src/drivers/crb/tpm.h 4 files changed, 27 insertions(+), 27 deletions(-) Approvals: Julius Werner: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index c33d195..39eadc3 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -273,7 +273,7 @@ /* Hard to detect for coreboot. Just set it to 0 */ tpm2->platform_class = 0; - if (CONFIG(CRB_TPM) && tpm2_has_crb_active()) { + if (CONFIG(CRB_TPM) && crb_tpm_is_active()) { /* Must be set to 7 for CRB Support */ tpm2->control_area = CONFIG_CRB_TPM_BASE_ADDRESS + 0x40; tpm2->start_method = 7; diff --git a/src/drivers/crb/tis.c b/src/drivers/crb/tis.c index 04e255a..1b398f7 100644 --- a/src/drivers/crb/tis.c +++ b/src/drivers/crb/tis.c @@ -23,7 +23,7 @@ {0xa13a, 0x8086, "Intel iTPM"} }; -static const char *tis_get_dev_name(struct tpm2_info *info) +static const char *tis_get_dev_name(struct crb_tpm_info *info) { int i; @@ -36,7 +36,7 @@ static tpm_result_t crb_tpm_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, uint8_t *recvbuf, size_t *rbuf_len) { - int len = tpm2_process_command(sendbuf, sbuf_size, recvbuf, *rbuf_len); + int len = crb_tpm_process_command(sendbuf, sbuf_size, recvbuf, *rbuf_len); if (len == 0) return TPM_CB_FAIL; @@ -48,17 +48,17 @@ tis_sendrecv_fn tis_probe(enum tpm_family *family) { - struct tpm2_info info; + struct crb_tpm_info info; /* Wake TPM up (if necessary) */ - if (tpm2_init()) + if (crb_tpm_init()) return NULL; /* CRB interface exists only in TPM2 */ if (family != NULL) *family = TPM_2; - tpm2_get_info(&info); + crb_tpm_get_info(&info); printk(BIOS_INFO, "Initialized TPM device %s revision %d\n", tis_get_dev_name(&info), info.revision); @@ -137,7 +137,7 @@ static int smbios_write_type43_tpm(struct device *dev, int *handle, unsigned long *current) { - struct tpm2_info info; + struct crb_tpm_info info; uint32_t tpm_manuf, tpm_family; uint32_t fw_ver1, fw_ver2; uint8_t major_spec_ver, minor_spec_ver; @@ -145,7 +145,7 @@ if (tlcl_get_family() == TPM_1) return 0; - tpm2_get_info(&info); + crb_tpm_get_info(&info); /* If any of these have invalid values, assume TPM not present or disabled */ if (info.vendor_id == 0 || info.vendor_id == 0xFFFF || diff --git a/src/drivers/crb/tpm.c b/src/drivers/crb/tpm.c index b568dcc..ea5e701 100644 --- a/src/drivers/crb/tpm.c +++ b/src/drivers/crb/tpm.c @@ -54,7 +54,7 @@ * register before each command submission otherwise the control area * is all zeroed. This has been observed on Alder Lake S CPU and may be * applicable to other new microarchitectures. Update the local control - * area data to make tpm2_process_command not fail on buffer checks. + * area data to make crb_tpm_process_command() not fail on buffer checks. * PTT command/response buffer is fixed to be at offset 0x80 and spans * up to the end of 4KB region for the current locality. */ @@ -181,14 +181,14 @@ } /* - * tpm2_init + * crb_tpm_init * * Even though the TPM does not need an initialization we check * if the TPM responds and is in IDLE mode, which should be the * normal bring up mode. * */ -tpm_result_t tpm2_init(void) +tpm_result_t crb_tpm_init(void) { tpm_result_t rc = crb_probe(); if (rc) { @@ -227,10 +227,10 @@ } /* - * tpm2_process_command + * crb_tpm_process_command */ -size_t tpm2_process_command(const void *tpm2_command, size_t command_size, void *tpm2_response, - size_t max_response) +size_t crb_tpm_process_command(const void *tpm2_command, size_t command_size, + void *tpm2_response, size_t max_response) { tpm_result_t rc; @@ -312,24 +312,24 @@ * Returns information about the TPM * */ -void tpm2_get_info(struct tpm2_info *tpm2_info) +void crb_tpm_get_info(struct crb_tpm_info *crb_tpm_info) { uint64_t interfaceReg = read64(CRB_REG(cur_loc, CRB_REG_INTF_ID)); - tpm2_info->vendor_id = (interfaceReg >> 48) & 0xFFFF; - tpm2_info->device_id = (interfaceReg >> 32) & 0xFFFF; - tpm2_info->revision = (interfaceReg >> 24) & 0xFF; + crb_tpm_info->vendor_id = (interfaceReg >> 48) & 0xFFFF; + crb_tpm_info->device_id = (interfaceReg >> 32) & 0xFFFF; + crb_tpm_info->revision = (interfaceReg >> 24) & 0xFF; } /* - * tpm2_has_crb_active + * crb_tpm_is_active * * Checks that CRB interface is available and active. * * The body was derived from crb_probe() which unlike this function can also * write to registers. */ -bool tpm2_has_crb_active(void) +bool crb_tpm_is_active(void) { uint64_t tpmStatus = read64(CRB_REG(0, CRB_REG_INTF_ID)); printk(BIOS_SPEW, "Interface ID Reg. %llx\n", tpmStatus); diff --git a/src/drivers/crb/tpm.h b/src/drivers/crb/tpm.h index 60020c3..fbe3901 100644 --- a/src/drivers/crb/tpm.h +++ b/src/drivers/crb/tpm.h @@ -53,15 +53,15 @@ /* START Register related */ #define CRB_REG_START_START 0x01 -/* TPM Info Struct */ -struct tpm2_info { +/* CRB TPM Info Struct */ +struct crb_tpm_info { uint16_t vendor_id; uint16_t device_id; uint16_t revision; }; -tpm_result_t tpm2_init(void); -void tpm2_get_info(struct tpm2_info *tpm2_info); -size_t tpm2_process_command(const void *tpm2_command, size_t command_size, - void *tpm2_response, size_t max_response); -bool tpm2_has_crb_active(void); +tpm_result_t crb_tpm_init(void); +void crb_tpm_get_info(struct crb_tpm_info *crb_tpm_info); +size_t crb_tpm_process_command(const void *tpm2_command, size_t command_size, + void *tpm2_response, size_t max_response); +bool crb_tpm_is_active(void); -- To view, visit https://review.coreboot.org/c/coreboot/+/81860?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0aa2686103546e0696ab8dcf77e2b99bf9734915 Gerrit-Change-Number: 81860 Gerrit-PatchSet: 2 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: mb/google/brox: Create greenbayupoc variant
by Felix Held (Code Review) 15 Apr '24

15 Apr '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81565?usp=email ) Change subject: mb/google/brox: Create greenbayupoc variant ...................................................................... mb/google/brox: Create greenbayupoc variant Create the greenbayupoc variant of the brox reference board by copying the template files to a new directory named for the variant. BUG=b:329530883 BRANCH=None TEST=util/abuild/abuild -p none -t google/brox -x -a make sure the build includes GOOGLE_GREENBAYUPOC. Change-Id: I90936d97b41e59c49dd92997146caf580bce1f4f Signed-off-by: Eren Peng <peng.eren(a)inventec.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81565 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> Reviewed-by: Shelley Chen <shchen(a)google.com> --- M src/mainboard/google/brox/Kconfig M src/mainboard/google/brox/Kconfig.name A src/mainboard/google/brox/variants/greenbayupoc/include/variant/ec.h A src/mainboard/google/brox/variants/greenbayupoc/include/variant/gpio.h A src/mainboard/google/brox/variants/greenbayupoc/memory/Makefile.mk A src/mainboard/google/brox/variants/greenbayupoc/memory/dram_id.generated.txt A src/mainboard/google/brox/variants/greenbayupoc/memory/mem_parts_used.txt A src/mainboard/google/brox/variants/greenbayupoc/overridetree.cb 8 files changed, 52 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Shelley Chen: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/brox/Kconfig b/src/mainboard/google/brox/Kconfig index e7f965a..9bc71ca 100644 --- a/src/mainboard/google/brox/Kconfig +++ b/src/mainboard/google/brox/Kconfig @@ -64,6 +64,9 @@ select CHROMEOS_WIFI_SAR if CHROMEOS select SOC_INTEL_STORE_ISH_FW_VERSION +config BOARD_GOOGLE_GREENBAYUPOC + select BOARD_GOOGLE_BASEBOARD_BROX + if BOARD_GOOGLE_BROX_COMMON config BASEBOARD_DIR @@ -114,9 +117,11 @@ config MAINBOARD_PART_NUMBER default "Brox_Ec_Ish" if BOARD_GOOGLE_BROX_EC_ISH default "Brox" if BOARD_GOOGLE_BROX + default "Greenbayupoc" if BOARD_GOOGLE_GREENBAYUPOC config VARIANT_DIR default "brox" if BOARD_GOOGLE_BROX || BOARD_GOOGLE_BROX_EC_ISH + default "greenbayupoc" if BOARD_GOOGLE_GREENBAYUPOC config VBOOT select VBOOT_LID_SWITCH diff --git a/src/mainboard/google/brox/Kconfig.name b/src/mainboard/google/brox/Kconfig.name index 2ad3457..37fc310 100644 --- a/src/mainboard/google/brox/Kconfig.name +++ b/src/mainboard/google/brox/Kconfig.name @@ -7,3 +7,6 @@ config BOARD_GOOGLE_BROX_EC_ISH bool "-> Brox EC ISH" + +config BOARD_GOOGLE_GREENBAYUPOC + bool "-> Greenbayupoc" diff --git a/src/mainboard/google/brox/variants/greenbayupoc/include/variant/ec.h b/src/mainboard/google/brox/variants/greenbayupoc/include/variant/ec.h new file mode 100644 index 0000000..4fc0622 --- /dev/null +++ b/src/mainboard/google/brox/variants/greenbayupoc/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef MAINBOARD_EC_H +#define MAINBOARD_EC_H + +#include <baseboard/ec.h> + +#endif /* MAINBOARD_GPIO_H */ diff --git a/src/mainboard/google/brox/variants/greenbayupoc/include/variant/gpio.h b/src/mainboard/google/brox/variants/greenbayupoc/include/variant/gpio.h new file mode 100644 index 0000000..27c87b3 --- /dev/null +++ b/src/mainboard/google/brox/variants/greenbayupoc/include/variant/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __MAINBOARD_GPIO_H__ +#define __MAINBOARD_GPIO_H__ + +#include <baseboard/gpio.h> + +#endif /* __MAINBOARD_GPIO_H__ */ diff --git a/src/mainboard/google/brox/variants/greenbayupoc/memory/Makefile.mk b/src/mainboard/google/brox/variants/greenbayupoc/memory/Makefile.mk new file mode 100644 index 0000000..eace2e4 --- /dev/null +++ b/src/mainboard/google/brox/variants/greenbayupoc/memory/Makefile.mk @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. + +SPD_SOURCES = placeholder diff --git a/src/mainboard/google/brox/variants/greenbayupoc/memory/dram_id.generated.txt b/src/mainboard/google/brox/variants/greenbayupoc/memory/dram_id.generated.txt new file mode 100644 index 0000000..2e0f37a --- /dev/null +++ b/src/mainboard/google/brox/variants/greenbayupoc/memory/dram_id.generated.txt @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Generated by: +# ./util/spd_tools/bin/part_id_gen ADL lp5 src/mainboard/google/brox/variants/brox/memory src/mainboard/google/brox/variants/brox/memory/mem_parts_used.txt + +DRAM Part Name ID to assign diff --git a/src/mainboard/google/brox/variants/greenbayupoc/memory/mem_parts_used.txt b/src/mainboard/google/brox/variants/greenbayupoc/memory/mem_parts_used.txt new file mode 100644 index 0000000..2499005 --- /dev/null +++ b/src/mainboard/google/brox/variants/greenbayupoc/memory/mem_parts_used.txt @@ -0,0 +1,11 @@ +# This is a CSV file containing a list of memory parts used by this variant. +# One part per line with an optional fixed ID in column 2. +# Only include a fixed ID if it is required for legacy reasons! +# Generated IDs are dependent on the order of parts in this file, +# so new parts must always be added at the end of the file! +# +# Generate an updated Makefile.mk and dram_id.generated.txt by running the +# part_id_gen tool from util/spd_tools. +# See util/spd_tools/README.md for more details and instructions. + +# Part Name diff --git a/src/mainboard/google/brox/variants/greenbayupoc/overridetree.cb b/src/mainboard/google/brox/variants/greenbayupoc/overridetree.cb new file mode 100644 index 0000000..e707a9b --- /dev/null +++ b/src/mainboard/google/brox/variants/greenbayupoc/overridetree.cb @@ -0,0 +1,6 @@ +chip soc/intel/alderlake + + device domain 0 on + end + +end -- To view, visit https://review.coreboot.org/c/coreboot/+/81565?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I90936d97b41e59c49dd92997146caf580bce1f4f Gerrit-Change-Number: 81565 Gerrit-PatchSet: 6 Gerrit-Owner: Eren Peng <peng.eren(a)inventec.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Garen Wu <wu.garen(a)inventec.corp-partner.google.com> Gerrit-CC: Rasheed Hsueh <hsueh.rasheed(a)inventec.corp-partner.google.com> Gerrit-CC: Steven Yeh <yeh.stevenct(a)inventec.corp-partner.google.com> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: mb/google/corsola: Add new board variant Skitty
by Felix Held (Code Review) 15 Apr '24

15 Apr '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81772?usp=email ) Change subject: mb/google/corsola: Add new board variant Skitty ...................................................................... mb/google/corsola: Add new board variant Skitty Add a new Krabby follower device 'Skitty'. BUG=b:331702790 TEST=emerge-corsola coreboot chromeos-bootimage BRANCH=corsola Change-Id: I2f12bccfda591a5baf8d23d217b6f1f81b059d15 Signed-off-by: Herbert Wu <herbert1_wu(a)pegatron.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81772 Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Reviewed-by: Geoffrey Chien <geoffrey_chien(a)pegatron.corp-partner.google.com> Reviewed-by: Yidi Lin <yidilin(a)google.com> Reviewed-by: Shawn Ku <shawnku(a)google.com> --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/Kconfig.name 2 files changed, 6 insertions(+), 0 deletions(-) Approvals: Shawn Ku: Looks good to me, but someone else must approve Eric Lai: Looks good to me, approved Geoffrey Chien: Looks good to me, but someone else must approve build bot (Jenkins): Verified Herbert Wu: Looks good to me, but someone else must approve Yidi Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/corsola/Kconfig b/src/mainboard/google/corsola/Kconfig index ddc84ae..960d8f9 100644 --- a/src/mainboard/google/corsola/Kconfig +++ b/src/mainboard/google/corsola/Kconfig @@ -16,6 +16,7 @@ def_bool BOARD_GOOGLE_CHINCHOU || \ BOARD_GOOGLE_KRABBY || \ BOARD_GOOGLE_MAGIKARP || \ + BOARD_GOOGLE_SKITTY || \ BOARD_GOOGLE_TENTACRUEL config BOARD_GOOGLE_STARYU_COMMON @@ -58,6 +59,7 @@ BOARD_GOOGLE_VOLTORB select DRIVER_PARADE_PS8640 if BOARD_GOOGLE_KRABBY || \ BOARD_GOOGLE_MAGIKARP || \ + BOARD_GOOGLE_SKITTY || \ BOARD_GOOGLE_STEELIX || \ BOARD_GOOGLE_TENTACRUEL select RTC @@ -88,6 +90,7 @@ default "Ponyta" if BOARD_GOOGLE_PONYTA default "Chinchou" if BOARD_GOOGLE_CHINCHOU default "Wugtrio" if BOARD_GOOGLE_WUGTRIO + default "Skitty" if BOARD_GOOGLE_SKITTY config BOOT_DEVICE_SPI_FLASH_BUS int diff --git a/src/mainboard/google/corsola/Kconfig.name b/src/mainboard/google/corsola/Kconfig.name index af21979..a88be5b 100644 --- a/src/mainboard/google/corsola/Kconfig.name +++ b/src/mainboard/google/corsola/Kconfig.name @@ -31,6 +31,9 @@ config BOARD_GOOGLE_CHINCHOU bool "-> Chinchou" +config BOARD_GOOGLE_SKITTY + bool "-> Skitty" + comment "Staryu" config BOARD_GOOGLE_STARMIE -- To view, visit https://review.coreboot.org/c/coreboot/+/81772?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2f12bccfda591a5baf8d23d217b6f1f81b059d15 Gerrit-Change-Number: 81772 Gerrit-PatchSet: 9 Gerrit-Owner: Herbert Wu <herbert1_wu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Geoffrey Chien <geoffrey_chien(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Herbert Wu <herbert1_wu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Shawn Ku <shawnku(a)chromium.org> Gerrit-Reviewer: Shawn Ku <shawnku(a)google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: acpigen_ps2_keybd: Add support for dictation key
by Felix Held (Code Review) 15 Apr '24

15 Apr '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81863?usp=email ) Change subject: acpigen_ps2_keybd: Add support for dictation key ...................................................................... acpigen_ps2_keybd: Add support for dictation key Some internal keyboards have a dictation key; this commit simply adds support for this key by adding the mapping from the scancode to the Linux keycode for use in the linux,physmap ACPI table. BUG=b:333101631 TEST=Flash DUT that emits a scancode for a dictation key, verify that it is mapped to KEY_DICTATE in the Linux kernel. Change-Id: Iabc56662a9d6b29e84ab81ed93cb46d2e8372de9 Signed-off-by: Aseda Aboagye <aaboagye(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81863 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/acpi/acpigen_ps2_keybd.c M src/include/acpi/acpigen_ps2_keybd.h 2 files changed, 2 insertions(+), 0 deletions(-) Approvals: Nick Vaccaro: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/acpi/acpigen_ps2_keybd.c b/src/acpi/acpigen_ps2_keybd.c index 67e92a9..6590e66 100644 --- a/src/acpi/acpigen_ps2_keybd.c +++ b/src/acpi/acpigen_ps2_keybd.c @@ -56,6 +56,7 @@ [PS2_KEY_MICMUTE] = KEYMAP(0x9b, KEY_MICMUTE), /* e01b */ [PS2_KEY_KBD_BKLIGHT_TOGGLE] = KEYMAP(0x9e, KEY_KBDILLUMTOGGLE), /* e01e */ [PS2_KEY_MENU] = KEYMAP(0xdd, KEY_CONTROLPANEL), /* e0d5 */ + [PS2_KEY_DICTATE] = KEYMAP(0xa7, KEY_DICTATE), /* e027*/ }; /* Keymap for numeric keypad keys */ diff --git a/src/include/acpi/acpigen_ps2_keybd.h b/src/include/acpi/acpigen_ps2_keybd.h index bac991b..263eb05 100644 --- a/src/include/acpi/acpigen_ps2_keybd.h +++ b/src/include/acpi/acpigen_ps2_keybd.h @@ -27,6 +27,7 @@ PS2_KEY_KBD_BKLIGHT_TOGGLE, PS2_KEY_MICMUTE, PS2_KEY_MENU, + PS2_KEY_DICTATE, }; #define PS2_MIN_TOP_ROW_KEYS 2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81863?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iabc56662a9d6b29e84ab81ed93cb46d2e8372de9 Gerrit-Change-Number: 81863 Gerrit-PatchSet: 2 Gerrit-Owner: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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