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Hello Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/81955?usp=email
to look at the new patch set (#2).
Change subject: mb/google/nissa/var/glassway: Add New SPD ID for supported memory parts
......................................................................
mb/google/nissa/var/glassway: Add New SPD ID for supported memory parts
Add to support Memory for Hynix H58G66AK6BX070 and Samsung
K3KL9L90CM-MGCT in mem_parts_used list, and generate SPD ID for these
parts.
DRAM Part Name ID to assign
H58G66AK6BX070 4 (0100)
K3KL9L90CM-MGCT 5 (0101)
BUG=b:335341310
BRANCH=firmware-nissa-15217.B
TEST=Run command "go run ./util/spd_tools/src/part_id_gen/\
part_id_gen.go ADL lp5 \
src/mainboard/google/brya/variants/glassway/memory/ \
src/mainboard/google/brya/variants/glassway/memory/\
mem_parts_used.txt"
Change-Id: Ic07ec36a8015ce6433196a93e894b818a515b954
Signed-off-by: Daniel_Peng <Daniel_Peng(a)pegatron.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/glassway/memory/Makefile.mk
M src/mainboard/google/brya/variants/glassway/memory/dram_id.generated.txt
M src/mainboard/google/brya/variants/glassway/memory/mem_parts_used.txt
3 files changed, 8 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/81955/2
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Change subject: mb/google/nissa/var/glassway: Add New SPD ID for supported memory parts
......................................................................
Patch Set 1: Code-Review+1
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Change subject: mb/google/nissa/var/glassway: Add New SPD ID for supported memory parts
......................................................................
mb/google/nissa/var/glassway: Add New SPD ID for supported memory parts
Add to support Memory for Hynix H58G66AK6BX070 and Samsung K3KL9L90CM-MGCT
in mem_parts_used list, and generate SPD ID for these parts.
DRAM Part Name ID to assign
H58G66AK6BX070 4 (0100)
K3KL9L90CM-MGCT 5 (0101)
BUG=b:335341310
BRANCH=firmware-nissa-15217.B
TEST=Run command "go run ./util/spd_tools/src/part_id_gen/\
part_id_gen.go ADL lp5 \
src/mainboard/google/brya/variants/glassway/memory/ \
src/mainboard/google/brya/variants/glassway/memory/\
mem_parts_used.txt"
Change-Id: Ic07ec36a8015ce6433196a93e894b818a515b954
Signed-off-by: Daniel_Peng <Daniel_Peng(a)pegatron.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/glassway/memory/Makefile.mk
M src/mainboard/google/brya/variants/glassway/memory/dram_id.generated.txt
M src/mainboard/google/brya/variants/glassway/memory/mem_parts_used.txt
3 files changed, 8 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/81955/1
diff --git a/src/mainboard/google/brya/variants/glassway/memory/Makefile.mk b/src/mainboard/google/brya/variants/glassway/memory/Makefile.mk
index b4d82e9..3104c19 100644
--- a/src/mainboard/google/brya/variants/glassway/memory/Makefile.mk
+++ b/src/mainboard/google/brya/variants/glassway/memory/Makefile.mk
@@ -1,10 +1,12 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!!
# Generated by:
-# /tmp/go-build472300524/b001/exe/part_id_gen ADL lp5 src/mainboard/google/brya/variants/glassway/memory/ src/mainboard/google/brya/variants/glassway/memory/mem_parts_used.txt
+# /tmp/go-build486926698/b001/exe/part_id_gen ADL lp5 src/mainboard/google/brya/variants/glassway/memory/ src/mainboard/google/brya/variants/glassway/memory/mem_parts_used.txt
SPD_SOURCES =
SPD_SOURCES += spd/lp5/set-0/spd-7.hex # ID = 0(0b0000) Parts = K3KL8L80CM-MGCT
SPD_SOURCES += spd/lp5/set-0/spd-9.hex # ID = 1(0b0001) Parts = K3KL6L60GM-MGCT
SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 2(0b0010) Parts = H58G56AK6BX069
SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 3(0b0011) Parts = H9JCNNNBK3MLYR-N6E
+SPD_SOURCES += spd/lp5/set-0/spd-6.hex # ID = 4(0b0100) Parts = H58G66AK6BX070
+SPD_SOURCES += spd/lp5/set-0/spd-8.hex # ID = 5(0b0101) Parts = K3KL9L90CM-MGCT
diff --git a/src/mainboard/google/brya/variants/glassway/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/glassway/memory/dram_id.generated.txt
index 866132d3..ca68f99 100644
--- a/src/mainboard/google/brya/variants/glassway/memory/dram_id.generated.txt
+++ b/src/mainboard/google/brya/variants/glassway/memory/dram_id.generated.txt
@@ -1,10 +1,12 @@
# SPDX-License-Identifier: GPL-2.0-or-later
# This is an auto-generated file. Do not edit!!
# Generated by:
-# /tmp/go-build472300524/b001/exe/part_id_gen ADL lp5 src/mainboard/google/brya/variants/glassway/memory/ src/mainboard/google/brya/variants/glassway/memory/mem_parts_used.txt
+# /tmp/go-build486926698/b001/exe/part_id_gen ADL lp5 src/mainboard/google/brya/variants/glassway/memory/ src/mainboard/google/brya/variants/glassway/memory/mem_parts_used.txt
DRAM Part Name ID to assign
K3KL8L80CM-MGCT 0 (0000)
K3KL6L60GM-MGCT 1 (0001)
H58G56AK6BX069 2 (0010)
H9JCNNNBK3MLYR-N6E 3 (0011)
+H58G66AK6BX070 4 (0100)
+K3KL9L90CM-MGCT 5 (0101)
diff --git a/src/mainboard/google/brya/variants/glassway/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/glassway/memory/mem_parts_used.txt
index deeb000..f742b0b 100644
--- a/src/mainboard/google/brya/variants/glassway/memory/mem_parts_used.txt
+++ b/src/mainboard/google/brya/variants/glassway/memory/mem_parts_used.txt
@@ -13,3 +13,5 @@
K3KL6L60GM-MGCT
H58G56AK6BX069
H9JCNNNBK3MLYR-N6E
+H58G66AK6BX070
+K3KL9L90CM-MGCT
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Change subject: util/ifdtool: Add support for checking GPR0 status
......................................................................
Patch Set 5: Code-Review+1
(1 comment)
Patchset:
PS5:
will wait for Reka to get back
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Change subject: util/ifdtool: Add support for checking GPR0 status
......................................................................
Patch Set 5:
(1 comment)
File util/ifdtool/ifdtool.c:
https://review.coreboot.org/c/coreboot/+/81928/comment/779be8e5_efa5210e :
PS4, Line 1802: reg.data.write_protect_en
>> Should we also check that the range is set correctly? E.g. use calculate_gpr0_range() to calculate what the range should be, and compare it to the values in the image.
> I guess the purpose of this function is to know if GPR0 protected is enabled, hence, verify the range using calculate_gpr0_range() may be irrelevant here.
Thanks Reka and Subrata's response.
Yes, the purpose of function check_gpr0() is to know the GPR0 protected is enabled or disabled.
> ideally the function name should be `is_gpr0_protected()` and the output could be `GPR0 status: Enabled/Disabled`
Done. Updated in patchset5.
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Hello David Wu, Krishna P Bhat D, Reka Norman, Stefan Reinauer, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: util/ifdtool: Add support for checking GPR0 status
......................................................................
util/ifdtool: Add support for checking GPR0 status
This patch adds support for the new command-line option `-c` to
the ifdtool, which is able to check GPR0 status.
User can use ifdtool with '-c' option to check whether GPR0 is set to
enabled or disabled in the binary file.
BUG=none
TEST=(1) Run `ifdtool -p mtl -c image.bin` on a locked karis image,
show "GPRO status: Enabled".
(2) Run `ifdtool -p mtl -c unlock_image.bin` on a unlocked karis
image, show "GPRO status: Disabled".
Change-Id: I6b3af973be784200b965a68e5f6b7737cba03ed7
Signed-off-by: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com>
---
M util/ifdtool/ifdtool.c
1 file changed, 33 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/81928/5
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Maxim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80853?usp=email )
Change subject: mb/erying: Add Erying Polestar G613 Pro (TGL-H)
......................................................................
Patch Set 7:
(1 comment)
File src/mainboard/erying/tgl/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/80853/comment/24d140e4_0009a19f :
PS7, Line 144: register "TMPIN1.mode" = "THERMAL_DIODE"
> Interesting. Thanks for the details. […]
Sorry, I didn't notice the tmpin
(it is confusing that in the case of FAN3.smart.tmpin, TMPIN1 is also set. Perhaps TMPIN2.mode setup is not needed?)
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Change subject: util/ifdtool: Add support for checking GPR0 status
......................................................................
Patch Set 4:
(1 comment)
File util/ifdtool/ifdtool.c:
https://review.coreboot.org/c/coreboot/+/81928/comment/91accf2c_d80fa146 :
PS4, Line 1802: reg.data.write_protect_en
> Should we also check that the range is set correctly? E.g. use calculate_gpr0_range() to calculate what the range should be, and compare it to the values in the image.
I guess the purpose of this function is to know if GPR0 protected is enabled, hence, verify the range using calculate_gpr0_range() may be irrelevant here.
ideally the function name should be `is_gpr0_protected()` and the output could be `GPR0 status: Enabled/Disabled`
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