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Change subject: arch/x86: Enable long mode entry into payload for x86_64 support
......................................................................
Patch Set 7:
(1 comment)
File src/arch/x86/boot.c:
https://review.coreboot.org/c/coreboot/+/81960/comment/84ff50e0_3d6bcb67 :
PS3, Line 47: is_payload_64_bit_enabled
> > > I'd assume a call to die() or assembly code to set up long mode before jumping to payload. […]
On x86_32 coreboot you do not properly handle the case when someone inserts a 64-bit payload into the CBFS. Since the flag is a build time option and you only evaluate it at runtime at end of boot, there should be either support for it or an error message.
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Change subject: Makefile.mk: Associate reproducible build to commit ID
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82006/comment/06ea0990_f35f92fa :
PS3, Line 14:
Please describe how it works. You introduce `BUILD_TIMELESS_WITH_GITREV`. Does this need to be documented somewhere? (Please do it at least in the commit message. Maybe also document how the old version looked and how the new one does.
Patchset:
PS3:
Nice work.
PS: It’s uncommon to score your own change-set.
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Change subject: drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned
......................................................................
Patch Set 7:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81661/comment/12200817_75ffd539 :
PS2, Line 9: - Stack alignment:
> Made this to single CL as per : https://review.coreboot. […]
Acknowledged
File src/drivers/intel/fsp2_0/memory_init.c:
https://review.coreboot.org/c/coreboot/+/81661/comment/cd6b7e13_0433c1db :
PS6, Line 37: static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(16);
> u need to maintain the compatibility with 32bit while adding support for 64bit. […]
https://review.coreboot.org/c/coreboot/+/80277/comment/6deeca3f_9c40f470/
Please refer above comment. Initially this was segregated then simplified to same alignment for both x32 and x64.
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Change subject: drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned
......................................................................
drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned
- Stack alignment:
1. FSP functions must be called with the stack 16-bytes aligned.
This is already setup properly with the default value of the
`mpreferred-stack-boundary' compiler option (4).
2. The FSP stack buffer supplied by coreboot through the `StackBase'
UPD must be 16-bytes aligned.
BUG=b:329034258
TEST=Verified on Meteor Lake board (Rex)
Change-Id: I86048c5d3623a29f17a5e492cd67568e4844589c
Signed-off-by: Appukuttan V K <appukuttan.vk(a)intel.com>
---
M src/drivers/intel/fsp2_0/memory_init.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/81661/7
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Change subject: drivers/intel/fsp2_0: Add dedicated caller function for ap procedure calls
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81663/comment/31a5f971_efcf391a :
PS5, Line 11: the appropriate C calling convention.
> two things […]
Done
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Change subject: drivers/intel/fsp2_0: Support FSP 2.4 64-bits
......................................................................
Patch Set 39:
(1 comment)
File src/include/efi/efi_datatype.h:
https://review.coreboot.org/c/coreboot/+/80277/comment/66da7a44_03e6dd95 :
PS38, Line 77: /* EFI function calling convention attribute */
: #define __efiapi EFIAPI
> check line #38. […]
Sorry missed it. It didn't show any error when building. #38 came as part of rebase. Resolved now.
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Change subject: drivers/intel/fsp2_0: Support FSP 2.4 64-bits
......................................................................
drivers/intel/fsp2_0: Support FSP 2.4 64-bits
FSP 2.4 brings FSP 64-bits support which requires some adjustments in
coreboot:
FSP/UEFI uses the Microsoft x64 calling convention. Appropriate
attribute has to be set to all functions calling or called by
the FSP.
BUG=b:329034258
TEST=verified on Lunar Lake RVP board (lnlrvp)
Change-Id: If0397f5cc8d0f4f1872bd37a001fe42e0c37ec99
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
---
M src/drivers/intel/fsp2_0/include/fsp/util.h
M src/drivers/intel/fsp2_0/ppi/mp_service1.c
M src/drivers/intel/fsp2_0/ppi/mp_service2.c
M src/include/efi/efi_datatype.h
4 files changed, 21 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/80277/39
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Change subject: drivers/intel/fsp2_0: Remove x64-specific assertion from fsp_header
......................................................................
drivers/intel/fsp2_0: Remove x64-specific assertion from fsp_header
Same fsp_header struture is being used for x64 and x32 modes
and hence dropping the x64 assertion.
BUG=b:329034258
TEST=Verified on Meteor Lake board (Rex)
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---
M src/drivers/intel/fsp2_0/include/fsp/info_header.h
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Change subject: drivers/intel/fsp2_0: Add dedicated caller function for ap procedure calls
......................................................................
drivers/intel/fsp2_0: Add dedicated caller function for ap procedure calls
Add FSP 2 Multi Processor Platform Initialization module a function
indirection to ensure that efi_ap_procedure functions are called with
the appropriate C calling convention.
BUG=b:329034258
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M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
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