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Change subject: mb/google/brox: Fix GPE_EC_WAKE configuration
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
Does suspend_stress_test and powerd_dbus_suspend still work with this change?
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Hello Keith Short, Shelley Chen,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: mb/google/brox: Fix GPE_EC_WAKE configuration
......................................................................
mb/google/brox: Fix GPE_EC_WAKE configuration
Wake signal from EC is routed to GPP_D1 and hence GPE_EC_WAKE
corresponds to GPE0_DW1_01. Fix GPE_EC_WAKE configuration.
BUG=b:329026602
TEST=Build Brox BIOS image and boot to OS. Trigger suspend and wake up
using EC generated events like AC connect/disconnect.
Change-Id: Ifb89bd0de7b7fc316792e801ed5a1d3f25ca5b1c
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
---
M src/mainboard/google/brox/variants/baseboard/brox/include/baseboard/gpio.h
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/81526/2
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Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81526?usp=email )
Change subject: mb/google/brox: Fix GPE_EC_WAKE configuration
......................................................................
mb/google/brox: Fix GPE_EC_WAKE configuration
Wake signal from EC is routed to GPP_D1 and hence GPE_EC_WAKE
corresponds to GPE_DW1_01. Fix GPE_EC_WAKE configuration.
BUG=b:329026602
TEST=Build Brox BIOS image and boot to OS. Trigger suspend and wake up
using EC generated events like AC connect/disconnect.
Change-Id: Ifb89bd0de7b7fc316792e801ed5a1d3f25ca5b1c
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
---
M src/mainboard/google/brox/variants/baseboard/brox/include/baseboard/gpio.h
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/81526/1
diff --git a/src/mainboard/google/brox/variants/baseboard/brox/include/baseboard/gpio.h b/src/mainboard/google/brox/variants/baseboard/brox/include/baseboard/gpio.h
index 0e69fb3..39b081d 100644
--- a/src/mainboard/google/brox/variants/baseboard/brox/include/baseboard/gpio.h
+++ b/src/mainboard/google/brox/variants/baseboard/brox/include/baseboard/gpio.h
@@ -8,8 +8,8 @@
/* eSPI virtual wire reporting */
#define EC_SCI_GPI GPE0_ESPI
-/* EC wake is EC_PCH_INT which is routed to GPP_D0 pin */
-#define GPE_EC_WAKE GPE0_DW1_00
+/* EC wake is EC_PCH_WAKE which is routed to GPP_D1 pin */
+#define GPE_EC_WAKE GPE0_DW1_01
/* WP signal to PCH */
#define GPIO_PCH_WP GPP_E8
/* Used to gate SoC's SLP_S0# signal */
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Change subject: Support for creating hybrid vboot images
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
> 1) RW needs to stay the same as changing it would break ChromeOS mechanism
Sorry, I don't really understand this point or what you mean by "would break ChromeOS mechanism". ChromeOS should continue to boot just fine under ToT coreboot and depthcharge. If it doesn't on a specific platform that's a bug that we can fix. There should be no need to bend over backwards just to be able to reuse the unmodified ChromeOS RW when you're recompiling the whole rest of the firmware anyway. That's one of the reasons we're using open-source firmware, after all, there's no secret sauce in our release images, you can rebuild all of it yourself and it will work just as well.
I understand that there are certain things that are problematic with the RW_LEGACY solution. (But I'm not actually sure they're impossible to solve, FWIW... for example, it should be possible to recreate ACPI tables and replace what coreboot wrote in an RW_LEGACY payload if you wanted to, just a bit more cumbersome.) But in those cases, you can still just rebuild coreboot to include those ACPI/SMMSTORE/whatever changes that you need to support Windows, but then still use depthcharge on top of that modified coreboot, and use it to select which OS to boot. You can also have a different FMAP for that (e.g. to create a distinct SMMSTORE section) because you're rebuilding the entire RO anyway.
Unless you're saying that you really need different ACPI tables between ChromeOS and Windows, because Windows will refuse to boot with the ChromeOS ones and ChromeOS will refuse to boot with the Windows ones? In that case, I guess you do need a differentiation mechanism earlier in coreboot, and maybe you should be using the `normal/bootblock`/`fallback/bootblock` mechanism for that then (I think that would at least be more appropriate for this purpose than vboot, which really wasn't designed to be used this way). But you can still build the ChromeOS part for that from ToT. (I don't think that should be necessary, though? Surely, there should be a way to write some unified ACPI tables that both systems can be happy with? I'm pretty sure we managed to do that a couple of years back when we were toying with a dual-boot solution, we certainly weren't planning to boot through two totally separate versions of coreboot.)
I totally agree with making dual boot easier and removing pain points where possible, I just think what you're trying to do with vboot here is really going in the wrong direction and there should be a better way.
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Change subject: security/tpm: make tis_probe() return tpm_family
......................................................................
Patch Set 26:
(1 comment)
Patchset:
PS26:
> Julius also gave `+2`, resolved?
Acknowledged
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Change subject: security/tpm: make tis_probe() return tpm_family
......................................................................
Patch Set 26:
(1 comment)
File src/security/tpm/tss/tcg-1.2/tss.c:
https://review.coreboot.org/c/coreboot/+/69159/comment/c36c2241_35b344ca :
PS26, Line 166: tis_sendrecv = NULL;
> For consistency, because nothing is printed above for `TPM_CB_NO_DEVICE` error. `tcg-2.0/tss. […]
Acknowledged
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Change subject: security/tpm: make tis_probe() return tpm_family
......................................................................
Patch Set 26: Code-Review+2
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Change subject: mb/purism: Remove blank lines before '}' and after '{'
......................................................................
Patch Set 1: Code-Review+2
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Change subject: gma display_probing: Make new TGL ports available
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/libgfxinit/+/81522/comment/ff695370_047e5b35 :
PS1, Line 8:
Maybe list these new ports, or document the chapter, where they are documented.
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Change subject: gfxtest: Drop unnecessary with of ancestor
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Patch Set 1: Code-Review+1
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