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Change subject: soc/intel/cmn/cse: Deprecate CONFIG_SOC_INTEL_CSE_RW_VERSION
......................................................................
Patch Set 2:
(1 comment)
File src/soc/intel/common/block/cse/Kconfig:
https://review.coreboot.org/c/coreboot/+/80924/comment/1acb1c25_36d9fac4 :
PS1, Line 236: enabling automatic detection
> OK, then it is more about not specifying the CSE version at all in which case the automatic version discovery will take place, right? Maybe you can rephrase then a bit, e.g.:
>
> "This config may be deprecated in the future. Consider not providing a version here and let the CSE version be automatically queried from the CSE binary at build time (available with Meteor Lake and following platforms)."
>
> But it is up to you to decide, hence I will mark this as resolved.
thanks for the suggestion, i have updated the help text now.
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Change subject: soc/intel/cmn/cse: Deprecate CONFIG_SOC_INTEL_CSE_RW_VERSION
......................................................................
Patch Set 1:
(1 comment)
File src/soc/intel/common/block/cse/Kconfig:
https://review.coreboot.org/c/coreboot/+/80924/comment/ab0ac574_359d5548 :
PS1, Line 236: enabling automatic detection
> > > Is there an option which lets the user to enable it explicitly or is it available implicit with […]
OK, then it is more about not specifying the CSE version at all in which case the automatic version discovery will take place, right? Maybe you can rephrase then a bit, e.g.:
"This config may be deprecated in the future. Consider not providing a version here and let the CSE version be automatically queried from the CSE binary at build time (available with Meteor Lake and following platforms)."
But it is up to you to decide, hence I will mark this as resolved.
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Change subject: mb/google/brox: Enable Wake on WLAN for SKU1
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/brox/variants/brox/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/80780/comment/2907987b_beed8dae :
PS1, Line 273: chip drivers/wifi/generic
: register "wake" = "GPE0_DW0_03"
: register "add_acpi_dma_property" = "true"
: device pci 00.0 on
: probe WIFI_BT WIFI_BT_PCIE
: end
: end
> Out of curiosity, are these wake knobs not available for the rtd3 wifi driver? I would think that y […]
There's no wake knob in rtd3. Hence added this.
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Change subject: mb/emulation/qemu-riscv: Change to -bios option
......................................................................
Patch Set 8: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80746/comment/a98eeaf1_a9385353 :
PS6, Line 9: bios
> -bios is quite old as far as I know. pflash is I think more recent (not sure since when). […]
-bios has been supported for at least 10 years, or more.
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Change subject: soc/amd/genoa_poc: Fix DEBUG_SMI compilation error
......................................................................
Patch Set 1: Code-Review+1
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Change subject: mb/google/brox: Enable Wake on WLAN for SKU1
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/brox/variants/brox/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/80780/comment/af1730e6_c0a37f5d :
PS1, Line 273: chip drivers/wifi/generic
: register "wake" = "GPE0_DW0_03"
: register "add_acpi_dma_property" = "true"
: device pci 00.0 on
: probe WIFI_BT WIFI_BT_PCIE
: end
: end
Out of curiosity, are these wake knobs not available for the rtd3 wifi driver? I would think that you would just add the wake gpio into there instead of using this second generic wifi driver.
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Change subject: mb/emulation/qemu-riscv: Change to -bios option
......................................................................
Patch Set 8:
(1 comment)
File src/mainboard/emulation/qemu-riscv/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/80746/comment/d3130d3f_ed4bdeb0 :
PS6, Line 9: REGION(flash, QEMU_VIRT_FLASH, 32M, 0) \
> use CONFIG_ROM_SIZE here?
Done
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Hello Arthur Heymans, Philipp Hug, build bot (Jenkins), ron minnich,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80746?usp=email
to look at the new patch set (#8).
Change subject: mb/emulation/qemu-riscv: Change to -bios option
......................................................................
mb/emulation/qemu-riscv: Change to -bios option
This changes the virt target so that it can be run with the -bios option
and a pflash backend for the flash. QEMU can now be run as follows:
qemu -M virt -m 1G -nographic -bios build/coreboot.rom \
-drive if=pflash,file=./build/coreboot.rom,format=raw
coreboot will start in DRAM, but still have a flash to put CBFS onto and
to load subsequent stages and payload from.
Tested bootflow:
coreboot -> OpenSBI -> Linux -> u-root
Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com>
Change-Id: I009d97fa3e13068b91c604e987e50a65e525407d
---
M Documentation/mainboard/emulation/qemu-riscv.md
M src/mainboard/emulation/Kconfig
M src/mainboard/emulation/qemu-riscv/Kconfig
M src/mainboard/emulation/qemu-riscv/Makefile.mk
A src/mainboard/emulation/qemu-riscv/cbmem.c
A src/mainboard/emulation/qemu-riscv/chip.c
M src/mainboard/emulation/qemu-riscv/devicetree.cb
M src/mainboard/emulation/qemu-riscv/include/mainboard/addressmap.h
M src/mainboard/emulation/qemu-riscv/mainboard.c
M src/mainboard/emulation/qemu-riscv/memlayout.ld
M src/mainboard/emulation/qemu-riscv/rom_media.c
M src/mainboard/emulation/qemu-riscv/romstage.c
M util/qemu/Makefile.mk
13 files changed, 98 insertions(+), 55 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/80746/8
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Change subject: mb/emulation/qemu-riscv: Change to -bios option
......................................................................
Patch Set 7:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80746/comment/8d9c24fc_7e0ff9e5 :
PS6, Line 9: bios
> Since which version is -bios supported in qemu? […]
-bios is quite old as far as I know. pflash is I think more recent (not sure since when).
QEMU virt target on RISC-V has changed to much in order to be much backwards compatible.
I tested this with QEMU version 8.2.1 (2023).
I don't have access to old QEMU versions, but I also tested with a QEMU commit from 2021 (3cbc17ee92479ff5) and compiling QEMU myself. The bootflow works there also.
File src/mainboard/emulation/qemu-riscv/Makefile.mk:
https://review.coreboot.org/c/coreboot/+/80746/comment/8e203be2_642e6c3f :
PS6, Line 7: bootblock-y += cbmem.c
> no need to move them to bootblock-y, those can stay romstage-y, to allow both with and without separ […]
I personally don't care much if we want to support both, but I guess for an emulation target we want to cover all bootflows.
I will make the changes to support both.
File src/mainboard/emulation/qemu-riscv/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/80746/comment/74cc96be_e69a5cec :
PS6, Line 20: #if ENV_SEPARATE_ROMSTAGE
> romstage can be placed at same place as opensbi to keep separate romstage support
I will put it below and leave out the if conditions entirely. RISC-V and ARM memlayout.ld files are also meant as documentation and putting unnecessary ifdef everywhere ist just confusing.
See also:
https://review.coreboot.org/c/coreboot/+/77974
File src/mainboard/emulation/qemu-riscv/romstage.c:
https://review.coreboot.org/c/coreboot/+/80746/comment/b443e92d_a5f9ebc8 :
PS6, Line 9: console_init();
> add main to allow both with and without separate romstage: […]
Done
File util/qemu/Makefile.mk:
https://review.coreboot.org/c/coreboot/+/80746/comment/234e6777_bd1a9893 :
PS6, Line 32: QEMU-$(CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64) ?= qemu-system-riscv64 -M virt -drive \
> maybe add -m 1G as well here, as the default memory size is really low on riscv
Done
Although maybe something smaller. 512M? It still boots with 128M to Linux and u-root.
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