coreboot-gerrit March 2024

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Support FSP-M execution from CBFS cache
by Jérémy Compostella (Code Review) 28 Mar '24

28 Mar '24

Attention is currently required from: Andrey Petrov, Arthur Heymans, Bora Guvendik, Chen, Gang C, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Paul Menzel, Ronak Kanabar, Shuo Liu, Tarun. Hello Andrey Petrov, Arthur Heymans, Bora Guvendik, Chen, Gang C, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Paul Menzel, Ronak Kanabar, Shuo Liu, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81212?usp=email to look at the new patch set (#9). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: drivers/intel/fsp2_0: Support FSP-M execution from CBFS cache ...................................................................... drivers/intel/fsp2_0: Support FSP-M execution from CBFS cache If SPINOR space is limited and Cache-As-RAM (CAR) is large enough, FSP can be stored compressed, loaded in CBFS cache and executed from there. It allows to reduce the FSP-M SPINOR footprint with a limited boot time penalty. `FSP_M_EXECUTE_FROM_CBFS_CACHE' Kconfig can be set to turn on this feature. We performed some measurements on a Meteor Lake Rex board with a 2 MB Cache-As-RAM (`DCACHE_RAM_SIZE' at 0x200000 and `DCACHE_RAM_BASE' 0xea000000) and a few adjustments in the FSP to enable CAR to RAM PEIM (Pre-EFI Initialization Module) drivers migration. 1. Time impact | Compression algorithm | LZ4 | LZMA | |--------------------------+----------+----------| | Decompress duration | 1.9 ms | 75.6 ms | | Overall boot time impact | +15.9 ms | +77.4 ms | The overall boot time impact increase is explained by FSP-M loading being a bit faster (-18 ms) undermined by a longer Cache-As-RAM setup (32 ms). 2. SPINOR impact | CBFS file / Compression | LZ4 | LZMA | |----------------------------+----------------+-----------------| | romstage size | +4 KB (+3%) | +10 KB (+8%) | | fspm.bin size | -313 KB (-37%) | -456 KB (-54%) | |----------------------------+----------------+-----------------| | Total Per slot | -309 KB | -446 KB | | Total for SPINOR (3 slots) | -926 KB | -1339 KB | BUG=b:329237541 TEST=Verified on rex with Cache-AS-RAM size of 2 MB Change-Id: I8d42d765eb0ecf2e7a8fc6d8d15eb2df8975f6f2 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/Makefile.mk M src/drivers/intel/fsp2_0/memory_init.c M src/soc/intel/meteorlake/Kconfig 4 files changed, 40 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/81212/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/81212?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8d42d765eb0ecf2e7a8fc6d8d15eb2df8975f6f2 Gerrit-Change-Number: 81212 Gerrit-PatchSet: 9 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: mb/google/brox: Enable SAGv
by Ashish Kumar Mishra (Code Review) 28 Mar '24

28 Mar '24

Attention is currently required from: Paul Menzel, Shelley Chen. Ashish Kumar Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81556?usp=email ) Change subject: mb/google/brox: Enable SAGv ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/81556/comment/1760ccae_ee26a85a : PS1, Line 13: TEST=Boot brox with SAGv enabled > What changed? How do you check that enabling was successful? Boot check performed with SAGv enabled in coreboot. -- To view, visit https://review.coreboot.org/c/coreboot/+/81556?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I80c44e7df1d75732c6982b27e44ecd6060b1b3f1 Gerrit-Change-Number: 81556 Gerrit-PatchSet: 1 Gerrit-Owner: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 28 Mar 2024 16:17:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/{bd/bd_egs, iventec/transformers}: Fix building with x86_64
by Lean Sheng Tan (Code Review) 28 Mar '24

28 Mar '24

Attention is currently required from: Arthur Heymans, Paul Menzel. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81559?usp=email ) Change subject: mb/{bd/bd_egs, iventec/transformers}: Fix building with x86_64 ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81559?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iceb7cb1dbdc6f5397823a1737e3baeac96966a78 Gerrit-Change-Number: 81559 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 28 Mar 2024 15:56:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/brox: Configure ISH device based on FW_CONFIG
by Karthik Ramasubramanian (Code Review) 28 Mar '24

28 Mar '24

Attention is currently required from: Eric Lai, Shelley Chen, Tanu Malhotra, Varshit Pandya, Yuval Peress. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81418?usp=email ) Change subject: mb/google/brox: Configure ISH device based on FW_CONFIG ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/81418/comment/738bb141_fb2a36a4 : PS2, Line 10: dma > nit: DMA ? Done. -- To view, visit https://review.coreboot.org/c/coreboot/+/81418?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I678416acd48e03ab77ae299beae6e295a688b8df Gerrit-Change-Number: 81418 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Yuval Peress <peress(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Yuval Peress <peress(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Comment-Date: Thu, 28 Mar 2024 15:53:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: Kconfig: Make GBD_STUB and long mode mutually exclusive
by Lean Sheng Tan (Code Review) 28 Mar '24

28 Mar '24

Attention is currently required from: Angel Pons, Arthur Heymans, Felix Held, Jérémy Compostella, Martin L Roth, Nico Huber. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81379?usp=email ) Change subject: Kconfig: Make GBD_STUB and long mode mutually exclusive ...................................................................... Patch Set 8: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81379?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icaf7d0763829d5badf73d38bb8fc3d36cfe18964 Gerrit-Change-Number: 81379 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 28 Mar 2024 15:53:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/brox: Configure ISH device based on FW_CONFIG
by Karthik Ramasubramanian (Code Review) 28 Mar '24

28 Mar '24

Attention is currently required from: Eric Lai, Karthik Ramasubramanian, Shelley Chen, Tanu Malhotra, Varshit Pandya, Yuval Peress. Hello Eric Lai, Shelley Chen, Tanu Malhotra, Varshit Pandya, Yuval Peress, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81418?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Varshit Pandya, Code-Review+2 by Eric Lai, Code-Review+2 by Shelley Chen, Verified+1 by build bot (Jenkins) The change is no longer submittable: Code-Review and Verified are unsatisfied now. Change subject: mb/google/brox: Configure ISH device based on FW_CONFIG ...................................................................... mb/google/brox: Configure ISH device based on FW_CONFIG ISH Firmware name needs to be configured only when full sensing capabilities are enabled through ISH_ENABLE FW_CONFIG. Similarly DMA property needs to be added only when UFS is enabled through STORAGE_UFS FW_CONFIG. Hence configure the ISH device at run-time based on FW_CONFIG. BUG=b:319164720 TEST=Build Brox BIOS image and boot to OS. Change-Id: I678416acd48e03ab77ae299beae6e295a688b8df Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/brox/variants/brox/fw_config.c M src/mainboard/google/brox/variants/brox/overridetree.cb 2 files changed, 14 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/81418/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/81418?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I678416acd48e03ab77ae299beae6e295a688b8df Gerrit-Change-Number: 81418 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Yuval Peress <peress(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Yuval Peress <peress(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: mb/google/brox: Configure ISH device based on FW_CONFIG
by Varshit Pandya (Code Review) 28 Mar '24

28 Mar '24

Attention is currently required from: Karthik Ramasubramanian, Tanu Malhotra, Yuval Peress. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81418?usp=email ) Change subject: mb/google/brox: Configure ISH device based on FW_CONFIG ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81418?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I678416acd48e03ab77ae299beae6e295a688b8df Gerrit-Change-Number: 81418 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Yuval Peress <peress(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Yuval Peress <peress(a)google.com> Gerrit-Attention: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 28 Mar 2024 15:52:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/brox: Configure ISH device based on FW_CONFIG
by Karthik Ramasubramanian (Code Review) 28 Mar '24

28 Mar '24

Attention is currently required from: Tanu Malhotra, Varshit Pandya, Yuval Peress. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81418?usp=email ) Change subject: mb/google/brox: Configure ISH device based on FW_CONFIG ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/81418/comment/67d84b0c_b6e4a70c : PS2, Line 10: Similarly dma : property needs to be added only when UFS is enabled through STORAGE_UFS : FW_CONFIG. > the UFS related change is not captured in the title of the patch, may be split into two patches ? Done. Please refer to my response in your other comment regarding why I am marking this as resolved. Also please refer to the devicetree change which indicates how UFS and ISH are related. File src/mainboard/google/brox/variants/brox/fw_config.c: https://review.coreboot.org/c/coreboot/+/81418/comment/575dee27_faa49f87 : PS2, Line 42: if (fw_config_probe(FW_CONFIG(STORAGE, STORAGE_UFS))) { : printk(BIOS_INFO, "Configure GPIOs, device config for UFS.\n"); : config->add_acpi_dma_property = true; > looks like a separate logical change, do you mind splitting this into two patches ? No, they are one related change. The title of the change is saying that we are configuring the ISH device based on FW_CONFIG. FW_CONFIG has bit masks for both UFS and ISH. Also both UFS and ISH features need the ish pci device to be enabled and configured accordingly. That is what this change is doing. -- To view, visit https://review.coreboot.org/c/coreboot/+/81418?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I678416acd48e03ab77ae299beae6e295a688b8df Gerrit-Change-Number: 81418 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Reviewer: Yuval Peress <peress(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Yuval Peress <peress(a)google.com> Gerrit-Attention: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Comment-Date: Thu, 28 Mar 2024 15:48:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: arch/ppc64: Add arch as supported by the clang compiler
by Martin L Roth (Code Review) 28 Mar '24

28 Mar '24

Attention is currently required from: Arthur Heymans, ron minnich. Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78448?usp=email ) Change subject: arch/ppc64: Add arch as supported by the clang compiler ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/78448?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1aacff869663e1db74cd485787d7103b9ec5602e Gerrit-Change-Number: 78448 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Thu, 28 Mar 2024 15:26:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: cpu/x86/Kconfig: Mark 64bit support as stable
by Martin L Roth (Code Review) 28 Mar '24

28 Mar '24

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80338?usp=email ) Change subject: cpu/x86/Kconfig: Mark 64bit support as stable ...................................................................... cpu/x86/Kconfig: Mark 64bit support as stable With SMM holding page tables itself, we can consider SMM support stable and safe enough for general use. Also update the respective documentation. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: Ifcf0a1a5097a2d7c064bb709ec0b09ebee13a47d Reviewed-on: https://review.coreboot.org/c/coreboot/+/80338 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin L Roth <gaumless(a)gmail.com> --- M Documentation/arch/x86/index.md M configs/config.emulation_qemu_x86_i440fx_x86_64 M configs/config.foxconn_g41m M configs/config.google_vilboz.x86_64 M configs/config.hp_compaq_8200_elite_sff_pc.x86_64 M configs/config.lenovo_t400_vboot_and_debug M configs/config.lenovo_x201_all_debug_option_table_bt_on_wifi M configs/config.prodrive_hermes.x86_64 M src/arch/x86/Kconfig M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_206ax/Kconfig M src/cpu/qemu-x86/Kconfig M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/x4x/Kconfig M src/soc/amd/genoa_poc/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/xeon_sp/spr/Kconfig 18 files changed, 25 insertions(+), 34 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/Documentation/arch/x86/index.md b/Documentation/arch/x86/index.md index 3ddff51..f2597ac 100644 --- a/Documentation/arch/x86/index.md +++ b/Documentation/arch/x86/index.md @@ -9,9 +9,7 @@ ``` ## State of x86_64 support -At the moment there's only experimental x86_64 support. -The `emulation/qemu-i440fx` and `emulation/qemu-q35` boards do support -*ARCH_RAMSTAGE_X86_64* , *ARCH_POSTCAR_X86_64* and *ARCH_ROMSTAGE_X86_64*. +Some SOCs now support 64bit mode. Search for HAVE_X86_64_SUPPORT in Kconfig. In order to add support for x86_64 the following assumptions were made: * The CPU supports long mode @@ -19,7 +17,6 @@ * All code that is to be run must be below 4GiB in physical memory * The high dword of pointers is always zero * The reference implementation is qemu -* The CPU supports 1GiB hugepages * x86 payloads are loaded below 4GiB in physical memory and are jumped to in *protected mode* @@ -62,7 +59,6 @@ 1. Fine grained page tables for SMM: * Must not have execute and write permissions for the same page. * Must allow only that TSEG pages can be marked executable - * Must reside in SMRAM 2. Support 64bit PCI BARs above 4GiB 3. Place and run code above 4GiB @@ -70,13 +66,10 @@ * Fix compilation errors * Test how well CAR works with x86_64 and paging * Improve mode switches -* Test libgfxinit / VGA Option ROMs / FSP -## Known bugs on real hardware +## Known problems on real hardware -According to Intel x86_64 mode hasn't been validated in CAR environments. -Until now it could be verified on various Intel platforms and no issues have -been found. +Running VGA rom directly fails. Yabel works fine though. ## Known bugs on KVM enabled qemu diff --git a/configs/config.emulation_qemu_x86_i440fx_x86_64 b/configs/config.emulation_qemu_x86_i440fx_x86_64 index 7123646..2f6bf78 100644 --- a/configs/config.emulation_qemu_x86_i440fx_x86_64 +++ b/configs/config.emulation_qemu_x86_i440fx_x86_64 @@ -1,3 +1,3 @@ CONFIG_VENDOR_EMULATION=y CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y -CONFIG_USE_EXP_X86_64_SUPPORT=y +CONFIG_USE_X86_64_SUPPORT=y diff --git a/configs/config.foxconn_g41m b/configs/config.foxconn_g41m index f5deea5..acb0768 100644 --- a/configs/config.foxconn_g41m +++ b/configs/config.foxconn_g41m @@ -1,3 +1,3 @@ CONFIG_VENDOR_FOXCONN=y CONFIG_BOARD_FOXCONN_G41M=y -CONFIG_USE_EXP_X86_64_SUPPORT=y +CONFIG_USE_X86_64_SUPPORT=y diff --git a/configs/config.google_vilboz.x86_64 b/configs/config.google_vilboz.x86_64 index 74036ae..ddb2eda 100644 --- a/configs/config.google_vilboz.x86_64 +++ b/configs/config.google_vilboz.x86_64 @@ -1,3 +1,3 @@ CONFIG_VENDOR_GOOGLE=y CONFIG_BOARD_GOOGLE_VILBOZ=y -CONFIG_USE_EXP_X86_64_SUPPORT=y +CONFIG_USE_X86_64_SUPPORT=y diff --git a/configs/config.hp_compaq_8200_elite_sff_pc.x86_64 b/configs/config.hp_compaq_8200_elite_sff_pc.x86_64 index 9bb5e38..d15f162 100644 --- a/configs/config.hp_compaq_8200_elite_sff_pc.x86_64 +++ b/configs/config.hp_compaq_8200_elite_sff_pc.x86_64 @@ -1,3 +1,3 @@ CONFIG_VENDOR_HP=y CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y -CONFIG_USE_EXP_X86_64_SUPPORT=y +CONFIG_USE_X86_64_SUPPORT=y diff --git a/configs/config.lenovo_t400_vboot_and_debug b/configs/config.lenovo_t400_vboot_and_debug index f79d773..6738e43 100644 --- a/configs/config.lenovo_t400_vboot_and_debug +++ b/configs/config.lenovo_t400_vboot_and_debug @@ -12,5 +12,5 @@ CONFIG_DEBUG_ADA_CODE=y CONFIG_H8_FN_KEY_AS_VBOOT_RECOVERY_SW=y CONFIG_VBOOT=y -CONFIG_USE_EXP_X86_64_SUPPORT=y +CONFIG_USE_X86_64_SUPPORT=y CONFIG_ARCH_X86_64_PGTBL_LOC=0xfffe8000 diff --git a/configs/config.lenovo_x201_all_debug_option_table_bt_on_wifi b/configs/config.lenovo_x201_all_debug_option_table_bt_on_wifi index 63becd7..148c77d 100644 --- a/configs/config.lenovo_x201_all_debug_option_table_bt_on_wifi +++ b/configs/config.lenovo_x201_all_debug_option_table_bt_on_wifi @@ -10,4 +10,4 @@ CONFIG_DEBUG_SPI_FLASH=y CONFIG_DEBUG_BOOT_STATE=y CONFIG_DEBUG_ADA_CODE=y -CONFIG_USE_EXP_X86_64_SUPPORT=y +CONFIG_USE_X86_64_SUPPORT=y diff --git a/configs/config.prodrive_hermes.x86_64 b/configs/config.prodrive_hermes.x86_64 index 506f494..6763aa6 100644 --- a/configs/config.prodrive_hermes.x86_64 +++ b/configs/config.prodrive_hermes.x86_64 @@ -14,4 +14,4 @@ CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=36 CONFIG_RUN_FSP_GOP=y -CONFIG_USE_EXP_X86_64_SUPPORT=y +CONFIG_USE_X86_64_SUPPORT=y diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 3f97644..d2ae320 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -65,23 +65,21 @@ select ARCH_ROMSTAGE_X86_64 select ARCH_RAMSTAGE_X86_64 -config HAVE_EXP_X86_64_SUPPORT +config HAVE_X86_64_SUPPORT bool help Enable experimental support to build and run coreboot in 64-bit mode. When selecting this option for a new platform, it is highly advisable to provide a config file for Jenkins to build-test the 64-bit option. -config USE_EXP_X86_64_SUPPORT - bool "[EXPERIMENTAL] Run coreboot in long (64-bit) mode" - depends on HAVE_EXP_X86_64_SUPPORT +config USE_X86_64_SUPPORT + bool "Run coreboot in long (64-bit) mode" + depends on HAVE_X86_64_SUPPORT select ARCH_ALL_STAGES_X86_64 help When set, most of coreboot runs in long (64-bit) mode instead of the usual protected flat (32-bit) mode. 64-bit CPUs and OSes can be used - irrespective of whether coreboot runs in 32-bit or 64-bit mode. This - is an experimental option: do not enable unless one wants to test it - and has the means to recover a system when coreboot fails to boot. + irrespective of whether coreboot runs in 32-bit or 64-bit mode. config PAGE_TABLES_IN_CBFS bool diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 15a160a..2b9c4b2 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -2,7 +2,7 @@ config CPU_INTEL_MODEL_2065X bool - select HAVE_EXP_X86_64_SUPPORT + select HAVE_X86_64_SUPPORT select ARCH_X86 select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index bdca12c..cf16640 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -3,7 +3,7 @@ config CPU_INTEL_MODEL_206AX bool select ARCH_X86 - select HAVE_EXP_X86_64_SUPPORT + select HAVE_X86_64_SUPPORT select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index 0fa999e..b5ff6f0 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -3,7 +3,7 @@ config CPU_QEMU_X86 bool select ARCH_X86 - select HAVE_EXP_X86_64_SUPPORT + select HAVE_X86_64_SUPPORT select UDELAY_TSC select TSC_MONOTONIC_TIMER select UNKNOWN_TSC_RATE diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig index 2a266b9..4fe20ee 100644 --- a/src/northbridge/intel/gm45/Kconfig +++ b/src/northbridge/intel/gm45/Kconfig @@ -7,7 +7,7 @@ select INTEL_EDID select INTEL_GMA_ACPI select INTEL_GMA_SSC_ALTERNATE_REF - select HAVE_EXP_X86_64_SUPPORT + select HAVE_X86_64_SUPPORT select USE_DDR3 select USE_DDR2 diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig index 248852e..4bc12af 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig @@ -7,7 +7,7 @@ select INTEL_GMA_ACPI select CACHE_MRC_SETTINGS select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES - select HAVE_EXP_X86_64_SUPPORT + select HAVE_X86_64_SUPPORT select USE_DDR3 select USE_DDR2 diff --git a/src/soc/amd/genoa_poc/Kconfig b/src/soc/amd/genoa_poc/Kconfig index 05590f5..f4bd7d6 100644 --- a/src/soc/amd/genoa_poc/Kconfig +++ b/src/soc/amd/genoa_poc/Kconfig @@ -11,7 +11,7 @@ select ARCH_X86 select DEFAULT_X2APIC select HAVE_ACPI_TABLES - select HAVE_EXP_X86_64_SUPPORT + select HAVE_X86_64_SUPPORT select HAVE_SMI_HANDLER select RESET_VECTOR_IN_RAM select SOC_AMD_COMMON @@ -50,7 +50,7 @@ select SOC_AMD_OPENSIL_GENOA_POC select X86_CUSTOM_BOOTMEDIA -config USE_EXP_X86_64_SUPPORT +config USE_X86_64_SUPPORT default y config CHIPSET_DEVICETREE diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 864643f..d6c3fbd 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -77,7 +77,7 @@ select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI - select HAVE_EXP_X86_64_SUPPORT + select HAVE_X86_64_SUPPORT help AMD Picasso support diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index ab2efc3..7548e46 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -79,7 +79,7 @@ config SOC_INTEL_COFFEELAKE bool select SOC_INTEL_CANNONLAKE_BASE - select HAVE_EXP_X86_64_SUPPORT + select HAVE_X86_64_SUPPORT select HECI_DISABLE_USING_SMM select INTEL_CAR_NEM diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig index 23d2f8b6..2e0ad01 100644 --- a/src/soc/intel/xeon_sp/spr/Kconfig +++ b/src/soc/intel/xeon_sp/spr/Kconfig @@ -16,7 +16,7 @@ select FSP_SPEC_VIOLATION_XEON_SP_HEAP_WORKAROUND select UDK_202005_BINDING select SOC_INTEL_HAS_CXL - select HAVE_EXP_X86_64_SUPPORT + select HAVE_X86_64_SUPPORT help Intel Sapphire Rapids-SP support -- To view, visit https://review.coreboot.org/c/coreboot/+/80338?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifcf0a1a5097a2d7c064bb709ec0b09ebee13a47d Gerrit-Change-Number: 80338 Gerrit-PatchSet: 19 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: merged

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coreboot-gerrit March 2024