coreboot-gerrit March 2024

coreboot-gerrit@coreboot.org

1 participants
3668 discussions

[S] Change in coreboot[main]: drivers/intel/pmc_mux/conn: Copy ACPI _PLD property from USB port to mux
by Won Chung (Code Review) 15 Mar '24

15 Mar '24

Attention is currently required from: Emilie Roberts, Paul Menzel. Hello Emilie Roberts, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81089?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: drivers/intel/pmc_mux/conn: Copy ACPI _PLD property from USB port to mux ...................................................................... drivers/intel/pmc_mux/conn: Copy ACPI _PLD property from USB port to mux Copy ACPI _PLD values from USB ports to corresponding USB muxes. BUG=b:121287022 TEST=emerge-${BOARD} coreboot then check ACPI table on DUT Change-Id: If27042cc995ef188f8a3e31444e994318ff98803 Signed-off-by: Won Chung <wonchung(a)google.com> Tested-by: Emilie Roberts <hadrosaur(a)google.com> --- M src/drivers/intel/pmc_mux/conn/conn.c 1 file changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/81089/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/81089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If27042cc995ef188f8a3e31444e994318ff98803 Gerrit-Change-Number: 81089 Gerrit-PatchSet: 7 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Emilie Roberts <hadrosaur(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Benson Leung <bleung(a)google.com> Gerrit-CC: Prashant Malani <pmalani(a)chromium.org> Gerrit-CC: Prashant Malani <pmalani(a)google.com> Gerrit-Attention: Emilie Roberts <hadrosaur(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[main]: drivers/intel/pmc_mux/conn: Copy ACPI _PLD property from USB port to mux
by Won Chung (Code Review) 15 Mar '24

15 Mar '24

Attention is currently required from: Emilie Roberts, Paul Menzel. Won Chung has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81089?usp=email ) Change subject: drivers/intel/pmc_mux/conn: Copy ACPI _PLD property from USB port to mux ...................................................................... Patch Set 6: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/81089/comment/79b376d9_48da0c2c : PS5, Line 9: Copy ACPI _PLD values from USB ports to corresponding USB muxes. > Please elaborate by describing the problem. @hadrosaur@google.com Hey Emilie, could you give more context to how we are planning to use this for? https://review.coreboot.org/c/coreboot/+/81089/comment/d3e859eb_918ca91f : PS5, Line 12: TEST=emerge-${BOARD} coreboot > Did Emilie test more? I believe she checked ACPI tables correctly generated on dut. Patchset: PS5: > I just tested this on mithrax, there seems to be an ordering error. […] I just checked on mithrax and it appears to be that port0 is on the right side and port1 is on the left side. I used the following to check the location. ``` grep "" /sys/class/typec/port0/physical_location/* grep "" /sys/class/typec/port1/physical_location/* ``` Does connecting a device to the left port create `/sys/class/typec/port0-partner`? If that is the case, I think we might have had incorrect _PLD values in the first place which would be a separate issue. File src/drivers/intel/pmc_mux/conn/conn.c: https://review.coreboot.org/c/coreboot/+/81089/comment/a12c34e8_8aaec741 : PS5, Line 155: // Copy _PLD from USB ports > The rest of the file uses C89 comment style. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If27042cc995ef188f8a3e31444e994318ff98803 Gerrit-Change-Number: 81089 Gerrit-PatchSet: 6 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Emilie Roberts <hadrosaur(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Benson Leung <bleung(a)google.com> Gerrit-CC: Prashant Malani <pmalani(a)chromium.org> Gerrit-CC: Prashant Malani <pmalani(a)google.com> Gerrit-Attention: Emilie Roberts <hadrosaur(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 15 Mar 2024 19:34:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Emilie Roberts <hadrosaur(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: arch/riscv: add constants for Base Extension
by ron minnich (Code Review) 15 Mar '24

15 Mar '24

ron minnich has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81286?usp=email ) Change subject: arch/riscv: add constants for Base Extension ...................................................................... arch/riscv: add constants for Base Extension Get used to this rate of change, SBI adds one new function a month, on average, for the last 7 years. Signed-off-by: Ronald G Minnich <rminnich(a)gmail.com> Change-Id: Iaad763464678d1921dfefdbee1e39fba2fe5585a clang-formatted-by: Ronald G Minnich --- M src/arch/riscv/include/sbi.h 1 file changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/81286/1 diff --git a/src/arch/riscv/include/sbi.h b/src/arch/riscv/include/sbi.h index 8c526fc..855c510 100644 --- a/src/arch/riscv/include/sbi.h +++ b/src/arch/riscv/include/sbi.h @@ -13,6 +13,19 @@ #define SBI_REMOTE_SFENCE_VMA_ASID 7 #define SBI_SHUTDOWN 8 +// Here begins the complex set of things added by +// later SBI. Unlike the original design, these +// require bits of state to be maintained in SBI. +// Disappointing! +#define SBI_EXTENSION_ID 0x10 +#define SBI_GET_SBI_SPEC_VERSION 0 +#define SBI_GET_SBI_IMPL_ID 1 +#define SBI_GET_SBI_IMPL_VERSION 2 +#define SBI_PROBE_EXTENSION 3 +#define SBI_GET_MVENDORID 4 +#define SBI_GET_MARCHID 5 +#define SBI_GET_MIMPID 6 + #define SBI_ENOSYS 38 #define IPI_SOFT 1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81286?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaad763464678d1921dfefdbee1e39fba2fe5585a Gerrit-Change-Number: 81286 Gerrit-PatchSet: 1 Gerrit-Owner: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[main]: drivers/intel/pmc_mux/conn: Copy ACPI _PLD property from USB port to mux
by Won Chung (Code Review) 15 Mar '24

15 Mar '24

Attention is currently required from: Emilie Roberts, Won Chung. Hello Emilie Roberts, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81089?usp=email to look at the new patch set (#6). Change subject: drivers/intel/pmc_mux/conn: Copy ACPI _PLD property from USB port to mux ...................................................................... drivers/intel/pmc_mux/conn: Copy ACPI _PLD property from USB port to mux Copy ACPI _PLD values from USB ports to corresponding USB muxes. BUG=b:121287022 TEST=emerge-${BOARD} coreboot then check ACPI table on DUT Change-Id: If27042cc995ef188f8a3e31444e994318ff98803 Signed-off-by: Won Chung <wonchung(a)google.com> Tested-by: Emilie Roberts <hadrosaur(a)google.com> --- M src/drivers/intel/pmc_mux/conn/conn.c 1 file changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/81089/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/81089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If27042cc995ef188f8a3e31444e994318ff98803 Gerrit-Change-Number: 81089 Gerrit-PatchSet: 6 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Emilie Roberts <hadrosaur(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Benson Leung <bleung(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Prashant Malani <pmalani(a)chromium.org> Gerrit-CC: Prashant Malani <pmalani(a)google.com> Gerrit-Attention: Emilie Roberts <hadrosaur(a)google.com> Gerrit-Attention: Won Chung <wonchung(a)google.com> Gerrit-MessageType: newpatchset

1 0

[XS] Change in coreboot[main]: util/lint/lint: Fix shellcheck errors in getopt support for darwin
by Patrick Georgi (Code Review) 15 Mar '24

15 Mar '24

Attention is currently required from: Martin L Roth. Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81285?usp=email ) Change subject: util/lint/lint: Fix shellcheck errors in getopt support for darwin ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81285?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icbdc4204f4c07d806e721fa39f96694c4df00e8d Gerrit-Change-Number: 81285 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Fri, 15 Mar 2024 19:22:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[main]: util/lint/lint: Fix shellcheck errors in getopt support for darwin
by Martin L Roth (Code Review) 15 Mar '24

15 Mar '24

Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81285?usp=email ) Change subject: util/lint/lint: Fix shellcheck errors in getopt support for darwin ...................................................................... util/lint/lint: Fix shellcheck errors in getopt support for darwin Posix shell doesn't support '==' Change-Id: Icbdc4204f4c07d806e721fa39f96694c4df00e8d Signed-off-by: Martin Roth <gaumless(a)gmail.com> --- M util/lint/lint 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/81285/1 diff --git a/util/lint/lint b/util/lint/lint index 1896db1..56edaa6 100755 --- a/util/lint/lint +++ b/util/lint/lint @@ -30,7 +30,7 @@ } # Look if we have getopt. If not, build it. -if [ $(uname) == Darwin ]; then +if [ "$(uname)" = "Darwin" ]; then GETOPT="getopt hIJ" else GETOPT="getopt -l help,junit,invert -o hIJ" -- To view, visit https://review.coreboot.org/c/coreboot/+/81285?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icbdc4204f4c07d806e721fa39f96694c4df00e8d Gerrit-Change-Number: 81285 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: newchange

1 0

[XS] Change in coreboot[main]: drivers/spi: Add support for GD25LR512ME flash rom
by Felix Held (Code Review) 15 Mar '24

15 Mar '24

Attention is currently required from: Martin L Roth. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81284?usp=email ) Change subject: drivers/spi: Add support for GD25LR512ME flash rom ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81284?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iadb819e89a349d074e5ae9f4b62a06176f1f8f64 Gerrit-Change-Number: 81284 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Fri, 15 Mar 2024 19:20:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: mb/google/brya: Create a tivviks variant
by Subrata Banik (Code Review) 15 Mar '24

15 Mar '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, V Sowmya. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81262?usp=email ) Change subject: mb/google/brya: Create a tivviks variant ...................................................................... Patch Set 1: (4 comments) Patchset: PS1: I am slightly perplexed. 1. You have created a new variant named `Tivviks`. I expect that each new variant will have its own variant directory. 2. You then state that Tivviks will reuse the existing Nivviks variant as is. 3. This implies that Tivviks is an updated version of Nivviks that uses the TWL SoC. I would classify this as a SKU reference. Therefore, the approach in #2 defeats the purpose of #1. If the existing Nivviks variant directory can be reused for Tivviks, then why do we even need to create a new variant named Tivviks? 4. Ideally, we should have simply ensured that Nivviks is subscribed to the TWL SoC over ADL-N. We should also have updated the backend blobs to support the TWL SoC while maintaining backward compatibility with the ADL-N SoC. 5. If the reason for creating Tivviks as a variant is to maintain a separate .config file that can be used to select TWL-specific blobs over ADL-N blobs (because converged firmware between ADL-N and TWL is not yet available), then I believe this approach makes sense. However, we will eventually have to retire Tivviks when Intel releases the converged firmware for ADL-N and TWL. File src/mainboard/google/brya/Kconfig: https://review.coreboot.org/c/coreboot/+/81262/comment/7bbe200d_f6b3d7e7 : PS1, Line 463: select SOC_INTEL_TWINLAKE please follow the alphabetic order https://review.coreboot.org/c/coreboot/+/81262/comment/e3487602_43f54733 : PS1, Line 581: BOARD_GOOGLE_TIVVIKS please make a separate entry https://review.coreboot.org/c/coreboot/+/81262/comment/039a4b84_3f7d2e0a : PS1, Line 665: BOARD_GOOGLE_TIVVIKS why not use `Tivviks` as MAINBOARD_PART_NUMBER ? -- To view, visit https://review.coreboot.org/c/coreboot/+/81262?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia833a1dad45e13cd271506ade364b116c5880982 Gerrit-Change-Number: 81262 Gerrit-PatchSet: 1 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 15 Mar 2024 19:12:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[main]: drivers/spi: Add support for GD25LR512ME flash rom
by Martin L Roth (Code Review) 15 Mar '24

15 Mar '24

Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81284?usp=email ) Change subject: drivers/spi: Add support for GD25LR512ME flash rom ...................................................................... drivers/spi: Add support for GD25LR512ME flash rom This device is used on the AMD BirmanPlus board. Change-Id: Iadb819e89a349d074e5ae9f4b62a06176f1f8f64 Signed-off-by: Martin Roth <gaumless(a)gmail.com> --- M src/drivers/spi/gigadevice.c 1 file changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/81284/1 diff --git a/src/drivers/spi/gigadevice.c b/src/drivers/spi/gigadevice.c index 16ba27f..50bc222 100644 --- a/src/drivers/spi/gigadevice.c +++ b/src/drivers/spi/gigadevice.c @@ -124,6 +124,13 @@ .fast_read_dual_output_support = 1, .fast_read_dual_io_support = 1, }, + { + /* GD25LR512ME - 64MiB */ + .id[0] = 0x671A, + .nr_sectors_shift = 14, + .fast_read_dual_output_support = 1, + .fast_read_dual_io_support = 1, + }, }; const struct spi_flash_vendor_info spi_flash_gigadevice_vi = { -- To view, visit https://review.coreboot.org/c/coreboot/+/81284?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iadb819e89a349d074e5ae9f4b62a06176f1f8f64 Gerrit-Change-Number: 81284 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[main]: arch/riscv: Reformat C files with clang-format v16
by ron minnich (Code Review) 15 Mar '24

15 Mar '24

Attention is currently required from: Martin L Roth. ron minnich has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80011?usp=email ) Change subject: arch/riscv: Reformat C files with clang-format v16 ...................................................................... Patch Set 1: (2 comments) File src/arch/riscv/misaligned.c: https://review.coreboot.org/c/coreboot/+/80011/comment/ce6d4e61_d398e356 : PS1, Line 150: if ((EXTRACT_FIELD(ins, 0x3) == 3) && (EXTRACT_FIELD(ins, 0x1c) != 0x7)) { > this is great :-) Done File src/arch/riscv/virtual_memory.c: https://review.coreboot.org/c/coreboot/+/80011/comment/ce71c59e_2728a303 : PS1, Line 16: static int delegate = 0 | (1 << CAUSE_MISALIGNED_FETCH) | (1 << CAUSE_FETCH_ACCESS) | > this is a rare time that I'll confess to disliking the results of clangfmt. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/80011?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic863ec7e56f86da7f1967ac4c566bb988071d127 Gerrit-Change-Number: 80011 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Fri, 15 Mar 2024 18:35:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2024