coreboot-gerrit February 2024

coreboot-gerrit@coreboot.org

1 participants
3066 discussions

[S] Change in coreboot[main]: soc/intel/alderlake: Add RMT+ support
by Gaggery Tsai (Code Review) 06 Feb '24

06 Feb '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Jamie Ryu, Jérémy Compostella, Kane Chen, Kapil Porwal, Krishna P Bhat D, Nick Vaccaro, Paul Menzel, Pratikkumar V Prajapati, Ravishankar Sarawadi, Ronak Kanabar, Subrata Banik, Tarun Tuli, V Sowmya, Wonkyu Kim. Gaggery Tsai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77256?usp=email ) Change subject: soc/intel/alderlake: Add RMT+ support ...................................................................... Patch Set 15: (1 comment) File src/soc/intel/alderlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/77256/comment/2791481f_9c56f307 : PS15, Line 159: enable_rmt_plus(m_cfg); > Do you intend to enable it unconditionally? The control is at the common code. https://review.coreboot.org/c/coreboot/+/77904/6/src/soc/intel/common/block… -- To view, visit https://review.coreboot.org/c/coreboot/+/77256?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3b07d12e7701628f791e6a0f5f1d14b2e7673bc4 Gerrit-Change-Number: 77256 Gerrit-PatchSet: 15 Gerrit-Owner: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Tue, 06 Feb 2024 18:48:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: soc/intel/alderlake: Add RMT+ support
by Pratikkumar V Prajapati (Code Review) 06 Feb '24

06 Feb '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Gaggery, Jamie Ryu, Jérémy Compostella, Kane Chen, Kapil Porwal, Krishna P Bhat D, Nick Vaccaro, Paul Menzel, Ravishankar Sarawadi, Ronak Kanabar, Subrata Banik, Tarun Tuli, V Sowmya, Wonkyu Kim. Pratikkumar V Prajapati has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77256?usp=email ) Change subject: soc/intel/alderlake: Add RMT+ support ...................................................................... Patch Set 15: (1 comment) File src/soc/intel/alderlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/77256/comment/2505b7aa_49933dca : PS15, Line 159: enable_rmt_plus(m_cfg); Do you intend to enable it unconditionally? -- To view, visit https://review.coreboot.org/c/coreboot/+/77256?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3b07d12e7701628f791e6a0f5f1d14b2e7673bc4 Gerrit-Change-Number: 77256 Gerrit-PatchSet: 15 Gerrit-Owner: Gaggery <gaggery.tsai(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Gaggery <gaggery.tsai(a)intel.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Tue, 06 Feb 2024 18:07:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[main]: mb/google/brox: Initialize TCHSCR_RST_L/EN_PP3300_TCHSCR to 0
by Shelley Chen (Code Review) 06 Feb '24

06 Feb '24

Attention is currently required from: Eric Lai, Ivy Jian, Nick Vaccaro. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80300?usp=email ) Change subject: mb/google/brox: Initialize TCHSCR_RST_L/EN_PP3300_TCHSCR to 0 ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/brox/variants/baseboard/brox/gpio.c: https://review.coreboot.org/c/coreboot/+/80300/comment/2e7c4f36_51dd4f9e : PS2, Line 247: PAD_CFG_GPO(GPP_F7, 1, PLTRST), > I think the problem is you should change to DEEP for the power control pin. Hi Eric, I verified with the HW team that this reset for brox should be PLTRST and not DEEP. -- To view, visit https://review.coreboot.org/c/coreboot/+/80300?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5bf1901a3a40a38237b950abcb758f96aebcc1cf Gerrit-Change-Number: 80300 Gerrit-PatchSet: 2 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <ericllai(a)google.com> Gerrit-CC: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Tue, 06 Feb 2024 17:43:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <ericllai(a)google.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: superio/ite/env_ctrl: Allow to override the fan PWM clock
by Felix Singer (Code Review) 06 Feb '24

06 Feb '24

Attention is currently required from: Nico Huber. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80168?usp=email ) Change subject: superio/ite/env_ctrl: Allow to override the fan PWM clock ...................................................................... Patch Set 3: (1 comment) File src/superio/ite/common/env_ctrl.c: https://review.coreboot.org/c/coreboot/+/80168/comment/85d20333_5f8139c9 : PS1, Line 134: conf->fan_pwm_clock & 1 > Missing parentheses. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/80168?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5c43aec792195df835d1c39c9c25233899ba1a85 Gerrit-Change-Number: 80168 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Tue, 06 Feb 2024 17:27:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: mb/up/squared: Make mini PCIe port mode configurable
by Felix Singer (Code Review) 06 Feb '24

06 Feb '24

Attention is currently required from: Reto Buerki. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80261?usp=email ) Change subject: mb/up/squared: Make mini PCIe port mode configurable ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/80261/comment/eaf35f2f_fe09393a : PS2, Line 9: Add ENABLE_MSATA config knob and pad configuration to put Mini PCIe port : into mSATA mode. Did you test if the PCIe functionality still works? I'm wondering because you are not disabling the FSP options. File src/mainboard/up/squared/Kconfig: https://review.coreboot.org/c/coreboot/+/80261/comment/088954f7_94cd2ea6 : PS2, Line 77: config ENABLE_MSATA : bool "Use mini-PCIe port for mSATA" : default n I think a choice menu would be better since the distinction between both functions (SATA vs PCIe) is much more clear. -- To view, visit https://review.coreboot.org/c/coreboot/+/80261?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2da1dd4252ebb5e373bc65418e321f566d4c10f Gerrit-Change-Number: 80261 Gerrit-PatchSet: 2 Gerrit-Owner: Reto Buerki <reet(a)codelabs.ch> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Reto Buerki <reet(a)codelabs.ch> Gerrit-Comment-Date: Tue, 06 Feb 2024 17:25:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[main]: drivers/intel/fsp2_0: Support FSP 2.4 64-bits
by Wonkyu Kim (Code Review) 06 Feb '24

06 Feb '24

Attention is currently required from: Andrey Petrov, Arthur Heymans, Bora Guvendik, Christian Walter, Felix Held, Fred Reitberger, Jason Glenesk, Johnny Lin, Jérémy Compostella, Lean Sheng Tan, Matt DeVillier, Patrick Rudolph, Paul Menzel, Ronak Kanabar, Shuo Liu, Subrata Banik, Tim Chu. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80277?usp=email ) Change subject: drivers/intel/fsp2_0: Support FSP 2.4 64-bits ...................................................................... Patch Set 9: Code-Review+1 (2 comments) File src/drivers/intel/fsp2_0/include/fsp/util.h: https://review.coreboot.org/c/coreboot/+/80277/comment/9d8f4c25_8f831277 : PS9, Line 122: /* Helper function to print a message concatenated with the a FSP return status. */ Can we print 64bits status for both 32bit and 64bit mode to simplify code? I think it should not impact for both cases. File src/drivers/intel/fsp2_0/memory_init.c: https://review.coreboot.org/c/coreboot/+/80277/comment/6d9687c0_e006747f : PS7, Line 42: > Absolutely ! I just wanted the decision to be collegial. […] I also think we can simplify 16 byte align for both cases. -- To view, visit https://review.coreboot.org/c/coreboot/+/80277?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If0397f5cc8d0f4f1872bd37a001fe42e0c37ec99 Gerrit-Change-Number: 80277 Gerrit-PatchSet: 9 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 06 Feb 2024 17:07:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: cpu/x86: Add 1GiB pages for memory access up to 512GiB
by Wonkyu Kim (Code Review) 06 Feb '24

06 Feb '24

Attention is currently required from: Ashish Kumar Mishra, Paul Menzel, Subrata Banik. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80088?usp=email ) Change subject: cpu/x86: Add 1GiB pages for memory access up to 512GiB ...................................................................... Patch Set 9: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/80088?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id569ae5b50abf5b72e4db33b5e4cd802399e76ec Gerrit-Change-Number: 80088 Gerrit-PatchSet: 9 Gerrit-Owner: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 06 Feb 2024 16:48:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[XL] Change in coreboot[main]: mb/emulation: Add SIMICS QSP support
by Leon Groß (Code Review) 06 Feb '24

06 Feb '24

Attention is currently required from: Arthur Heymans, Benjamin Doron, Lean Sheng Tan, Leon Groß, Nico Huber, Paul Menzel. Hello Angel Pons, Arthur Heymans, Benjamin Doron, Christian Walter, Lean Sheng Tan, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77905?usp=email to look at the new patch set (#19). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/emulation: Add SIMICS QSP support ...................................................................... mb/emulation: Add SIMICS QSP support SIMICS Quick Start Platform (QSP) is weird. It doesn't implement a single X58 register besides DEVID/VENID. Likely because those are never used by an OS. As it is a slimmed-down entry-level platform, it is not so suitable for developing complex firmware. ICH10 seems to be more properly implemented. Working: - Boots to EDK2 payload (payloads/external/edk2) - TSEG works, ASEG is broken - Graphics init works Signed-off-by: Leon Gross <leon.gross(a)9elements.com> Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 --- A Documentation/mainboard/emulation/simics-qsp.md M src/cpu/qemu-x86/Kconfig A src/mainboard/emulation/simics-qsp/Kconfig A src/mainboard/emulation/simics-qsp/Kconfig.name A src/mainboard/emulation/simics-qsp/Makefile.inc A src/mainboard/emulation/simics-qsp/acpi.h A src/mainboard/emulation/simics-qsp/acpi_tables.c A src/mainboard/emulation/simics-qsp/board_info.txt A src/mainboard/emulation/simics-qsp/bootblock.c A src/mainboard/emulation/simics-qsp/cmos.default A src/mainboard/emulation/simics-qsp/cmos.layout A src/mainboard/emulation/simics-qsp/cpu.c A src/mainboard/emulation/simics-qsp/devicetree.cb A src/mainboard/emulation/simics-qsp/dsdt.asl A src/mainboard/emulation/simics-qsp/exit_car.S A src/mainboard/emulation/simics-qsp/hda_verb.c A src/mainboard/emulation/simics-qsp/mainboard.c A src/mainboard/emulation/simics-qsp/memmap.c A src/mainboard/emulation/simics-qsp/memory.h A src/mainboard/emulation/simics-qsp/northbridge.c A src/mainboard/emulation/simics-qsp/romstage.c A src/mainboard/emulation/simics-qsp/vboot-rwa-16M.fmd A src/mainboard/emulation/simics-qsp/vboot-rwab-16M.fmd M src/southbridge/intel/i82801jx/Kconfig 24 files changed, 1,237 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/77905/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/77905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 Gerrit-Change-Number: 77905 Gerrit-PatchSet: 19 Gerrit-Owner: Leon Groß <leon.gross(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Leon Groß <leon.gross(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[main]: cpu/x86: Add 1GiB pages for memory access up to 512GiB
by Jérémy Compostella (Code Review) 06 Feb '24

06 Feb '24

Attention is currently required from: Ashish Kumar Mishra, Paul Menzel, Subrata Banik, Wonkyu Kim. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80088?usp=email ) Change subject: cpu/x86: Add 1GiB pages for memory access up to 512GiB ...................................................................... Patch Set 9: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/80088?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id569ae5b50abf5b72e4db33b5e4cd802399e76ec Gerrit-Change-Number: 80088 Gerrit-PatchSet: 9 Gerrit-Owner: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 06 Feb 2024 16:34:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[main]: sb/intel/i82371eb/isa: make IOAPIC ID const
by Felix Held (Code Review) 06 Feb '24

06 Feb '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80349?usp=email ) Change subject: sb/intel/i82371eb/isa: make IOAPIC ID const ...................................................................... sb/intel/i82371eb/isa: make IOAPIC ID const Since the local IOAPIC ID variable is initialized as 2 and never changed afterwards, so make it const to make this more obvious. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I1f19cc43b44a938758a43346f4fa75f8ed39ddea Reviewed-on: https://review.coreboot.org/c/coreboot/+/80349 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/southbridge/intel/i82371eb/isa.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Nico Huber: Looks good to me, but someone else must approve diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c index 7d86e8a..9d03de0 100644 --- a/src/southbridge/intel/i82371eb/isa.c +++ b/src/southbridge/intel/i82371eb/isa.c @@ -53,7 +53,7 @@ */ if (CONFIG(IOAPIC)) { u16 reg16; - u8 ioapic_id = 2; + const u8 ioapic_id = 2; /* Enable IOAPIC. */ reg16 = pci_read_config16(dev, XBCS); -- To view, visit https://review.coreboot.org/c/coreboot/+/80349?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1f19cc43b44a938758a43346f4fa75f8ed39ddea Gerrit-Change-Number: 80349 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit February 2024