coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: \ec/starlabs/merlin: Add support for setting the charging speed
by Sean Rhodes (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Maxim, Paul Menzel. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84633?usp=email ) Change subject: \ec/starlabs/merlin: Add support for setting the charging speed ...................................................................... Patch Set 10: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84633/comment/707a0255_5f3b6afa?us… : PS9, Line 9: Allow boards that use the merlin EC to configure the charging speed. > Please elaborate, for example CMOS is used, and maybe reference the firmware API? Done https://review.coreboot.org/c/coreboot/+/84633/comment/e4e1221b_0ad1658d?us… : PS9, Line 9: merlin EC > 1. Is a certain firmware version needed? […] Done https://review.coreboot.org/c/coreboot/+/84633/comment/c27bea85_0586a7a4?us… : PS9, Line 10: > How was this tested? Done File src/ec/starlabs/merlin/Kconfig: https://review.coreboot.org/c/coreboot/+/84633/comment/b3040d5f_51d7cf4c?us… : PS9, Line 71: Select if the mainboard supports configuring the charging speed > Please add a dot/period at the end. Done https://review.coreboot.org/c/coreboot/+/84633/comment/23226364_679137cc?us… : PS9, Line 71: Select if the mainboard supports configuring the charging speed > Mayeb elaborate, how this can be configured? Done File src/ec/starlabs/merlin/variants/merlin/ecdefs.h: https://review.coreboot.org/c/coreboot/+/84633/comment/27e17428_91d95389?us… : PS9, Line 23: ECRAM_MIRROR_FLAG > It seems to me that this has nothing to do with the charge speed. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84633?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I46faa540530c5bd7f5473021561380213158152e Gerrit-Change-Number: 84633 Gerrit-PatchSet: 10 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Maxim <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maxim <max.senia.poliak(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 20 Dec 2024 09:34:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maxim <max.senia.poliak(a)gmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: \ec/starlabs/merlin: Add support for setting the charging speed
by Sean Rhodes (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Maxim, Sean Rhodes. Hello Maxim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84633?usp=email to look at the new patch set (#10). The following approvals got outdated and were removed: Code-Review+1 by Maxim, Verified+1 by build bot (Jenkins) Change subject: \ec/starlabs/merlin: Add support for setting the charging speed ...................................................................... \ec/starlabs/merlin: Add support for setting the charging speed Allow boards that use the merlin EC to configure the charging speed, as all versions of the merlin EC support this. All coreboot does it write a value to the EC RAM and the EC will handle the rest. Change-Id: I46faa540530c5bd7f5473021561380213158152e Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/ec/starlabs/merlin/Kconfig M src/ec/starlabs/merlin/ec.h M src/ec/starlabs/merlin/ite.c M src/ec/starlabs/merlin/variants/apl/ecdefs.h M src/ec/starlabs/merlin/variants/cezanne/ecdefs.h M src/ec/starlabs/merlin/variants/glk/ecdefs.h M src/ec/starlabs/merlin/variants/glkr/ecdefs.h M src/ec/starlabs/merlin/variants/kbl/ecdefs.h M src/ec/starlabs/merlin/variants/merlin/ecdefs.h M src/mainboard/starlabs/starbook/Kconfig M src/mainboard/starlabs/starbook/cmos.default M src/mainboard/starlabs/starbook/cmos.layout M src/mainboard/starlabs/starfighter/Kconfig M src/mainboard/starlabs/starfighter/cmos.default M src/mainboard/starlabs/starfighter/cmos.layout M src/mainboard/starlabs/starlite_adl/Kconfig M src/mainboard/starlabs/starlite_adl/cmos.default M src/mainboard/starlabs/starlite_adl/cmos.layout 18 files changed, 63 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/84633/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/84633?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I46faa540530c5bd7f5473021561380213158152e Gerrit-Change-Number: 84633 Gerrit-PatchSet: 10 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Maxim <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Maxim <max.senia.poliak(a)gmail.com>

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[S] Change in coreboot[main]: mb/starlabs/starlite_adl: Configure GPIO interrupt for Virtual Button
by Sean Rhodes (Code Review) 20 Dec '24

20 Dec '24

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83880?usp=email ) ( 8 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/starlabs/starlite_adl: Configure GPIO interrupt for Virtual Button ...................................................................... mb/starlabs/starlite_adl: Configure GPIO interrupt for Virtual Button Configure GPP_F15 to generate an IRQ, that is used by the Virtual Button driver to report whether the tablet is docked or undocked to the OS. Change-Id: I0815da09bd7ffd3926622e10df6a06ab5593dc2d Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83880 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Maxim <max.senia.poliak(a)gmail.com> --- M src/mainboard/starlabs/starlite_adl/acpi/mainboard.asl M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb M src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c 3 files changed, 12 insertions(+), 4 deletions(-) Approvals: Maxim: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/starlabs/starlite_adl/acpi/mainboard.asl b/src/mainboard/starlabs/starlite_adl/acpi/mainboard.asl index 34b90af..de4f6f6 100644 --- a/src/mainboard/starlabs/starlite_adl/acpi/mainboard.asl +++ b/src/mainboard/starlabs/starlite_adl/acpi/mainboard.asl @@ -3,3 +3,11 @@ Scope (\_SB) { #include "sleep.asl" } + +Scope (_GPE) +{ + Method (_L0F, 0, NotSerialized) + { + \_SB.PCI0.LPCB.EC.VBTN.UPDK() + } +} diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb index 3221d39..02f96f6 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb @@ -22,9 +22,9 @@ register "pch_slp_a_min_assertion_width" = "3" # 2s # PM Util - register "pmc_gpe0_dw0" = "GPP_A" - register "pmc_gpe0_dw1" = "GPP_R" - register "pmc_gpe0_dw2" = "GPD" + register "pmc_gpe0_dw0" = "PMC_GPP_F" + register "pmc_gpe0_dw1" = "GPP_A" + register "pmc_gpe0_dw2" = "GPP_B" device domain 0 on device ref igpu on diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c index 9b8bdf2..d026769 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c @@ -319,7 +319,7 @@ /* F14: Not Connected */ PAD_NC(GPP_F14, NONE), /* F15: Keyboard Detect */ - PAD_NC(GPP_F15, NONE), + PAD_CFG_GPI_SMI_LOW(GPP_F15, NONE, DEEP, EDGE_BOTH), /* F16: Not Connected */ PAD_NC(GPP_F16, NONE), /* F17: Touch Panel Reset */ -- To view, visit https://review.coreboot.org/c/coreboot/+/83880?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0815da09bd7ffd3926622e10df6a06ab5593dc2d Gerrit-Change-Number: 83880 Gerrit-PatchSet: 13 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Maxim <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: soc/mediatek: Add support for MediaTek firmware support package
by Yu-Ping Wu (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85665?usp=email ) Change subject: soc/mediatek: Add support for MediaTek firmware support package ...................................................................... Patch Set 6: Code-Review+2 (1 comment) File src/soc/mediatek/common/mtk_fsp.c: https://review.coreboot.org/c/coreboot/+/85665/comment/22b55d83_3a0354f7?us… : PS2, Line 92: prog_set_entry(&fsp, prog_entry(&fsp), intf); > `prog_set_entry` should be sufficient. […] I meant changing `prog_set_entry` to `prog_set_arg`. We don't need to reset `prog->entry` to the same value. -- To view, visit https://review.coreboot.org/c/coreboot/+/85665?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idef3518f9763fe5f74adb459c137db164563e483 Gerrit-Change-Number: 85665 Gerrit-PatchSet: 6 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 09:28:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: ec/starlabs/merlin: Add Intel Virtual Button Driver for Tablet Mode
by Sean Rhodes (Code Review) 20 Dec '24

20 Dec '24

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83879?usp=email ) Change subject: ec/starlabs/merlin: Add Intel Virtual Button Driver for Tablet Mode ...................................................................... ec/starlabs/merlin: Add Intel Virtual Button Driver for Tablet Mode This patch adds support for the Intel Virtual Button driver, which reports whether a tablet is docked or undocked. The GPIO used for detection is hardcoded to GPP_F15 for now, specific to the `mb/starlite_adl` board. The GPIO value is returned to the HID driver via the `_STA` and `VGBS` methods. These methods ensure proper notification to the OS, allowing it to show or hide the virtual keyboard depending on the docking status. Tested on `starlite_adl` with Ubuntu 24.04, confirming the virtual keyboard appears when the tablet is undocked and hides when docked. This was verified with ACPI debug enabled, as dmesg does not report the state of the GPIO. Change-Id: I574a1b2d3907b2341a0dfdc412151d574ba4848e Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83879 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- A src/ec/starlabs/merlin/acpi/dock.asl M src/ec/starlabs/merlin/acpi/ec.asl M src/ec/starlabs/merlin/acpi/hid.asl 3 files changed, 57 insertions(+), 1 deletion(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/ec/starlabs/merlin/acpi/dock.asl b/src/ec/starlabs/merlin/acpi/dock.asl new file mode 100644 index 0000000..8d648bc --- /dev/null +++ b/src/ec/starlabs/merlin/acpi/dock.asl @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Device (VBTN) +{ + Name (_HID, "INT33D6") + Name (_UID, 1) + Name (_DDN, "Intel Virtual Button Driver") + + Method (_STA, 0, NotSerialized) + { + Return (0x0f) + } + + Method (VBDL) + { + } + + Method (UPDK, 0, Serialized) + { + Local0 = VGBS() + + If (Local0 == 0) { + Printf ("Tablet Mode") + Notify (HIDD, 0xcc) /* Tablet */ + } Else { + Printf ("Docked") + Notify (HIDD, 0xcd) /* Docked */ + } + Return (Local0) + } + + Method (VGBS, 0) + { +#if CONFIG(SYSTEM_TYPE_DETACHABLE) + If (!GRXS (GPP_F15)) + { + Return (0x40) + } +#endif + Return (0x00) + } +} + +Device (VBTO) +{ + Name (_HID, "INT33D3") + Name (_CID, "PNP0C60") + Name (_UID, 1) + Name (_DDN, "Laptop/tablet mode indicator driver") + + Method (_STA, 0) + { + Return (0xf) + } +} diff --git a/src/ec/starlabs/merlin/acpi/ec.asl b/src/ec/starlabs/merlin/acpi/ec.asl index 52cab91..7eec057 100644 --- a/src/ec/starlabs/merlin/acpi/ec.asl +++ b/src/ec/starlabs/merlin/acpi/ec.asl @@ -137,6 +137,7 @@ #include "battery.asl" #include "events.asl" #include "lid.asl" + #include "dock.asl" Method (_REG, 2, NotSerialized) { diff --git a/src/ec/starlabs/merlin/acpi/hid.asl b/src/ec/starlabs/merlin/acpi/hid.asl index a9de7da..15f02fc 100644 --- a/src/ec/starlabs/merlin/acpi/hid.asl +++ b/src/ec/starlabs/merlin/acpi/hid.asl @@ -351,7 +351,7 @@ // Case (0x08) { - Return (0x00) + Return (\_SB.PCI0.LPCB.EC.VBTN.VGBS()) } // // Function 9 H2BC. Button implemented state. -- To view, visit https://review.coreboot.org/c/coreboot/+/83879?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I574a1b2d3907b2341a0dfdc412151d574ba4848e Gerrit-Change-Number: 83879 Gerrit-PatchSet: 13 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: soc/intel/alderlake: Change the maximum C state to C8
by Sean Rhodes (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Michał Żygowski, Nick Vaccaro, Subrata Banik. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84622?usp=email ) Change subject: soc/intel/alderlake: Change the maximum C state to C8 ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/alderlake/acpi.c: https://review.coreboot.org/c/coreboot/+/84622/comment/0edef583_038238b9?us… : PS2, Line 107: C_STATE_C7S_LONG_LAT > For PCH-S and PCH-N I have simply put C8 state here as it is supported and also does not yield error […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84622?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb3e4d34361c8ac25ef144c0d1cda9f801ed0c54 Gerrit-Change-Number: 84622 Gerrit-PatchSet: 4 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 20 Dec 2024 09:25:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8189: Add timer support
by Yu-Ping Wu (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Hung-Te Lin, Vince Liu. Yu-Ping Wu has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/85689?usp=email ) Change subject: soc/mediatek/mt8189: Add timer support ...................................................................... Patch Set 1: Code-Review+1 (1 comment) File src/soc/mediatek/mt8189/Makefile.mk: https://review.coreboot.org/c/coreboot/+/85689/comment/e5316a28_b4060a3e?us… : PS1, Line 6: timer.c ../common/timer_prepare.c `../common/timer_prepare.c timer.c` -- To view, visit https://review.coreboot.org/c/coreboot/+/85689?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I28c051c2e51481464f5dacb4c93f41e4f7e62501 Gerrit-Change-Number: 85689 Gerrit-PatchSet: 1 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 09:25:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/alderlake: Add IRQ mapping for PEG PCI-E ports
by Sean Rhodes (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Michał Żygowski, Nick Vaccaro, Subrata Banik. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84620?usp=email ) Change subject: soc/intel/alderlake: Add IRQ mapping for PEG PCI-E ports ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/alderlake/acpi/pcie_pch_s.asl: https://review.coreboot.org/c/coreboot/+/84620/comment/199706cf_0f07dbb6?us… : PS2, Line 278: : OperationRegion (RPCS, PCI_Config, 0x4c, 4) : Field (RPCS, AnyAcc, NoLock, Preserve) : { : , 24, : RPPN, 8, /* Root Port Number */ : } : : Method (_PRT) : { : Return (IRQM (RPPN)) : } : } : : Device (PEG1) : { : Name (_ADR, 0x00010000) : : OperationRegion (RPCS, PCI_Config, 0x4c, 4) : Field (RPCS, AnyAcc, NoLock, Preserve) : { : , 24, : RPPN, 8, /* Root Port Number */ : } : : Method (_PRT) : { : Return (IRQM (RPPN)) : } : } : : Device (PEG2) : { : Name (_ADR, 0x00010001) : : OperationRegion (RPCS, PCI_Config, 0x4c, 4) : Field (RPCS, AnyAcc, NoLock, Preserve) : { : , 24, : RPPN, 8, /* Root Port Number */ : } : : Method (_PRT) : { : Return (IRQM (RPPN)) : } > For PCH-S this is the only set of IRQs that was working: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84620?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2e36cee37716d3b003b9ce250f28fdf5581a15bc Gerrit-Change-Number: 84620 Gerrit-PatchSet: 4 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 20 Dec 2024 09:25:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com>

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add SPM loader
by Yu-Ping Wu (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Alicja Michalska, Ccong Chen, Hung-Te Lin, Jarried Lin. Yu-Ping Wu has posted comments on this change by Ccong Chen. ( https://review.coreboot.org/c/coreboot/+/85599?usp=email ) Change subject: soc/mediatek/mt8196: Add SPM loader ...................................................................... Patch Set 15: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85599?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie09346f46cb734c74776b760485e7f35d4357e5e Gerrit-Change-Number: 85599 Gerrit-PatchSet: 15 Gerrit-Owner: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-CC: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Attention: Ccong Chen <ot_ccong.chen(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 09:21:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/intel/apollolake: Add a loader for the IBB
by Sean Rhodes (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Andrey Petrov, Angel Pons, Arthur Heymans, Michał Żygowski, Sean Rhodes, Subrata Banik. Hello Andrey Petrov, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/65270?usp=email to look at the new patch set (#78). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/apollolake: Add a loader for the IBB ...................................................................... soc/intel/apollolake: Add a loader for the IBB Add a loader that will load the IBB into the CSE via the Ring Protocol Buffer. All registers were taken from Intel document number #336561. Change-Id: Ia41e3909f8099d2ea864166e9ea03e10e40a1b68 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/soc/intel/apollolake/Makefile.mk A src/soc/intel/apollolake/bootflow.md A src/soc/intel/apollolake/include/soc/loader.h A src/soc/intel/apollolake/loader.c 4 files changed, 206 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/65270/78 -- To view, visit https://review.coreboot.org/c/coreboot/+/65270?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia41e3909f8099d2ea864166e9ea03e10e40a1b68 Gerrit-Change-Number: 65270 Gerrit-PatchSet: 78 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com>

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