coreboot-gerrit December 2024

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Initialize SSPM
by Jarried Lin (Code Review) 11 Dec '24

11 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Kenji Yu, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Kenji Yu, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85516?usp=email to look at the new patch set (#17). Change subject: soc/mediatek/mt8196: Initialize SSPM ...................................................................... soc/mediatek/mt8196: Initialize SSPM SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable it. It takes 20 ms to load sspm.bin. coreboot logs: CBFS: Found 'sspm.bin' @0x62c00 size 0x21ab6 in mcache @0xfffdd314 mtk_init_mcu: Loaded (and reset) sspm.bin in 20 msecs (256212 bytes) TEST=can see the sspm logs. BUG=b:372173976 Change-Id: Ic56f0bad2f4cbf11d5711425d57c3b5b6bf283f0 Signed-off-by: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/common/include/soc/sspm.h M src/soc/mediatek/common/sspm.c M src/soc/mediatek/mt8196/Kconfig M src/soc/mediatek/mt8196/Makefile.mk M src/soc/mediatek/mt8196/include/soc/addressmap.h M src/soc/mediatek/mt8196/soc.c A src/soc/mediatek/mt8196/sspm_sram.c 7 files changed, 39 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/85516/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/85516?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic56f0bad2f4cbf11d5711425d57c3b5b6bf283f0 Gerrit-Change-Number: 85516 Gerrit-PatchSet: 17 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Initialize SSPM
by Jarried Lin (Code Review) 11 Dec '24

11 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Kenji Yu, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Kenji Yu, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85516?usp=email to look at the new patch set (#16). The following approvals got outdated and were removed: Code-Review+1 by Yidi Lin, Code-Review+1 by Yu-Ping Wu, Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Initialize SSPM ...................................................................... soc/mediatek/mt8196: Initialize SSPM SSPM is "Secure System Power Manager" that provides power control in secure domain. The initialization flow is to load SSPM firmware to its SRAM space and then enable. It takes 20 ms to load sspm.bin. coreboot logs: CBFS: Found 'sspm.bin' @0x62c00 size 0x21ab6 in mcache @0xfffdd314 mtk_init_mcu: Loaded (and reset) sspm.bin in 20 msecs (256212 bytes) TEST=can see the sspm logs. BUG=b:372173976 Change-Id: Ic56f0bad2f4cbf11d5711425d57c3b5b6bf283f0 Signed-off-by: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/common/include/soc/sspm.h M src/soc/mediatek/common/sspm.c M src/soc/mediatek/mt8196/Kconfig M src/soc/mediatek/mt8196/Makefile.mk M src/soc/mediatek/mt8196/include/soc/addressmap.h M src/soc/mediatek/mt8196/soc.c A src/soc/mediatek/mt8196/sspm_sram.c 7 files changed, 39 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/85516/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/85516?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic56f0bad2f4cbf11d5711425d57c3b5b6bf283f0 Gerrit-Change-Number: 85516 Gerrit-PatchSet: 16 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Adding device id for Crashlog and Telemetry
by Sowmya Aralguppe (Code Review) 11 Dec '24

11 Dec '24

Attention is currently required from: Subrata Banik. Hello Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85372?usp=email to look at the new patch set (#8). Change subject: soc/intel/pantherlake: Adding device id for Crashlog and Telemetry ...................................................................... soc/intel/pantherlake: Adding device id for Crashlog and Telemetry This patch adds device id for Crashlog and Telemetry. CPU crashlog record is stored in punit SRAM. Source: EDS 815002 BUG=None TEST=Build fatcat and boot with Panther Lake SoC with added device id. Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Change-Id: I2959623986108a2c5e3dce16e892913a42d71755 --- M src/include/device/pci_ids.h M src/soc/intel/common/block/sram/sram.c 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/85372/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/85372?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2959623986108a2c5e3dce16e892913a42d71755 Gerrit-Change-Number: 85372 Gerrit-PatchSet: 8 Gerrit-Owner: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Adding device id for Crashlog and Telemetry
by Sowmya Aralguppe (Code Review) 11 Dec '24

11 Dec '24

Attention is currently required from: Subrata Banik. Hello Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85372?usp=email to look at the new patch set (#7). Change subject: soc/intel/pantherlake: Adding device id for Crashlog and Telemetry ...................................................................... soc/intel/pantherlake: Adding device id for Crashlog and Telemetry This patch adds device id for Crashlog and Telemetry. CPU crashlog record is stored in punit SRAM. Source: EDS 815002 BUG=None TEST=Build fatcat and boot with Panther Lake SoC with added device id. Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Change-Id: I2959623986108a2c5e3dce16e892913a42d71755 --- M src/include/device/pci_ids.h M src/soc/intel/common/block/sram/sram.c 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/85372/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/85372?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2959623986108a2c5e3dce16e892913a42d71755 Gerrit-Change-Number: 85372 Gerrit-PatchSet: 7 Gerrit-Owner: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Adding device id for Crashlog and Telemetry
by Sowmya Aralguppe (Code Review) 11 Dec '24

11 Dec '24

Attention is currently required from: Subrata Banik. Hello Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85372?usp=email to look at the new patch set (#6). Change subject: soc/intel/pantherlake: Adding device id for Crashlog and Telemetry ...................................................................... soc/intel/pantherlake: Adding device id for Crashlog and Telemetry This patch adds device id for Crashlog and Telemetry .CPU crashlog record is stored in punit SRAM. Source: EDS 815002 BUG=None TEST=Build fatcat and boot with Panther Lake SoC with added device id. Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Change-Id: I2959623986108a2c5e3dce16e892913a42d71755 --- M src/include/device/pci_ids.h M src/soc/intel/common/block/sram/sram.c 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/85372/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/85372?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2959623986108a2c5e3dce16e892913a42d71755 Gerrit-Change-Number: 85372 Gerrit-PatchSet: 6 Gerrit-Owner: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Adding device id for Crashlog and Telemetry
by Sowmya Aralguppe (Code Review) 11 Dec '24

11 Dec '24

Attention is currently required from: Subrata Banik. Sowmya Aralguppe has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/85372?usp=email ) Change subject: soc/intel/pantherlake: Adding device id for Crashlog and Telemetry ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/common/block/sram/sram.c: https://review.coreboot.org/c/coreboot/+/85372/comment/aae3cfe0_1d27db78?us… : PS4, Line 55: PCI_DID_INTEL_PTL_PUNIT_CRASHLOG_SRAM, > please add at line 38 Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85372?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2959623986108a2c5e3dce16e892913a42d71755 Gerrit-Change-Number: 85372 Gerrit-PatchSet: 5 Gerrit-Owner: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Wed, 11 Dec 2024 10:01:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Adding device id for Crashlog and Telemetry
by Sowmya Aralguppe (Code Review) 11 Dec '24

11 Dec '24

Attention is currently required from: Sowmya Aralguppe. Hello Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85372?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/pantherlake: Adding device id for Crashlog and Telemetry ...................................................................... soc/intel/pantherlake: Adding device id for Crashlog and Telemetry This patch adds device id for Crashlog and Telemetry .CPU crashlog record is stored in punit SRAM. Source: EDS 815002 BUG=None TEST=Build fatcat and boot with Panther Lake SoC with added device id. Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Change-Id: I2959623986108a2c5e3dce16e892913a42d71755 --- M src/include/device/pci_ids.h M src/soc/intel/common/block/sram/sram.c 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/85372/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/85372?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2959623986108a2c5e3dce16e892913a42d71755 Gerrit-Change-Number: 85372 Gerrit-PatchSet: 5 Gerrit-Owner: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com>

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add SPM firmware v1.0
by Jarried Lin (Code Review) 11 Dec '24

11 Dec '24

Attention is currently required from: Wenzhen Yu. Jarried Lin has posted comments on this change by Wenzhen Yu. ( https://review.coreboot.org/c/blobs/+/85285?usp=email ) Change subject: soc/mediatek/mt8196: Add SPM firmware v1.0 ...................................................................... Patch Set 7: (2 comments) Commit Message: https://review.coreboot.org/c/blobs/+/85285/comment/b67d0490_8d2e431a?usp=e… : PS6, Line 7: meidatek > soc/mediatek/mt8196: Done https://review.coreboot.org/c/blobs/+/85285/comment/dfa72206_1c4e6d41?usp=e… : PS6, Line 9: Add spm firmware load and initial spm firmware > Add initial SPM firmware. Done -- To view, visit https://review.coreboot.org/c/blobs/+/85285?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ic5b5417b9b746fcca225209d9b17108a2499ac71 Gerrit-Change-Number: 85285 Gerrit-PatchSet: 7 Gerrit-Owner: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Wed, 11 Dec 2024 09:58:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add SPM firmware v1.0
by Jarried Lin (Code Review) 11 Dec '24

11 Dec '24

Attention is currently required from: Jarried Lin, Wenzhen Yu. Jarried Lin has uploaded a new patch set (#7) to the change originally created by Wenzhen Yu. ( https://review.coreboot.org/c/blobs/+/85285?usp=email ) Change subject: soc/mediatek/mt8196: Add SPM firmware v1.0 ...................................................................... soc/mediatek/mt8196: Add SPM firmware v1.0 Add initial SPM firmware. TEST=build pass BUG=b:348147674 Change-Id: Ic5b5417b9b746fcca225209d9b17108a2499ac71 Signed-off-by: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/README.md A soc/mediatek/mt8196/spm_firmware.bin A soc/mediatek/mt8196/spm_firmware.bin.md5 A soc/mediatek/mt8196/spm_release_notes.txt 4 files changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/blobs refs/changes/85/85285/7 -- To view, visit https://review.coreboot.org/c/blobs/+/85285?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ic5b5417b9b746fcca225209d9b17108a2499ac71 Gerrit-Change-Number: 85285 Gerrit-PatchSet: 7 Gerrit-Owner: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Wenzhen Yu <wenzhen.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[M] Change in coreboot[main]: mb/google/brya/var/uldrenite: Add HDA verb tables
by Paul Menzel (Code Review) 11 Dec '24

11 Dec '24

Attention is currently required from: John Su. Paul Menzel has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/85448?usp=email ) Change subject: mb/google/brya/var/uldrenite: Add HDA verb tables ...................................................................... Patch Set 5: (6 comments) Patchset: PS5: Please send a follow-up to fix the style issues. File src/mainboard/google/brya/variants/uldrenite/hda_verb.c: https://review.coreboot.org/c/coreboot/+/85448/comment/3aa3476b_335b5fa0?us… : PS5, Line 7: 0x10ec0236, //Codec Vendor / Device ID: Realtek ALC3204 Please properly align the comment. https://review.coreboot.org/c/coreboot/+/85448/comment/7ab5f565_0a642b96?us… : PS5, Line 16: /* : * DMIC : * Requirement is to use PCH DMIC. Hence, : * commented out codec's Internal DMIC. : * AZALIA_PIN_CFG(0, 0x12, 0x90A60130), : * AZALIA_PIN_CFG(0, 0x13, 0x40000000), : */ Please align the asterisks. https://review.coreboot.org/c/coreboot/+/85448/comment/dacb2eb2_31d2141e?us… : PS5, Line 55: * + Combo Jack TRS setting */ Please use coreboot’s recommended concise multi-line comment styles. https://review.coreboot.org/c/coreboot/+/85448/comment/02107709_6c211442?us… : PS5, Line 143: //=== PCBeep pass through to NID14 for ePSA test-1 Why this strange comment style (===)? https://review.coreboot.org/c/coreboot/+/85448/comment/3ac2b90f_507fadf3?us… : PS5, Line 148: //=== PCBeep pass through to NID14 for ePSA test-2 Ditto. -- To view, visit https://review.coreboot.org/c/coreboot/+/85448?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie9d0e17e1ab13adc8aea0d5bcbbe44785a137d7b Gerrit-Change-Number: 85448 Gerrit-PatchSet: 5 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Wed, 11 Dec 2024 09:15:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit December 2024