December 2024 - coreboot-gerrit

Change in coreboot[master]: soc/intel/common/gpio_defs: Add macros for bidirectional pad
by Maxim Polyakov (Code Review) Jan. 22, 2025

Jan. 22, 2025

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42914 ) Change subject: soc/intel/common/gpio_defs: Add macros for bidirectional pad ...................................................................... soc/intel/common/gpio_defs: Add macros for bidirectional pad Adds new macros to configure the pad in bidirectional mode when both (Tx/Rx) buffers are enabled in the configuration register DW0. Change-Id: I7b65f4da7616f2eefcd33a728d4d3ae5a79b014e Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M src/soc/intel/common/block/include/intelblocks/gpio_defs.h 1 file changed, 14 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/42914/1 diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index 0668131..9bfc5dd 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -301,6 +301,20 @@ #define PAD_CFG_GPI_INT(pad, pull, rst, trig) \ PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, DRIVER) +/* Bidirectional GPIO port when both RX and TX buffer is enabled */ +#define PAD_CFG_GPIO_BIDIRECT_IOS(pad, val, pull, rst, trig, iosstate, iosterm, own) \ + _PAD_CFG_STRUCT(pad, \ + PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \ + PAD_BUF(NO_DISABLE) | val, \ + PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own) | \ + PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm)) + +#define PAD_CFG_GPIO_BIDIRECT(pad, val, pull, rst, trig, own) \ + _PAD_CFG_STRUCT(pad, \ + PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_TRIG(trig) | \ + PAD_BUF(NO_DISABLE) | val, \ + PAD_PULL(pull) | PAD_CFG_OWN_GPIO(own)) + /* * No Connect configuration for unused pad. * Both TX and RX are disabled. RX disabling is done to avoid unnecessary -- To view, visit https://review.coreboot.org/c/coreboot/+/42914 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b65f4da7616f2eefcd33a728d4d3ae5a79b014e Gerrit-Change-Number: 42914 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: qualcomm/common: Remove dead code
by Yidi Lin (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Ariel Otilibili. Yidi Lin has posted comments on this change by Ariel Otilibili. ( https://review.coreboot.org/c/coreboot/+/85778?usp=email ) Change subject: qualcomm/common: Remove dead code ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/85778?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I40cffcf3714decfc54f2bbce9d4a867a9313d72e Gerrit-Change-Number: 85778 Gerrit-PatchSet: 1 Gerrit-Owner: Ariel Otilibili Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-CC: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Ariel Otilibili Gerrit-Comment-Date: Tue, 31 Dec 2024 22:56:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Set SPMI-P SCL/SDA pins to pull-down
by Yidi Lin (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Hope Wang, Hung-Te Lin, Jarried Lin. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85751?usp=email ) Change subject: soc/mediatek/mt8196: Set SPMI-P SCL/SDA pins to pull-down ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85751?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idbf8ed8e31850ca81c823db1b25bde4a83a48c4f Gerrit-Change-Number: 85751 Gerrit-PatchSet: 9 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 22:52:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: lib/{fit,fit_payload}.c: Enhance support for FIT images
by Benjamin Doron (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune, Philipp Hug, ron minnich. Benjamin Doron has posted comments on this change by Benjamin Doron. ( https://review.coreboot.org/c/coreboot/+/84796?usp=email ) Change subject: lib/{fit,fit_payload}.c: Enhance support for FIT images ...................................................................... Patch Set 10: (9 comments) File payloads/Kconfig: https://review.coreboot.org/c/coreboot/+/84796/comment/614d2330_1fe889af?us… : PS9, Line 186: default y if PAYLOAD_LINUX && (ARCH_ARM64 || ARCH_RISCV || ARCH_ARM) > nit: unclear why these shift around? Oh, I think that made it align with other instances of this dependency in the file, which allowed me to search for it more easily. If a shorter diff is preferred, I can change it back. File src/lib/fit.c: https://review.coreboot.org/c/coreboot/+/84796/comment/d9b69d6e_05e68ef3?us… : PS6, Line 136: image->load_address = be64dec(prop->prop.data); > These two still need to be #address-cells dependent, since in this case it actually says so in the s […] Right. I didn't realise at first that `dt_find_node_by_path` actually initialises addr_cells and size_cells to (2, 1) immediately, then assigns them again if it finds the properties. This is why I held off on making the change. Anyways, done. https://review.coreboot.org/c/coreboot/+/84796/comment/013c4c40_0406b009?us… : PS6, Line 509: if (fit_update_compat(config) && strcmp(config->name, default_config_name)) > Let's rearrange these lines so you don't need to `strcmp()` twice: […] Fair, I may as well not de-optimise the code. Done. File src/lib/fit_payload.c: https://review.coreboot.org/c/coreboot/+/84796/comment/59fe1f00_ff7f3279?us… : PS6, Line 26: 64 > Checking the return value would ensure that somebody will notice if you overrun the buffer for some […] Right. That would be painful, especially when we don't dump out the entire tree. This code is gone, so I've just implemented the fix in the follow-up. https://review.coreboot.org/c/coreboot/+/84796/comment/34b6147c_78fa0991?us… : PS6, Line 31: dt_add_reg_prop(image_node, &addr, &size, 1, 2, 1); > My understanding is that every node that has children with `reg` properties represents a bus, and th […] Ah, I see. Thanks for the explanation! I've dropped the implementation from here, so I'll just implement this in the follow-up. https://review.coreboot.org/c/coreboot/+/84796/comment/0717f94a_a3895a9d?us… : PS6, Line 131: continue; > Hmm... well, you're the expert on this boot mode but in general that seems fishy to me. […] As it happens, I'm not sure how much meaning `require-fit` has anymore, now that I've made EDK2 no longer need to read its own FIT header if we provide it with the addresses of its secondary images (FVs). But I agree, it's hard to make certain guarantees if we fail to load some images. File src/lib/fit_payload.c: https://review.coreboot.org/c/coreboot/+/84796/comment/704ae649_a93c3859?us… : PS9, Line 22: printk(BIOS_CRIT, "WEAK: Generic code called to load a FIT kernel!\n"); > nit: to make it a bit more clearer what it means to see this I'd maybe print something like "Booting […] Done https://review.coreboot.org/c/coreboot/+/84796/comment/719c3656_9d43335c?us… : PS9, Line 29: printk(BIOS_ERR, "WEAK: %s:%s() called to add %s to FDT\n", __FILE__, __func__, name); The big picture that I have in mind is to get it into the FIT spec as a counterpart of `loadables`. Then, a FIT config could request additional images to be loaded into memory, and if they were position-independent or needed relocation, we'd tell the entrypoint where they are. I've asked Simon about this, and we'll look into a way to do it, if possible. Do you have any ideas for paths? Possibly, `/firmware/secondary-images`. If we decide on some path and a PR for the spec is up, I'll change this code to reflect that and drop the callout. To answer your questions more directly: > Is this an error? If so, why does it need to be a weak function at all, rather than just a normal function that causes a compile error if not implemented? Whether it's an error or not is intertwined with our conversation at https://review.coreboot.org/c/coreboot/+/84796/comment/54e3f31a_aaaaec60/. > I still don't quite get why you want to make this look like a platform hook tbh, it looks like this is a UPL thing, but UPL isn't really platform-specific. I'm probably overusing the word "platform," yes. If it isn't something specific, like 'board,' 'silicon,' or 'architecture' code, and it's instead a driver, a payload specific interface, etc, I'd probably call it "platform" code. I see all these as the things that build up a specific platform for its use-case, in a way that's different from any other physical system. There might be a better word for this, but this is the context for what I mean so that we can avoid miscommunicating here. I can rename it if you've got something clearer in mind (assuming it should continue to be a weak function). I've answered part of this above: I'd like it to be part of the FIT spec, but it's not (yet). So instead, I've written the function name so that it reads like it needs payload/platform feature implementors to write an implementation. > Isn't all this "firmware payload" stuff UPL-specific anyway? What else would it be used for? No, see section 4.1 of the FIT spec. It's also for ATF, OpenSBI, U-Boot, and somehow, FPGAs. I have only been testing this with UPL though, yes. https://review.coreboot.org/c/coreboot/+/84796/comment/e9304ef7_9402329b?us… : PS9, Line 403: &fdt, &initrd > Do either of these make sense for the firmware case? FDT is always going to be the runtime-generated […] Yes. `fdt` is the region where the runtime-generated FDT will be packed, in the end, and I've checked `initrd` with Sheng. If LinuxBoot ever implements a UPL interface, we'll implement it in userspace, like u-root. But we still think it'll be a `"firmware"`, in the sense of its entrypoint ABI conforming to the UPL spec. -- To view, visit https://review.coreboot.org/c/coreboot/+/84796?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Gerrit-Change-Number: 84796 Gerrit-PatchSet: 10 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 31 Dec 2024 22:29:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[S] Change in coreboot[main]: commonlib/device_tree.c: Add a function that reads FDT ints
by Benjamin Doron (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Julius Werner, Lean Sheng Tan. Hello Julius Werner, Lean Sheng Tan, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85643?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: commonlib/device_tree.c: Add a function that reads FDT ints ...................................................................... commonlib/device_tree.c: Add a function that reads FDT ints Follow the recommendation at https://review.coreboot.org/c/coreboot/+/84796/comment/21f615a2_99a41147/ and implement support for reading integer properties generically, using their size to determine how much to read. This will be used for reading `load`, `entry` and perhaps others./ Change-Id: I02d27eb5e23dfbfc1404d209ee8d60968e22bb80 Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M src/commonlib/device_tree.c M src/commonlib/include/commonlib/device_tree.h 2 files changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/85643/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/85643?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I02d27eb5e23dfbfc1404d209ee8d60968e22bb80 Gerrit-Change-Number: 85643 Gerrit-PatchSet: 5 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com>

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[L] Change in coreboot[main]: lib/{fit,fit_payload}.c: Enhance support for FIT images
by Benjamin Doron (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Benjamin Doron, Felix Held, Lean Sheng Tan, Matt DeVillier, Maximilian Brune, Philipp Hug, ron minnich. Hello Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune, Philipp Hug, build bot (Jenkins), ron minnich, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84796?usp=email to look at the new patch set (#10). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: lib/{fit,fit_payload}.c: Enhance support for FIT images ...................................................................... lib/{fit,fit_payload}.c: Enhance support for FIT images Implement support for loading images from FIT "firmware" props. These do not require quirks, so the implementation is common across architectures. This is done with the intention of supporting Universal Payload. We implement support for the "load" and "entry" props. Here, these are implemented as fdt64_t. A follow-up will read prop-sized ints. The selected configuration no longer requires an FDT. In this case, we'll attempt a config matching the board ID, then fallback to the FIT default compat. Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M payloads/Kconfig M src/arch/arm/fit_payload.c M src/arch/arm64/fit_payload.c M src/arch/riscv/fit_payload.c M src/include/fit.h M src/lib/fit.c M src/lib/fit_payload.c 7 files changed, 291 insertions(+), 65 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/84796/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/84796?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Gerrit-Change-Number: 84796 Gerrit-PatchSet: 10 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[L] Change in coreboot[main]: Add UPL FDT handoff
by Benjamin Doron (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Arthur Heymans, Jakub Czapiga, Jérémy Compostella, Lean Sheng Tan, Matt DeVillier, Philipp Hug, Simon Glass, ron minnich. Benjamin Doron has uploaded a new patch set (#32) to the change originally created by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/76591?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: Add UPL FDT handoff ...................................................................... Add UPL FDT handoff This adds another handoff that is basically the same as coreboot tables. The only real difference is that it uses the devicetree format to transfer the information to payload. This handoff is inspired by the UPL (universal payload) specification. Tested: start qemu q35 with coreinfo as payload and see that console still works and the devicetree is printed by coreboot. Tested: start qemu q35 with EDK2 UPL as the payload (pull the entire patch train and https://github.com/tianocore/edk2/pull/6382) and boot to the UEFI shell. Change-Id: I36148e9de6ee992a67ec853ef5cbf1b5f83b44ae Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M payloads/Kconfig M src/arch/arm/include/arch/cbconfig.h M src/arch/arm64/include/arch/cbconfig.h M src/arch/ppc64/include/arch/cbconfig.h M src/arch/riscv/include/arch/cbconfig.h M src/arch/x86/include/arch/cbconfig.h M src/arch/x86/tables.c M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h M src/drivers/uart/pl011.c M src/drivers/uart/uart8250io.c M src/drivers/uart/uart8250mem.c M src/include/boot/coreboot_tables.h M src/include/boot/tables.h A src/include/boot/upl_fdt_table.h M src/lib/Makefile.mk M src/lib/bootmem.c M src/lib/coreboot_table.c M src/lib/fit.c M src/lib/fit_payload.c A src/lib/tables.c A src/lib/upl_fdt_table.c M tests/lib/Makefile.mk 22 files changed, 494 insertions(+), 63 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/76591/32 -- To view, visit https://review.coreboot.org/c/coreboot/+/76591?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I36148e9de6ee992a67ec853ef5cbf1b5f83b44ae Gerrit-Change-Number: 76591 Gerrit-PatchSet: 32 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Simon Glass <sjg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Shuo Liu <shuo.liu(a)intel.com> Gerrit-CC: coreboot org <coreboot.org(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Attention: Simon Glass <sjg(a)chromium.org> Gerrit-Attention: ron minnich <rminnich(a)gmail.com>

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[M] Change in coreboot[main]: [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node
by Benjamin Doron (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Benjamin Doron. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85575?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node ...................................................................... [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node The intention is for the payload to skip enumeration when the bootloader provides this info. Currently all that's left to do is to fill out the "reg" prop with all the device addresses, then test UPL again. Change-Id: I2a51afb4315d5a342c3d77c8545ba6943825023a Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M src/lib/upl_fdt_table.c 1 file changed, 129 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/85575/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/85575?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2a51afb4315d5a342c3d77c8545ba6943825023a Gerrit-Change-Number: 85575 Gerrit-PatchSet: 6 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com>

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[S] Change in coreboot[main]: soc/intel/common: Read core scaling factors at runtime support
by Cliff Huang (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Jérémy Compostella. Cliff Huang has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85553?usp=email ) Change subject: soc/intel/common: Read core scaling factors at runtime support ...................................................................... Patch Set 7: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/85553?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icdf47e17cc5a6d042f3c5f90cf811fccd6c1ed9b Gerrit-Change-Number: 85553 Gerrit-PatchSet: 7 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 18:54:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/asus/p8x7x-series: Streamline DT PCIe configs
by Nicholas Chin (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Keith Hui. Nicholas Chin has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85797?usp=email ) The change is no longer submittable: All-Comments-Resolved and Code-Review are unsatisfied now. Change subject: mb/asus/p8x7x-series: Streamline DT PCIe configs ...................................................................... Patch Set 1: Code-Review+1 (2 comments) File src/mainboard/asus/p8x7x-series/devicetree.cb: https://review.coreboot.org/c/coreboot/+/85797/comment/ba7426ae_5b0de4a2?us… : PS1, Line 40: device ref pcie_rp1 on end # PCIe x4 slot, by various names If they are still present in the overridetrees so that the comment about the name is still present, is there a point in adding it to on in the default devicetree? https://review.coreboot.org/c/coreboot/+/85797/comment/fe8a969f_45638891?us… : PS1, Line 41: device ref pcie_rp2 off end : device ref pcie_rp3 off end : device ref pcie_rp4 off end : device ref pcie_rp5 off end : device ref pcie_rp6 off end : device ref pcie_rp7 off end : device ref pcie_rp8 off end All of these default to off in the chipset devicetree (`nb/intel/sandybridge/chipset.cb`) and thus are technically unnecessary in the board devicetree. -- To view, visit https://review.coreboot.org/c/coreboot/+/85797?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4feb88a78f72952bed049505073aed00d2120df3 Gerrit-Change-Number: 85797 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 18:38:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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