December 2024 - coreboot-gerrit

[M] Change in coreboot[main]: [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node
by Benjamin Doron (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Benjamin Doron. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85575?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node ...................................................................... [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node The intention is for the payload to skip enumeration when the bootloader provides this info. Currently all that's left to do is to fill out the "reg" prop with all the device addresses, then test UPL again. Change-Id: I2a51afb4315d5a342c3d77c8545ba6943825023a Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M src/lib/upl_fdt_table.c 1 file changed, 129 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/85575/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/85575?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2a51afb4315d5a342c3d77c8545ba6943825023a Gerrit-Change-Number: 85575 Gerrit-PatchSet: 6 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com>

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[S] Change in coreboot[main]: soc/intel/common: Read core scaling factors at runtime support
by Cliff Huang (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Jérémy Compostella. Cliff Huang has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85553?usp=email ) Change subject: soc/intel/common: Read core scaling factors at runtime support ...................................................................... Patch Set 7: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/85553?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icdf47e17cc5a6d042f3c5f90cf811fccd6c1ed9b Gerrit-Change-Number: 85553 Gerrit-PatchSet: 7 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 18:54:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/asus/p8x7x-series: Streamline DT PCIe configs
by Nicholas Chin (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Keith Hui. Nicholas Chin has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85797?usp=email ) The change is no longer submittable: All-Comments-Resolved and Code-Review are unsatisfied now. Change subject: mb/asus/p8x7x-series: Streamline DT PCIe configs ...................................................................... Patch Set 1: Code-Review+1 (2 comments) File src/mainboard/asus/p8x7x-series/devicetree.cb: https://review.coreboot.org/c/coreboot/+/85797/comment/ba7426ae_5b0de4a2?us… : PS1, Line 40: device ref pcie_rp1 on end # PCIe x4 slot, by various names If they are still present in the overridetrees so that the comment about the name is still present, is there a point in adding it to on in the default devicetree? https://review.coreboot.org/c/coreboot/+/85797/comment/fe8a969f_45638891?us… : PS1, Line 41: device ref pcie_rp2 off end : device ref pcie_rp3 off end : device ref pcie_rp4 off end : device ref pcie_rp5 off end : device ref pcie_rp6 off end : device ref pcie_rp7 off end : device ref pcie_rp8 off end All of these default to off in the chipset devicetree (`nb/intel/sandybridge/chipset.cb`) and thus are technically unnecessary in the board devicetree. -- To view, visit https://review.coreboot.org/c/coreboot/+/85797?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4feb88a78f72952bed049505073aed00d2120df3 Gerrit-Change-Number: 85797 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 18:38:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/asus/p8x7x-series: Streamline DT PCIe configs
by Nicholas Chin (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Keith Hui. Nicholas Chin has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85797?usp=email ) Change subject: mb/asus/p8x7x-series: Streamline DT PCIe configs ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85797?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4feb88a78f72952bed049505073aed00d2120df3 Gerrit-Change-Number: 85797 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 18:28:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/meteorlake: Add doc reference for thunderbolt port number
by Subrata Banik (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Tarun. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85820?usp=email ) Change subject: soc/intel/meteorlake: Add doc reference for thunderbolt port number ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85820?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic394aa6795105ff613f30e8aa0ffa45500c6332a Gerrit-Change-Number: 85820 Gerrit-PatchSet: 2 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 18:12:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/meteorlake: Add doc reference for thunderbolt port number
by Jérémy Compostella (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun. Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85820?usp=email to look at the new patch set (#2). Change subject: soc/intel/meteorlake: Add doc reference for thunderbolt port number ...................................................................... soc/intel/meteorlake: Add doc reference for thunderbolt port number Document #640228 Meteor Lake - U/H and U Type4 Processor - 2.3 Device IDs - Table 8 "Other Device ID" IDs - Table 8 "Other Device ID" specifies that the first Thunderbolt PCIe root port number is 16. Change-Id: Ic394aa6795105ff613f30e8aa0ffa45500c6332a Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/soc/intel/meteorlake/pcie_rp.c 1 file changed, 6 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/85820/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85820?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic394aa6795105ff613f30e8aa0ffa45500c6332a Gerrit-Change-Number: 85820 Gerrit-PatchSet: 2 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com>

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Add doc reference for thunderbolt port number
by Jérémy Compostella (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun. Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85820?usp=email ) Change subject: soc/intel/meteorlake: Add doc reference for thunderbolt port number ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/meteorlake/pcie_rp.c: https://review.coreboot.org/c/coreboot/+/85820/comment/c9b11a03_a5e3903b?us… : PS1, Line 17: 0x10 > lets mention the root port number in decimal to maintain the parity with the EDS ? I totally agree. I just did not want to touch the code. I am doing it. -- To view, visit https://review.coreboot.org/c/coreboot/+/85820?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic394aa6795105ff613f30e8aa0ffa45500c6332a Gerrit-Change-Number: 85820 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 18:06:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Add doc reference for thunderbolt port number
by Subrata Banik (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Tarun. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85820?usp=email ) Change subject: soc/intel/meteorlake: Add doc reference for thunderbolt port number ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/meteorlake/pcie_rp.c: https://review.coreboot.org/c/coreboot/+/85820/comment/5e632d6d_d4f859ae?us… : PS1, Line 17: 0x10 lets mention the root port number in decimal to maintain the parity with the EDS ? -- To view, visit https://review.coreboot.org/c/coreboot/+/85820?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic394aa6795105ff613f30e8aa0ffa45500c6332a Gerrit-Change-Number: 85820 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 17:42:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/pantherlake: Update the Thunderbolt lcap_port_base to 21
by Subrata Banik (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Jérémy Compostella, Kapil Porwal, Pranava Y N. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85781?usp=email ) Change subject: soc/intel/pantherlake: Update the Thunderbolt lcap_port_base to 21 ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85781?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I44f91f954a4ec06c56dcc90d97e7da2193e9acf2 Gerrit-Change-Number: 85781 Gerrit-PatchSet: 3 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 17:42:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: drivers/asmedia: Enable AHCI for ASM1061
by Nicholas Chin (Code Review) Dec. 31, 2024

Dec. 31, 2024

Attention is currently required from: Angel Pons, Riku Viitanen. Nicholas Chin has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/85816?usp=email ) Change subject: drivers/asmedia: Enable AHCI for ASM1061 ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > I may as well, since it would be like 2 lines of code based ...on what vendor firmware does -- To view, visit https://review.coreboot.org/c/coreboot/+/85816?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7a1470894261c7d14fadccdcade968f87f78fe23 Gerrit-Change-Number: 85816 Gerrit-PatchSet: 4 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Reviewer: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Riku Viitanen <riku.viitanen(a)protonmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 31 Dec 2024 17:34:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Riku Viitanen <riku.viitanen(a)protonmail.com> Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com>

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