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Change subject: mb/google/brya/var/uldrenite: update gpio settings
......................................................................
Patch Set 4:
(1 comment)
File src/mainboard/google/brya/variants/uldrenite/gpio.c:
https://review.coreboot.org/c/coreboot/+/85522/comment/113ca81e_82d3539e?us… :
PS3, Line 153: PAD_CFG_GPI_LOCK
> Would you help to check the ts int should set to PAD_CFG_GPI_APIC?
Done
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Change subject: mb/google/brya/var/uldrenite: update gpio settings
......................................................................
mb/google/brya/var/uldrenite: update gpio settings
Configure GPIOs according to schematic_20241203.
BUG=b:380789023
TEST=emerge-nissa coreboot
Change-Id: I3c5cb298fd0a4108af8f65abd9eeddbfe5b7afc4
Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/uldrenite/gpio.c
1 file changed, 429 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/85522/4
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Change subject: soc/mediatek/mt8196: Add SD card configurations
......................................................................
Patch Set 2: Code-Review+2
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Change subject: mb/google/rauru: Implement regulator interface
......................................................................
Patch Set 2: Code-Review+1
(2 comments)
File src/mainboard/google/rauru/regulator.c:
https://review.coreboot.org/c/coreboot/+/85563/comment/28a9e3d7_e16d0d40?us… :
PS2, Line 31: if (id == MT6373_VMCH)
: mt6373_set_vmch_voltage(voltage_uv);
: else if (id == MT6373_VMC)
: mt6373_set_vmc_voltage(voltage_uv);
Use switch.
https://review.coreboot.org/c/coreboot/+/85563/comment/111d5eb6_c3f1c9e3?us… :
PS2, Line 36: BIOS_WARNING
This should be an error, right?
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Change subject: soc/mediatek/mt8196: Add PMIC MT6373 driver
......................................................................
soc/mediatek/mt8196: Add PMIC MT6373 driver
1. Add MT6373 driver in soc folder
2 Add regulator API for powering on SD card
3. Add regulator API for VCN33_3
4. Enable vcn33_3 & set vcn33_3 3.3v
5. Add MT6373 LDO enable API
TEST=build pass, check boot log with:
[INFO ] mt6373_init_setting done
[INFO ] pmic_protect_key_setting done
BUG=b:317009620
Change-Id: Icbcd1f5a22388093781fd92c31889dd55a0ed9a3
Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com>
---
A src/soc/mediatek/common/include/soc/mt6373.h
A src/soc/mediatek/common/mt6373.c
M src/soc/mediatek/mt8196/Makefile.mk
A src/soc/mediatek/mt8196/mt6373.c
4 files changed, 711 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/85129/37
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Change subject: mb/google/brya: Adjust EC memory map range to support indexed IO
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/85547/comment/e89a146d_f19659cf?us… :
PS3, Line 11: # EC memory map range is 0x900-0x9ff and indexed access is through 0x380
can you please follow https://review.coreboot.org/c/coreboot/+/84919/3/src/mainboard/google/fatca…
```
# For platform selects EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO
# EC host command ranges are in 0x380-<range??>
# For others
# EC host command ranges are in 0x900-0x9ff
```
btw, what is the range for 0x380 ? like how many bytes, depending on that you should modify the MSB of gen3_dec. if 8 bytes then MSB should be 4 like 0x00040381 (0x380-0x38f).
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