coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

1 participants
3018 discussions

[L] Change in coreboot[main]: mb/google/brya/var/uldrenite: update gpio settings
by John Su (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik. John Su has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/85522?usp=email ) Change subject: mb/google/brya/var/uldrenite: update gpio settings ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/brya/variants/uldrenite/gpio.c: https://review.coreboot.org/c/coreboot/+/85522/comment/b1a83449_145a84c3?us… : PS4, Line 453: : const struct pad_config *variant_gpio_override_table(size_t *num) : { : *num = 0; : return NULL; : } > remove if no override needed. It cannot be removed because it is required for mainboard initialization. Removing it will cause the build to fail. -- To view, visit https://review.coreboot.org/c/coreboot/+/85522?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3c5cb298fd0a4108af8f65abd9eeddbfe5b7afc4 Gerrit-Change-Number: 85522 Gerrit-PatchSet: 4 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 12 Dec 2024 12:06:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <ericllai(a)google.com>

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[XS] Change in coreboot[main]: cpu/intel/car/romstage: Fix false-positive stack corruption
by Uwe Poeche (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Patrick Rudolph. Uwe Poeche has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85568?usp=email ) Change subject: cpu/intel/car/romstage: Fix false-positive stack corruption ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: Thanks for fixing. The patch prevents the error (not warning) on our mb/siemens/mc_ehl/variants/mc_ehl1. -- To view, visit https://review.coreboot.org/c/coreboot/+/85568?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ebf0a5e8eaad49af77ab4d5f6b58fc849013b14 Gerrit-Change-Number: 85568 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: siemens-bot Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Thu, 12 Dec 2024 11:59:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/intel/alderlake: Add function to force disable memory channels
by Kapil Porwal (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Jeremy Soller, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Paul Menzel, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford. Kapil Porwal has posted comments on this change by Kapil Porwal. ( https://review.coreboot.org/c/coreboot/+/85529?usp=email ) Change subject: soc/intel/alderlake: Add function to force disable memory channels ...................................................................... Patch Set 5: (2 comments) File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/85529/comment/b7862b1f_74c68507?us… : PS1, Line 237: uint32_t > should we take only `uint8` for mask disable ? Ack https://review.coreboot.org/c/coreboot/+/85529/comment/18bfcd73_1ea5f32c?us… : PS1, Line 264: void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg, : const struct mem_spd *spd_info, bool half_populated, : uint32_t ch_disable_mask) > There are multiple ways to implement the solution - […] Uploaded a new patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/85529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Gerrit-Change-Number: 85529 Gerrit-PatchSet: 5 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Thu, 12 Dec 2024 11:47:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[M] Change in coreboot[main]: soc/intel/alderlake: Add function to force disable memory channels
by Kapil Porwal (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Jeremy Soller, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Paul Menzel, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford. Hello Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Jeremy Soller, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85529?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/alderlake: Add function to force disable memory channels ...................................................................... soc/intel/alderlake: Add function to force disable memory channels Add a function `mem_init_override_channel_mask` to disable memory channels based on given bitmap where each bit represents a memory channel. A set bit will disable corresponding memory channel. Variants can override this bitmap by selecting `ENFORCE_MEM_CHANNEL_DISABLE` and implementing `mb_fill_override_channel_mask` to return the bitmap. BUG=b:379311559 TEST=Make sure that channel mask is applied correctly. Lotso without any channel mask: ``` lotso-rev0 ~ # dmidecode -t 17 | grep -E "(Locator: C|Size)" Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0 Size: 2 GB Locator: Channel-2-DIMM-0 Size: 2 GB Locator: Channel-3-DIMM-0 Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0 Size: 2 GB Locator: Channel-2-DIMM-0 Size: 2 GB Locator: Channel-3-DIMM-0 lotso-rev0 ~ # dmidecode -t 17 | grep Size | wc -l 8 ``` Lotso with channel 2 & 3 masked: ``` lotso-rev0 ~ # dmidecode -t 17 | grep -E "(Locator: C|Size)" Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0 Size: 2 GB Locator: Channel-0-DIMM-0 Size: 2 GB Locator: Channel-1-DIMM-0 lotso-rev0 ~ # dmidecode -t 17 | grep Size | wc -l 4 ``` Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Signed-off-by: Kapil Porwal <kapilporwal(a)google.com> --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/include/soc/meminit.h M src/soc/intel/alderlake/meminit.c 3 files changed, 54 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/85529/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/85529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Gerrit-Change-Number: 85529 Gerrit-PatchSet: 5 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com>

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[L] Change in coreboot[main]: soc/intel/xeon_sp: Merge SKX and CPX
by Patrick Rudolph (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Morgan Jang, Patrick Rudolph, Shuo Liu, Tim Chu. Hello Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Morgan Jang, Shuo Liu, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85557?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp: Merge SKX and CPX ...................................................................... soc/intel/xeon_sp: Merge SKX and CPX Start merging SKX and CPX into one codebase: - Create a new 14nm folder - Add new Kconfig: SOC_INTEL_XEON_SP_14NM - Add shared Kconfig settings - Add combined CPU driver - Add combined ACPI and romstage code TODO: Merge additional code from skx/cpx folders. TEST: Still boots on ocp/tiogapass. Change-Id: I915d502efc36b299e089158c60e81822dfa2b333 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/mainboard/intel/cedarisland_crb/dsdt.asl M src/mainboard/ocp/deltalake/dsdt.asl M src/mainboard/ocp/tiogapass/dsdt.asl A src/soc/intel/xeon_sp/14nm/Kconfig A src/soc/intel/xeon_sp/14nm/Makefile.mk R src/soc/intel/xeon_sp/14nm/acpi/gpio.asl R src/soc/intel/xeon_sp/14nm/acpi/iiostack.asl R src/soc/intel/xeon_sp/14nm/acpi/pch.asl R src/soc/intel/xeon_sp/14nm/acpi/pch_irq.asl R src/soc/intel/xeon_sp/14nm/acpi/pci_irqs.asl R src/soc/intel/xeon_sp/14nm/acpi/southcluster.asl R src/soc/intel/xeon_sp/14nm/acpi/uncore.asl R src/soc/intel/xeon_sp/14nm/acpi/uncore_irq.asl R src/soc/intel/xeon_sp/14nm/cpu.c A src/soc/intel/xeon_sp/14nm/romstage.c R src/soc/intel/xeon_sp/14nm/soc_acpi.c M src/soc/intel/xeon_sp/Makefile.mk M src/soc/intel/xeon_sp/cpx/Kconfig M src/soc/intel/xeon_sp/cpx/Makefile.mk D src/soc/intel/xeon_sp/cpx/cpu.c M src/soc/intel/xeon_sp/cpx/include/soc/soc_msr.h M src/soc/intel/xeon_sp/cpx/romstage.c M src/soc/intel/xeon_sp/skx/Kconfig M src/soc/intel/xeon_sp/skx/Makefile.mk M src/soc/intel/xeon_sp/skx/romstage.c D src/soc/intel/xeon_sp/skx/soc_acpi.c 26 files changed, 183 insertions(+), 534 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/85557/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/85557?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I915d502efc36b299e089158c60e81822dfa2b333 Gerrit-Change-Number: 85557 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com>

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Move DFX and UNCORE PCI drivers
by Patrick Rudolph (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Hello Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85560?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp: Move DFX and UNCORE PCI drivers ...................................................................... soc/intel/xeon_sp: Move DFX and UNCORE PCI drivers Move the DFX and UNCORE PCI driver for 14nm Xeon-SP into own files under the 14nm subdirectory. Those are never needed on newer platforms and thus doesn't need to be compiled in. TEST: Still boots on ocp/tiogapass. Change-Id: Ie3d6cc11806669b8adf5041367cfbe36605612b1 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/xeon_sp/14nm/Makefile.mk A src/soc/intel/xeon_sp/14nm/dfx.c A src/soc/intel/xeon_sp/14nm/uncore.c M src/soc/intel/xeon_sp/uncore.c 4 files changed, 75 insertions(+), 62 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/85560/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/85560?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie3d6cc11806669b8adf5041367cfbe36605612b1 Gerrit-Change-Number: 85560 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com>

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[XS] Change in coreboot[main]: cpu/intel/car/romstage: Fix false-positive stack corruption
by Uwe Poeche (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Patrick Rudolph. Uwe Poeche has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85568?usp=email ) Change subject: cpu/intel/car/romstage: Fix false-positive stack corruption ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: start siemens-bot -- To view, visit https://review.coreboot.org/c/coreboot/+/85568?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ebf0a5e8eaad49af77ab4d5f6b58fc849013b14 Gerrit-Change-Number: 85568 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Thu, 12 Dec 2024 11:13:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/google/rauru: Implement regulator interface
by Jarried Lin (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Hope Wang, Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85563?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/google/rauru: Implement regulator interface ...................................................................... mb/google/rauru: Implement regulator interface Control regulator more easily with regulator interface. TEST=build pass BUG=b:317009620 Change-Id: I3cad68dbb2c5873c4e00066da18b1593b88ff499 Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> --- M src/mainboard/google/rauru/Makefile.mk A src/mainboard/google/rauru/regulator.c 2 files changed, 89 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/85563/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/85563?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3cad68dbb2c5873c4e00066da18b1593b88ff499 Gerrit-Change-Number: 85563 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIC MT6373 driver
by Jarried Lin (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Hope Wang, Hung-Te Lin. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85129?usp=email ) Change subject: soc/mediatek/mt8196: Add PMIC MT6373 driver ...................................................................... Patch Set 38: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85129/comment/5ae2242d_bed405ef?us… : PS37, Line 12: Enable vcn33_3 & set vcn33_3 3.3v > remove Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85129?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icbcd1f5a22388093781fd92c31889dd55a0ed9a3 Gerrit-Change-Number: 85129 Gerrit-PatchSet: 38 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Thu, 12 Dec 2024 11:08:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIC MT6373 driver
by Jarried Lin (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Hope Wang, Hung-Te Lin, Jarried Lin. Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85129?usp=email to look at the new patch set (#38). Change subject: soc/mediatek/mt8196: Add PMIC MT6373 driver ...................................................................... soc/mediatek/mt8196: Add PMIC MT6373 driver 1. Add MT6373 driver in soc folder 2 Add regulator API for powering on SD card 3. Add regulator API for VCN33_3 4. Add MT6373 LDO enable API TEST=build pass, check boot log with: [INFO ] mt6373_init_setting done [INFO ] pmic_protect_key_setting done BUG=b:317009620 Change-Id: Icbcd1f5a22388093781fd92c31889dd55a0ed9a3 Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> --- A src/soc/mediatek/common/include/soc/mt6373.h A src/soc/mediatek/common/mt6373.c M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/mt6373.c 4 files changed, 711 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/85129/38 -- To view, visit https://review.coreboot.org/c/coreboot/+/85129?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icbcd1f5a22388093781fd92c31889dd55a0ed9a3 Gerrit-Change-Number: 85129 Gerrit-PatchSet: 38 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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