coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: lib/{fit,fit_payload}.c: Enhance support for FIT images
by Benjamin Doron (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune. Benjamin Doron has posted comments on this change by Benjamin Doron. ( https://review.coreboot.org/c/coreboot/+/84796?usp=email ) Change subject: lib/{fit,fit_payload}.c: Enhance support for FIT images ...................................................................... Patch Set 5: (1 comment) Patchset: PS1: > Well, yes. […] It turns out that the FIT spec defines `data-offset` too, so I've now reworded the commit message to describe enhancing the support, not implementing UPL on top, and I've reworked what's in this patch: I've brought fit_payload.c in, while keeping UPL specific parts out. -- To view, visit https://review.coreboot.org/c/coreboot/+/84796?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Gerrit-Change-Number: 84796 Gerrit-PatchSet: 5 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 12 Dec 2024 21:52:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com>

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[S] Change in coreboot[main]: mb/google/brya/var/marasov: Enable GPP_F9 GPIO for early panel power-on
by Nick Vaccaro (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Nick Vaccaro has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/85574?usp=email ) Change subject: mb/google/brya/var/marasov: Enable GPP_F9 GPIO for early panel power-on ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85574?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I727a72d9583575b2bbebe2c3b75c980170dd36b9 Gerrit-Change-Number: 85574 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 12 Dec 2024 21:51:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: lib/{fit,fit_payload}.c: Enhance support for FIT images
by Benjamin Doron (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune. Benjamin Doron has posted comments on this change by Benjamin Doron. ( https://review.coreboot.org/c/coreboot/+/84796?usp=email ) Change subject: lib/{fit,fit_payload}.c: Enhance support for FIT images ...................................................................... Patch Set 5: (1 comment) File src/lib/fit.c: https://review.coreboot.org/c/coreboot/+/84796/comment/3619dc1d_c675ede9?us… : PS4, Line 519: dt_find_bin_prop(node, "size", &firmware_size, &unused_prop_size); > I don't know where this is specced, but if it follows device tree principles it probably also needs […] It's likely a UPL customisation, and I'm now implementing this a different way. -- To view, visit https://review.coreboot.org/c/coreboot/+/84796?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Gerrit-Change-Number: 84796 Gerrit-PatchSet: 5 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 12 Dec 2024 21:49:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[XS] Change in coreboot[main]: payloads/Kconfig: Disable compression for UPL FIT
by Benjamin Doron (Code Review) 12 Dec '24

12 Dec '24

Benjamin Doron has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/84904?usp=email ) Change subject: payloads/Kconfig: Disable compression for UPL FIT ...................................................................... Abandoned merged into parent -- To view, visit https://review.coreboot.org/c/coreboot/+/84904?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib5e90013e5112596d03444032de17cd1c14f03d1 Gerrit-Change-Number: 84904 Gerrit-PatchSet: 3 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: [DNM] lib/upl_fdt_table.c: Add a upl-image node
by Benjamin Doron (Code Review) 12 Dec '24

12 Dec '24

Benjamin Doron has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/84800?usp=email ) Change subject: [DNM] lib/upl_fdt_table.c: Add a upl-image node ...................................................................... Abandoned merged into parent -- To view, visit https://review.coreboot.org/c/coreboot/+/84800?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I80796ca518c96481a38f37e6b54b5bfdb638460a Gerrit-Change-Number: 84800 Gerrit-PatchSet: 4 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node
by Benjamin Doron (Code Review) 12 Dec '24

12 Dec '24

Benjamin Doron has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85575?usp=email ) Change subject: [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node ...................................................................... [WIP] lib/upl_fdt_table.c: Implement support for "pci-rb" node The intention is for the payload to skip enumeration when the bootloader provides this info. Currently all that's left to do is to fill out the "reg" prop with all the device addresses, then test UPL again. Change-Id: I2a51afb4315d5a342c3d77c8545ba6943825023a Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M src/lib/upl_fdt_table.c 1 file changed, 124 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/85575/1 diff --git a/src/lib/upl_fdt_table.c b/src/lib/upl_fdt_table.c index 5639e8f..bf50eb2 100644 --- a/src/lib/upl_fdt_table.c +++ b/src/lib/upl_fdt_table.c @@ -9,6 +9,8 @@ #include <console/console.h> #include <console/uart.h> #include <cpu/cpu.h> +#include <device/device.h> +#include <device/pci_def.h> #include <fit.h> #include <stdio.h> #include <version.h> @@ -39,6 +41,125 @@ } } +#if 0 + +#define NON_RELOCATABLE BIT(31) +#define IO_SPACE BIT(24) +#define MMIO_SPACE BIT(25) +#define MMIO64_SPACE (BIT(24) | BIT(25)) + +static void write_pci_rb_ranges(uint32_t *ranges, uint32_t *index, + uint32_t memory_space, u64 base, u64 limit) +{ + // type + ranges[(*index)++] = cpu_to_be32(NON_RELOCATABLE + memory_space); + + // child-addr + uint32_t child_addr_index = *index; + ranges[(*index)++] = cpu_to_be32(base >> 32); + ranges[(*index)++] = cpu_to_be32(base & 0xffffffff); + + // parent-addr + ranges[(*index)++] = ranges[child_addr_index]; + ranges[(*index)++] = ranges[child_addr_index + 1]; + + // size + u64 size = limit - base + 1; + ranges[(*index)++] = cpu_to_be32(size >> 32); + ranges[(*index)++] = cpu_to_be32(size & 0xffffffff); +} + +static void write_pci_rb_node(struct device_tree *tree) +{ + uint64_t addr, size; + char node_name[64]; + struct device_tree_node *pci_rb_node, *rootport_node; + uint32_t pci_index = 0, reg_data_index = 0; + + // #address-cells = 3, #size-cells = 2 is required per the PCI Bus Binding spec + u32 pci_addr_cells = 3, host_addr_cells = 2; + u32 pci_size_cells = 2, host_size_cells = 1; + + addr = CONFIG_ECAM_MMCONF_BASE_ADDRESS; + snprintf(node_name, 64, "/pci-rb0@%llx", addr); + pci_rb_node = dt_find_node_by_path(tree, node_name, NULL, NULL, 1); + if (!pci_rb_node) { + printk(BIOS_ERR, "%s: %s node is null", __func__, node_name); + return; + } + dt_add_u32_prop(pci_rb_node, "#address-cells", pci_addr_cells); + dt_add_u32_prop(pci_rb_node, "#size-cells", pci_size_cells); + dt_add_string_prop(pci_rb_node, "compatible", "pci-rb"); + + size = CONFIG_ECAM_MMCONF_LENGTH; + dt_add_reg_prop(pci_rb_node, &addr, &size, 1, host_addr_cells, host_size_cells); + + struct resource *res; + u64 io_base = -1, io_limit = 0; + u64 mmio_base = -1, mmio_limit = 0; + u64 mmio64_base = -1, mmio64_limit = 0; + + uint8_t slot, func; + struct device *pci_devs = dev_find_next_pci_device(NULL); + while (pci_devs != NULL) { + /* Accumulate resources for root bridge */ + for (res = pci_devs->resource_list; res; res = res->next) { + if (res->flags & IORESOURCE_FIXED) + continue; + + if (res->flags & IORESOURCE_IO) { + io_base = MIN(io_base, res->base); + io_limit = MAX(io_limit, resource_end(res)); + // This means memory strictly above 4 GiB, not 64-bit BARs + } else if (res->flags & IORESOURCE_MEM && resource_end(res) < 4ULL*GiB) { + mmio_base = MIN(mmio_base, res->base); + mmio_limit = MAX(mmio_limit, resource_end(res)); + } else if (res->flags & IORESOURCE_MEM && resource_end(res) >= 4ULL*GiB) { + mmio64_base = MIN(mmio64_base, res->base); + mmio64_limit = MAX(mmio64_limit, resource_end(res)); + } + } + + /* Create root port node (FIXME: This is the wrong way) */ + if (pci_devs->downstream) { + slot = PCI_SLOT(pci_devs->path.pci.devfn); + func = PCI_FUNC(pci_devs->path.pci.devfn); + + snprintf(node_name, 64, "rootport%d@%d,%d", pci_index++, slot, func); + const char *node_names_root_port[] = { node_name, NULL }; + rootport_node = dt_find_node(pci_rb_node, node_names_root_port, NULL, NULL, 1); + if (!rootport_node) { + printk(BIOS_ERR, "%s: %s node is null", __func__, node_name); + return; + } + dt_add_u32_prop(rootport_node, "#address-cells", pci_addr_cells); + dt_add_u32_prop(rootport_node, "#size-cells", pci_size_cells); + // FIXME: reg. This one is insane (all device addresses) + dt_add_bin_prop(rootport_node, "ranges", NULL, 0); + } + + pci_devs = dev_find_next_pci_device(pci_devs); + } + + snprintf(node_name, 64, "/pci-rb0@%llx/ranges", addr); + uint32_t *reg_data = xzalloc(21 * sizeof(uint32_t)); + printk(BIOS_DEBUG, "IO base 0x%llx limit 0x%llx\n", io_base, io_limit); + write_pci_rb_ranges(reg_data, &reg_data_index, IO_SPACE, io_base, io_limit); + printk(BIOS_DEBUG, "MMIO base 0x%llx limit 0x%llx\n", mmio_base, mmio_limit); + write_pci_rb_ranges(reg_data, &reg_data_index, MMIO_SPACE, mmio_base, mmio_limit); + printk(BIOS_DEBUG, "MMIO64 base 0x%llx limit 0x%llx\n", mmio64_base, mmio64_limit); + write_pci_rb_ranges(reg_data, &reg_data_index, MMIO64_SPACE, mmio64_base, mmio64_limit); + dt_set_bin_prop_by_path(tree, node_name, (void *)reg_data, 21 * sizeof(uint32_t), 1); + + // FIXME? + snprintf(node_name, 64, "/pci-rb0@%llx/bus-range", addr); + uint32_t *data = xzalloc(2 * sizeof(uint32_t)); + data[0] = cpu_to_be32(0), data[1] = cpu_to_be32(pci_index - 1); + dt_set_bin_prop_by_path(tree, node_name, (void *)data, 2 * sizeof(uint32_t), 1); +} + +#endif + /* * Writes a FDT (Flattened Device Tree) compliant to the UPL (Universal Payload Specification) * at rom_table_end and advances rom_table_end pointer to the size of the FDT. @@ -111,6 +232,7 @@ } dt_add_string_prop(params_node, "compatible", "upl"); dt_add_u32_prop(params_node, "addr-width", cpu_phys_address_size()); + //dt_add_bin_prop(params_node, "pci-enum-done", NULL, 0); // Add coreboot node, which contains information about coreboot like version and name struct device_tree_node *cb_node; @@ -123,6 +245,8 @@ dt_add_string_prop(cb_node, "name", "coreboot"); dt_add_string_prop(cb_node, "version", coreboot_version); + //write_pci_rb_node(tree); + // creates an isa node that holds devices that are accessed via I/O Ports // currently that is only the case for x86 devices (e.g. serial, cmos...) struct device_tree_node *isa_node = dt_find_node_by_path(tree, "/isa", NULL, NULL, 1); -- To view, visit https://review.coreboot.org/c/coreboot/+/85575?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2a51afb4315d5a342c3d77c8545ba6943825023a Gerrit-Change-Number: 85575 Gerrit-PatchSet: 1 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com>

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[S] Change in coreboot[main]: [DNM] payloads/edk2: Build EDK2's UPL as a FIT
by Benjamin Doron (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Benjamin Doron, Lean Sheng Tan, Martin L Roth, Matt DeVillier, Sean Rhodes. Hello Lean Sheng Tan, Martin L Roth, Matt DeVillier, Sean Rhodes, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84801?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: [DNM] payloads/edk2: Build EDK2's UPL as a FIT ...................................................................... [DNM] payloads/edk2: Build EDK2's UPL as a FIT Universal Payload is now supported upstream as a FIT. Note that we're still working on getting some required patches merged! Change-Id: If8e3861d32089dd1e925f173130aaec700296cfc Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M payloads/Kconfig M payloads/external/Makefile.mk M payloads/external/edk2/Kconfig M payloads/external/edk2/Makefile 4 files changed, 13 insertions(+), 30 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/84801/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/84801?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If8e3861d32089dd1e925f173130aaec700296cfc Gerrit-Change-Number: 84801 Gerrit-PatchSet: 5 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com>

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[XS] Change in coreboot[main]: arch/*/fit_payload.c: Do not support loading UPL FITs
by Benjamin Doron (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Benjamin Doron, Julius Werner, Matt DeVillier, Maximilian Brune, Philipp Hug, ron minnich. Hello Julius Werner, Matt DeVillier, Maximilian Brune, Philipp Hug, build bot (Jenkins), ron minnich, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84798?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+1 by Matt DeVillier, Verified-1 by build bot (Jenkins) Change subject: arch/*/fit_payload.c: Do not support loading UPL FITs ...................................................................... arch/*/fit_payload.c: Do not support loading UPL FITs As the existing arch specific code has not been updated yet, and UPL is not supported at this time on other architectures as far as I know, just have them assert that they're not on the UPL handoff boot path. The necessary arch-specific changes should be minimal, but we can't test them, and it's lower priority now. Change-Id: I03e88b358b3911fc98f6fa3c937431b4c1341725 Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M src/arch/arm/fit_payload.c M src/arch/arm64/fit_payload.c M src/arch/riscv/fit_payload.c 3 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/84798/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/84798?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I03e88b358b3911fc98f6fa3c937431b4c1341725 Gerrit-Change-Number: 84798 Gerrit-PatchSet: 5 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com>

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[L] Change in coreboot[main]: Add UPL FDT handoff
by Benjamin Doron (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Arthur Heymans, Benjamin Doron, Jakub Czapiga, Jérémy Compostella, Lean Sheng Tan, Matt DeVillier, Philipp Hug, Simon Glass, ron minnich. Benjamin Doron has uploaded a new patch set (#27) to the change originally created by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/76591?usp=email ) The following approvals got outdated and were removed: Code-Review+1 by Matt DeVillier, Code-Review+2 by Lean Sheng Tan, Verified-1 by build bot (Jenkins) Change subject: Add UPL FDT handoff ...................................................................... Add UPL FDT handoff This adds another handoff that is basically the same as coreboot tables. The only real difference is that it uses the devicetree format to transfer the information to payload. This handoff is inspired by the UPL (universal payload) specification. Tested: start qemu q35 with coreinfo as payload and see that console still works and the devicetree is printed by coreboot. Tested: start qemu q35 with EDK2 UPL as the payload (pull the entire patch train and https://github.com/tianocore/edk2/pull/6382) and boot to the UEFI shell. Change-Id: I36148e9de6ee992a67ec853ef5cbf1b5f83b44ae Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M payloads/Kconfig M src/arch/arm/include/arch/cbconfig.h M src/arch/arm64/include/arch/cbconfig.h M src/arch/ppc64/include/arch/cbconfig.h M src/arch/riscv/include/arch/cbconfig.h M src/arch/x86/include/arch/cbconfig.h M src/arch/x86/tables.c M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h M src/drivers/uart/pl011.c M src/drivers/uart/uart8250io.c M src/drivers/uart/uart8250mem.c M src/include/boot/coreboot_tables.h M src/include/boot/tables.h A src/include/boot/upl_fdt_table.h M src/lib/Makefile.mk M src/lib/bootmem.c M src/lib/coreboot_table.c M src/lib/fit_payload.c A src/lib/tables.c A src/lib/upl_fdt_table.c M tests/lib/Makefile.mk 21 files changed, 471 insertions(+), 57 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/76591/27 -- To view, visit https://review.coreboot.org/c/coreboot/+/76591?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I36148e9de6ee992a67ec853ef5cbf1b5f83b44ae Gerrit-Change-Number: 76591 Gerrit-PatchSet: 27 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Simon Glass <sjg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Shuo Liu <shuo.liu(a)intel.com> Gerrit-CC: coreboot org <coreboot.org(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Simon Glass <sjg(a)chromium.org> Gerrit-Attention: ron minnich <rminnich(a)gmail.com>

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[M] Change in coreboot[main]: lib/{fit,fit_payload}.c: Enhance support for FIT images
by Benjamin Doron (Code Review) 12 Dec '24

12 Dec '24

Attention is currently required from: Benjamin Doron, Felix Held, Lean Sheng Tan, Matt DeVillier, Maximilian Brune. Hello Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84796?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+2 by Lean Sheng Tan, Verified+1 by build bot (Jenkins) Change subject: lib/{fit,fit_payload}.c: Enhance support for FIT images ...................................................................... lib/{fit,fit_payload}.c: Enhance support for FIT images This is done with the intention of supporting Universal Payload. Currently, we read an "entry-start" prop. This should be called "entry", awaiting the spec change here https://github.com/UniversalPayload/spec/pull/19. We also implement support for the "load" prop. Note that this is implemented here as a fdt64_t, which may need to be checked against other implementations. The selected configuration no longer requires an FDT. In this case, we'll attempt a config matching the board ID, then fallback to the FIT default compat. Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Signed-off-by: Benjamin Doron <benjamin.doron(a)9elements.com> --- M src/include/fit.h M src/lib/fit.c M src/lib/fit_payload.c 3 files changed, 122 insertions(+), 28 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/84796/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/84796?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Gerrit-Change-Number: 84796 Gerrit-PatchSet: 5 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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coreboot-gerrit December 2024