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Change subject: mb/google/fatcat/var/felino: Add ALC712 codec to devicetree
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85572/comment/cfee3c6b_bdd15d00?us… :
PS2, Line 7: Modify devicetree for ALC712 codec
> Maybe: […]
Done
https://review.coreboot.org/c/coreboot/+/85572/comment/4cd2416a_57f26dcb?us… :
PS2, Line 10:
> Please add, where you got the devicetree values, like `bus_frequency_configs`, from.
Done
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Change subject: mb/google/fatcat/var/felino: Add ALC712 codec to devicetree
......................................................................
mb/google/fatcat/var/felino: Add ALC712 codec to devicetree
Update device tree to support Realtek ALC712 codec.
reference datasheet: Realtek ALC712-VB-CG Rev. 0.24
BUG=b:378629979
TEST=emerge-fatcat coreboot
Change-Id: Ic5c38462cd1ab39d4aebc324d5151cb4337051df
Signed-off-by: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/fatcat/variants/felino/overridetree.cb
1 file changed, 42 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/85572/3
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Change subject: drivers/soundwire: Support Realtek ALC712 codec
......................................................................
Patch Set 2: Code-Review+1
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Attention is currently required from: Angel Pons, Angel Pons, Arthur Heymans, Christian Walter, Jincheng Li, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, yuchi.chen(a)intel.com.
Hello Angel Pons, Angel Pons, Arthur Heymans, Christian Walter, Jincheng Li, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, build bot (Jenkins), yuchi.chen(a)intel.com,
I'd like you to reexamine a change. Please visit
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Change subject: Add support for MiTAC Computing Whitestone-2 mainboard
......................................................................
Add support for MiTAC Computing Whitestone-2 mainboard
The MiTAC Computing Whitestone2 O-RAN CU/DU Edge Server is a compact
and highly efficient 1U rackmount solution designed for edge computing
in O-RAN (Open Radio Access Network) environments. Featuring support
for the 4th Gen Intel® Xeon® Scalable Processor Edge Enhanced Product
Family, it delivers robust performance with a single socket (LGA-4677)
that supports up to 205W TDP. The server provides excellent memory
capabilities with 8 DDR5 RDIMM slots supporting 4400 MHz speeds across
8 channels per CPU.
Working:
- All eight DIMM slots
- Serial port to emit spam
- POST code display
- Front USB 2.0 port
- Front Intel E810 CAM1 (25Gbps x 4)
- Front Intel E810 CAM2 (25Gbps x 4 / 10Gbps x 8)
- M.2 2280/22110 slot x 2 (Gen3 x4)
- Flashing internally with flashrom
Untested for now (i.e. should work, will eventually test):
- Riser PCIe Gen.4 x16 slots x 2 (FHHL)
Others:
- The board boots to Ubuntu 22.04.2 (5.15.0-1032-realtime) with all
40 cores (Intel 5433n) available.
- FlexRAN 23.11 + DPDK 22.11.1 + ACC200 O-RU + O-DU long-run test
pass.
Change-Id: Icf625cf8e9c76ef08411614c15ee43d0c459b905
Signed-off-by: Mark Chang <mark.chang(a)mitaccomputing.com>
---
A configs/config.mitaccomputing_ws_2
A src/mainboard/mitaccomputing/Kconfig
A src/mainboard/mitaccomputing/Kconfig.name
A src/mainboard/mitaccomputing/whitestone-2/Kconfig
A src/mainboard/mitaccomputing/whitestone-2/Kconfig.name
A src/mainboard/mitaccomputing/whitestone-2/Makefile.mk
A src/mainboard/mitaccomputing/whitestone-2/acpi/platform.asl
A src/mainboard/mitaccomputing/whitestone-2/board.fmd
A src/mainboard/mitaccomputing/whitestone-2/board_info.txt
A src/mainboard/mitaccomputing/whitestone-2/bootblock.c
A src/mainboard/mitaccomputing/whitestone-2/devicetree.cb
A src/mainboard/mitaccomputing/whitestone-2/dsdt.asl
A src/mainboard/mitaccomputing/whitestone-2/include/smbios_onboard.h
A src/mainboard/mitaccomputing/whitestone-2/include/spr_ws_2_gpio.h
A src/mainboard/mitaccomputing/whitestone-2/include/sprsp_ws_2_iio.h
A src/mainboard/mitaccomputing/whitestone-2/mainboard.c
A src/mainboard/mitaccomputing/whitestone-2/ramstage.c
A src/mainboard/mitaccomputing/whitestone-2/romstage.c
18 files changed, 739 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/85532/3
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The following approvals got outdated and were removed:
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Change subject: Add support for MiTAC Computing Whitestone-2 mainboard
......................................................................
Add support for MiTAC Computing Whitestone-2 mainboard
The MiTAC Computing Whitestone2 O-RAN CU/DU Edge Server is a compact and
highly efficient 1U rackmount solution designed for edge computing in O-RAN
(Open Radio Access Network) environments. Featuring support for the 4th Gen
Intel® Xeon® Scalable Processor Edge Enhanced Product Family, it delivers
robust performance with a single socket (LGA-4677) that supports up to 205W
TDP. The server provides excellent memory capabilities with 8 DDR5 RDIMM slots
supporting 4400 MHz speeds across 8 channels per CPU.
Working:
- All eight DIMM slots
- Serial port to emit spam
- POST code display
- Front USB 2.0 port
- Front Intel E810 CAM1 (25Gbps x 4)
- Front Intel E810 CAM2 (25Gbps x 4 / 25Gbps x 2 + 10Gbps x 4 / 10Gbps x 8)
- M.2 2280/22110 slot x 2 (Gen3 x4)
- Flashing internally with flashrom
Untested for now (i.e. should work, will eventually test):
- Riser PCIe Gen.4 x16 slots x 2 (FHHL)
Others:
- The board boots to Ubuntu 22.04.2 (5.15.0-1032-realtime) with all 40
cores (Intel 5433n) available.
- It's ready for FlexRAN 23.11 + DPDK 22.11.1 + ACC200 O-RU + O-DU test.
Change-Id: Icf625cf8e9c76ef08411614c15ee43d0c459b905
Signed-off-by: Mark Chang <mark.chang(a)mitaccomputing.com>
---
A configs/config.mitaccomputing_ws_2
A src/mainboard/mitaccomputing/Kconfig
A src/mainboard/mitaccomputing/Kconfig.name
A src/mainboard/mitaccomputing/whitestone-2/Kconfig
A src/mainboard/mitaccomputing/whitestone-2/Kconfig.name
A src/mainboard/mitaccomputing/whitestone-2/Makefile.mk
A src/mainboard/mitaccomputing/whitestone-2/acpi/platform.asl
A src/mainboard/mitaccomputing/whitestone-2/board.fmd
A src/mainboard/mitaccomputing/whitestone-2/board_info.txt
A src/mainboard/mitaccomputing/whitestone-2/bootblock.c
A src/mainboard/mitaccomputing/whitestone-2/devicetree.cb
A src/mainboard/mitaccomputing/whitestone-2/dsdt.asl
A src/mainboard/mitaccomputing/whitestone-2/include/smbios_onboard.h
A src/mainboard/mitaccomputing/whitestone-2/include/spr_ws_2_gpio.h
A src/mainboard/mitaccomputing/whitestone-2/include/sprsp_ws_2_iio.h
A src/mainboard/mitaccomputing/whitestone-2/mainboard.c
A src/mainboard/mitaccomputing/whitestone-2/ramstage.c
A src/mainboard/mitaccomputing/whitestone-2/romstage.c
18 files changed, 739 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/85532/2
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Mark Chang has posted comments on this change by Mark Chang. ( https://review.coreboot.org/c/coreboot/+/85532?usp=email )
Change subject: Add support for MiTAC Computing Whitestone-2 mainboard
......................................................................
Patch Set 1:
(15 comments)
Patchset:
PS1:
Done
Commit Message:
https://review.coreboot.org/c/coreboot/+/85532/comment/6030a655_1a626e6b?us… :
PS1, Line 8:
> Could you please add a body to the commit message? I would suggest describing the board (looks like […]
Done
File configs/config.mitaccomputing_ws_2:
PS1:
> I see references to site-local here. […]
Done
https://review.coreboot.org/c/coreboot/+/85532/comment/7aed971b_66f03b1a?us… :
PS1, Line 15: CONFIG_X2APIC_LATE_WORKAROUND=y
> We only verified Intel 5433N on our Whitestone-2.
Done
File src/mainboard/mitaccomputing/whitestone-2/acpi/platform.asl:
https://review.coreboot.org/c/coreboot/+/85532/comment/b9c5812e_17b40d03?us… :
PS1, Line 4: #include <soc/intel/common/acpi/acpi_wake_source.asl>
> Will remove it.
Done
https://review.coreboot.org/c/coreboot/+/85532/comment/0dc71faa_69780f1b?us… :
PS1, Line 13: }
> Add "#include <arch/x86/acpi/post.asl> will trigger build error.
Done
https://review.coreboot.org/c/coreboot/+/85532/comment/0b3963a9_10c79976?us… :
PS1, Line 30:
> We will remove it.
Done
File src/mainboard/mitaccomputing/whitestone-2/board_info.txt:
PS1:
> Update ROM package: SOIC-16
Done
File src/mainboard/mitaccomputing/whitestone-2/bootblock.c:
https://review.coreboot.org/c/coreboot/+/85532/comment/56525091_3609d9e1?us… :
PS1, Line 18: static void enable_espi_lpc_io_windows(void)
> We could use below APIs to update it. […]
Done
https://review.coreboot.org/c/coreboot/+/85532/comment/a6cc5493_58dfc7db?us… :
PS1, Line 23: * For that end it is wired into BMC virtual port.
> The Whitestone-2 only use SUART1. […]
Done
File src/mainboard/mitaccomputing/whitestone-2/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/85532/comment/109db048_a96b6272?us… :
PS1, Line 10: 0x20110725 // OEM revision
> Remove it
Done
File src/mainboard/mitaccomputing/whitestone-2/mainboard.c:
https://review.coreboot.org/c/coreboot/+/85532/comment/0757fa01_ea724e1b?us… :
PS1, Line 46: }
> These E810 devices are Ethernet NICs. […]
Done
https://review.coreboot.org/c/coreboot/+/85532/comment/aabc2f92_1971a347?us… :
PS1, Line 71: }
> Will this duplicate with smbios_generate_type41_from_devtree?
Done
https://review.coreboot.org/c/coreboot/+/85532/comment/d512eef5_dadf05bf?us… :
PS1, Line 80: };
> Angel, you're right, it's invoked automatically.
Done
File src/mainboard/mitaccomputing/whitestone-2/romstage.c:
https://review.coreboot.org/c/coreboot/+/85532/comment/da7d0696_e3a68e0e?us… :
PS1, Line 18: Protocl
> resolved
Done
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Change subject: mb/google/brya/var/marasov: Enable GPP_F9 GPIO for early panel power-on
......................................................................
Patch Set 1: Code-Review+2
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Change subject: cpu/x86/topology: Add module_id to CPU topology
......................................................................
Patch Set 1:
This change is ready for review.
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Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85576?usp=email )
Change subject: cpu/x86/topology: Simplify CPU topology initialization
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Gerrit-Change-Id: Ie9424559f895af69e79c36b919e80af803861148
Gerrit-Change-Number: 85576
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Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com>
Gerrit-Comment-Date: Thu, 12 Dec 2024 22:07:53 +0000
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