coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add disable modem power driver
by Yidi Lin (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85651?usp=email ) Change subject: soc/mediatek/mt8196: Add disable modem power driver ...................................................................... Patch Set 3: (3 comments) File src/soc/mediatek/mt8196/include/soc/md_power_ctrl.h: https://review.coreboot.org/c/coreboot/+/85651/comment/db1516a3_815a37c7?us… : PS3, Line 9: md modem File src/soc/mediatek/mt8196/md_power_ctrl.c: https://review.coreboot.org/c/coreboot/+/85651/comment/22a60db4_4c9ee0db?us… : PS3, Line 90: struct pmif *pmif_arb = get_pmif_controller(PMIF_SPMI, SPMI_MASTER_1); : : /* Vsram_vosel = 0x24d, read Vsram value */ : reg = VSRAM_VOSEL; : pmif_arb->read(pmif_arb, SPMI_SLAVE_4, reg, &val); : : /* Vmodem_vosel = 0x24e, write Vmodem 0.75V */ : reg = VMODEM_VOSEL; : pmif_arb->write(pmif_arb, SPMI_SLAVE_4, reg, SPMI_SLAVE_4_750MV); : pmif_arb->read(pmif_arb, SPMI_SLAVE_4, reg, &val); Add `mt6363_write8` to `common/mt6363.c`. Call `mt6363_init_pmif_arb` and use read8/write8 APIs from mt6363 here. https://review.coreboot.org/c/coreboot/+/85651/comment/d06a0fa3_8951e47f?us… : PS3, Line 124: : while ((read32(&mtk_apifrbus_ao_io_reg_bus->sleep_protect_rdy_sta_1) & : MD1_PROT_STEP0_0_ACK_MASK) != MD1_PROT_STEP0_0_ACK_MASK) { : printk(BIOS_INFO, "First check: Does not get MD1_PROT_STEP0_0_ACK_MASK\n"); : retryCount++; : if (retryCount > MAX_RETRY_COUNT) { : printk(BIOS_INFO, "First check: check failed\n"); : break; : } : } use `retry` API or implement a `wait_for_state_ready` function -- To view, visit https://review.coreboot.org/c/coreboot/+/85651?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8808e3500727753e4537017b46ac8ab39d59468 Gerrit-Change-Number: 85651 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 05:54:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/mediatek/common: Update timer macro name
by Yidi Lin (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Hung-Te Lin, Vince Liu, Yu-Ping Wu. Yidi Lin has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/85681?usp=email ) Change subject: soc/mediatek/common: Update timer macro name ...................................................................... Patch Set 1: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85681/comment/04125692_b10fc09d?us… : PS1, Line 7: Update timer macro name Replace GPT_MHZ with TIMER_MHZ for readability https://review.coreboot.org/c/coreboot/+/85681/comment/95f905c5_76e9138f?us… : PS1, Line 11: The new ICs(e.g. mt8196, mt8189) will no longer use GPT, and in order : to improve code readability, so replace GPT_MHZ of existing Soc's : with macro name TIMER_MHZ. The new ICs(e.g. mt8196, mt8189) is no longer using GPT. In order to improve code readability, replace GPT_MHZ with TIMER_MHZ for existing SoCs. -- To view, visit https://review.coreboot.org/c/coreboot/+/85681?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I02f18bfa5b5912f28e322d40cd46823a0095bbf4 Gerrit-Change-Number: 85681 Gerrit-PatchSet: 1 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 05:45:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: docs: Add 24.12 release notes
by Felix Singer (Code Review) 20 Dec '24

20 Dec '24

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85683?usp=email ) Change subject: docs: Add 24.12 release notes ...................................................................... docs: Add 24.12 release notes Also drop the 24.11 release notes template. Change-Id: Ifeb88a1bb4f05183ac9274de9b26970b6155017d Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85683 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- D Documentation/releases/coreboot-24.11-relnotes.md A Documentation/releases/coreboot-24.12-relnotes.md M Documentation/releases/index.md 3 files changed, 338 insertions(+), 100 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/Documentation/releases/coreboot-24.11-relnotes.md b/Documentation/releases/coreboot-24.11-relnotes.md deleted file mode 100644 index 9ff9036..0000000 --- a/Documentation/releases/coreboot-24.11-relnotes.md +++ /dev/null @@ -1,99 +0,0 @@ -Upcoming release - coreboot 24.11 -======================================================================== - -The 24.11 release is scheduled for Mid November, 2024 - - -Update this document with changes that should be in the release notes. - -* Please use Markdown. -* See the past few release notes for the general format. -* The chip and board additions and removals will be updated right - before the release, so those do not need to be added. -* Note that all changes before the release are done are marked upcoming. - A final version of the notes are done after the release. - - - -Significant or interesting changes ----------------------------------- - -* Add changes that need a full description here - -* This section should have full descriptions and can or should have - a link to the referenced commits. - - - -Additional coreboot changes ---------------------------- - -The following are changes across a number of patches, or changes worth -noting, but not needing a full description. - -* Changes that only need a line or two of description go here. - - - -Changes to external resources ------------------------------ - -### Toolchain updates - -* Upgrade binutils from 2.42 to 2.43.1 -* Upgrade GCC from 14.1.0 to 14.2.0 -* Upgrade CMake from 3.29.3 to 3.30.2 -* Upgrade LLVM from 18.1.6 to 18.1.8 - -### Git submodule pointers - - -### External payloads - - - -Platform Updates ----------------- - -### Added mainboards: -* To be filled in immediately before the release by the release team - - -### Removed Mainboards -* To be filled in immediately before the release by the release team - - -### Updated SoCs -* To be filled in immediately before the release by the release team - - - -Plans to move platform support to a branch ------------------------------------------- -* To be filled in immediately before the release by the release team - - - -Statistics from the 24.08 to the 24.11 release --------------------------------------------- -* To be filled in immediately before the release by the release team - - - -Significant Known and Open Issues ---------------------------------- - -Issues from the coreboot bugtracker: <https://ticket.coreboot.org/> -* To be filled in immediately before the release by the release team - - - -coreboot Links and Contact Information --------------------------------------- - -* Main Web site: <https://www.coreboot.org> -* Downloads: <https://coreboot.org/downloads.html> -* Source control: <https://review.coreboot.org> -* Documentation: <https://doc.coreboot.org> -* Issue tracker: <https://ticket.coreboot.org/projects/coreboot> -* Donations: <https://coreboot.org/donate.html> diff --git a/Documentation/releases/coreboot-24.12-relnotes.md b/Documentation/releases/coreboot-24.12-relnotes.md new file mode 100644 index 0000000..51a581f --- /dev/null +++ b/Documentation/releases/coreboot-24.12-relnotes.md @@ -0,0 +1,337 @@ +Upcoming release - coreboot 24.12 +================================= + +We are pleased to announce the release of coreboot 24.12, another significant +milestone in our ongoing commitment to delivering open-source firmware +solutions. This release includes 970 commits, contributed by 126 dedicated +individuals from our global community. The updates in 24.12 bring +various enhancements, optimizations, and new features that further improve the +reliability and performance of coreboot across supported platforms. + +We extend our sincere thanks to the patch authors, reviewers, and everyone +involved in the coreboot community for their hard work and dedication. Your +contributions continue to advance and refine coreboot with each release. As +always, thank you for your support and collaboration in driving the future of +open-source firmware. + +The next coreboot release, 25.03, is planned for mid March. + +Significant or interesting changes +---------------------------------- + +### drivers/option: Add forms in cbtables + +Introduce a mechanism so that coreboot can provide a list of options to +post-coreboot code. The options are grouped together into forms and +have a meaning name and optional help text. This can be used to let +payloads know which options should be displayed in a setup menu, +for instance. Although this system was written to be used with edk2, +it has been designed with flexibility in mind so that other payloads +can also make use of this mechanism. The system currently lacks a way +to describe where to find option values. + +This information is stored in a set of data structures specifically +created for this purpose. This format is known as CFR, which means +"coreboot forms representation" or "cursed forms representation". +Although the "forms representation" is borrowed from UEFI, CFR can +be used in non-UEFI scenarios as well. + +The data structures are implemented as an extension of cbtables records +to support nesting. It should not break backwards compatibility because +the CFR root record (LB_TAG_CFR_ROOT) size includes all of its children +records. The concept of record nesting is borrowed from the records for +CMOS options. It is not possible to reuse the CMOS records because they +are too closely coupled with CMOS options; using these structures would +needlessly restrict more capable backends to what can be done with CMOS +options, which is undesired. + +Because CFR supports variable-length components, directly transforming +options into CFR structures is not a trivial process. Furthermore, CFR +structures need to be written in one go. Because of this, abstractions +exist to generate CFR structures from a set of "setup menu" structures +that are coreboot-specific and could be integrated with the devicetree +at some point. Note that `struct sm_object` is a tagged union. This is +used to have lists of options in an array, as building linked lists of +options at runtime is extremely impractical because options would have +to be added at the end of the linked list to maintain option order. To +avoid mistakes defining `struct sm_object` values, helper macros exist +for supported option types. The macros also provide some type checking +as they initialise specific union members. + +It should be possible to extend CFR support for more sophisticated +options like fan curve points. + + +### Makefile.mk: Skip unnecessary recompiles when static.{c,h} are updated + +The generated static.c file output by sconfig is currently added as a +prerequisite for all objects to ensure that static.h exists before +compiling anything that might need it. However, this forces every single +object out of date when the compiled devicetree is updated, even though +not every file actually needs static.h. + +Only static.h actually needs to exist before compilation of other +objects, since static.c is an independent compilation unit that doesn't +need to exist before other objects can be built. Thus, change the +prerequisite from static.c to static.h, and add a rule for static.h that +depends on static.c. The recipe is a simple `true` since sconfig +generates static.c and static.h at the same time. To prevent unnecessary +recompiles, make static.h an order-only prerequisite [1] using the new +generated files argument for create_cc_template to ensure that the +header exists before any object might need it, but without forcing a +recompile of all objects by default whenever it is updated. + +On a clean build, all objects will be compiled since they do not exist, +and these will occur after static.h is generated due to the default +order-only prerequisite. On subsequent incremental compiles, sources +that do need static.h will be appropriately marked out of date due to +the generated .d dependency files from the compiler, which list static.h +as a normal prerequisite for each objects that do include it, which +overrides the default order-only prerequisite. The dependency files +generated for all other objects will not include static.h, and thus the +objects will not be updated since the default order-only dependency does +not force them out of date. + +After updating the devicetree of qemu-i440fx after a clean build, +comparing the build log with `make --debug=why` with the generated +dependency files indicates that only objects that actually depend on +static.h were rebuilt, instead of every object. Running a timeless +incremental build after making a change in the devicetree yielded +identical roms when performed with this patch and main, with the only +difference being the number of objects that needed to be rebuilt. Also +tested with the E6430. + +[1] <https://www.gnu.org/software/make/manual/html_node/Prerequisite-Types.html> + + +### sconfig: Move config_of_soc from device.h to static.h + +Many sources include device.h and thus static.h, but many only need the +function declarations and type definitions, not the compiled devicetree +from sconfig. This causes many unnecessary recompiles whenever the +devicetree is updated due to the dependency. Address this by moving the +config_of_soc macro directly into the generated static.h header, as it +seems to be the only line in device.h that actually requires static.h. +For now, static.h remains included in device.h so that the build is not +affected. Subsequent commits will include static.h directly into sources +that actually need it, after which it can be dropped from device.h. + +Some statistics for C objects: + +Dell Latitude E6400 (GM45/ICH9): +669 total objects +181 depend on static.h +2 require static.h + +Dell Latitude E6430 (Ivy Bridge/Panther Point): +693 total objects +199 depend on static.h +3 require static.h + +Lenovo ThinkCentre M700 / M900 Tiny (Kaby Lake): +794 total objects +298 depend on static.h +23 objects require static.h + +MSI PRO Z690-A (WIFI) DDR4 (Alder Lake): +959 total objects +319 depend on static.h +25 require static.h + +The number of objects was determined by grepping the build log for +calls to CC, the number of objects that depend on static.h was +determined by grepping for calls to CC after touching static.h, and the +number of objects that actually require the static.h related lines from +device.h was determined by grepping for objects that failed to build +after removing the static.h lines from device.h and running make with +the --keep-going flag. + + +### Makefile: Fix no-op incremental build + +If make is ran a second time after an initial clean compile, the entire +rom will be rebuilt. Subsequent calls to make will not rebuild the rom. +This initial rebuild was due to build/util/kconfig/conf being newer than +config.h, and the subsequent rebuild of the header marked everything +else as out of date. The reason conf was newer than config.h is because +it was being treated as an intermediate file [1]. In the rule for +config.h, conf is a prerequisite, but since it is treated as an +intermediate, its rule will not be run if config.h exists and all the +prerequisites of conf (i.e. its source files) are also up to date. + +On a clean build after a make menuconfig, config.h exists, satisfying +these conditions. In this case, config.h is treated as being up to date +even though conf does not exist. However, if another target does not +exist and also has conf as a prerequisite, conf will then be built so +that the target can be built. This caused conf to be newer than +config.h, but by default GNU Make deletes intermediate files after a +build which would prevent conf from affecting config.h on subsequent +rebuilds. + +However, commit dd6efce934fb ("Makefile: Add .SECONDARY") adds the +.SECONDARY special target, which prevents intermediate files from being +deleted after the build [2]. Thus, conf persists to the first no-op +build, making config.h out of date. Since config.h is updated during +this first rebuild, conf is no longer newer than it, and thus subsequent +no-op builds behave as expected. + +Fix this by preventing conf from being treated as an intermediate file +by adding it as a prerequisite of the .NOTINTERMEDIATE special target, +which causes conf to always be rebuilt if it does not exist. Thus, on +the initial clean compile, config.h will be updated after building conf +as a prerequisite, preventing config.h from being marked out of date on +a subsequent rebuild. + +[1] <https://www.gnu.org/software/make/manual/html_node/Chained-Rules.html> +[2] <https://www.gnu.org/software/make/manual/html_node/Special-Targets.html> + + +### drivers/efi/uefi_capsules.c: coalesce and store UEFI capsules + +How it approximately works: + +(During a normal system run): +1. OS puts a capsule into RAM and calls UpdateCapsule() function of EFI +runtime +2. If applying the update requires a reboot, EFI implementation creates +a new CapsuleUpdateData* EFI variable pointing at the beginning of +capsules description (not data, but description of the data) and does +a warm reboot leaving capsule data and its description in RAM to be +picked by firmware on the next boot process + +(After DEV_INIT:) +3. Capsules are discovered by checking for CapsuleUpdateData* variables +4. Capsule description in memory and capsule data is validated for +Sanity +5. Capsule data is coalesced into a continuous piece of memory + +(On BS_WRITE_TABLES via dasharo_add_capsules_to_bootmem() hook:) +6. Buffer with coalesced capsules is marked as reserved + +(On BS_WRITE_TABLES via lb_uefi_capsules() hook:) + +7. coreboot table entry is added for each of the discovered capsules + +(In UEFI payload:) +8. CapsuleUpdateData* get removed +9. coreboot table is checked for any update capsules which are then applied + + + +Additional coreboot changes +--------------------------- + +* Add Serial Flash Discoverable Parameters (SFDP) Support +* Add Replay Protected Monotonic Counter (RPMC) Support +* arch/arm64: Add Clang as supported compiler +* Add initial experimental Link-time Optimization (LTO) support +* util/scripts: Add script to capture commands from build +* Transform more devicetree options into booleans +* Make more mainboards using the AZALIA_PIN_DESC macro +* More effort for reworking the audio jacks setup +* libgfxinit: Add option to configure screen rotation +* Additional functions supposed in ACPI interface for Intel WiFi and BT devices + + + +Changes to external resources +----------------------------- + +### Toolchain updates + +* binutils from 2.42 to 2.43.1 +* GCC from 14.1.0 to 14.2.0 +* CMake from 3.29.3 to 3.30.2 +* LLVM from 18.1.6 to 18.1.8 + + +### Git submodule pointers + +* 3rdparty/arm-trusted-firmware: Update from commit id c5b8de86c8 to 15e5c6c91d (693 commits) +* 3rdparty/blobs: Update from commit id a8db7dfe82 to 14f8fcc1b4 (15 commits) +* 3rdparty/fsp: Update from commit id 800c85770b to 851f7105d8 (24 commits) +* 3rdparty/intel-microcode: Update from commit id 5278dfcf98 to 8ac9378a84 (4 commits) +* 3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER + + +### External payloads + +* U-Boot: Upgrade from 2024.04 to 2024.07 +* payloads/edk2: Update default branch for MrChromebox repo to 2024-08 + + + +Platform Updates +---------------- + +### Added 39 mainboards: + +* Arm Neoverse N2 +* ASROCK IMB-1222 +* Dell Inc. Latitude E5420 +* Dell Inc. Latitude E5520 +* Dell Inc. Latitude E5530 +* Dell Inc. Latitude E6220 +* Dell Inc. Latitude E6230 +* Dell Inc. Latitude E6320 +* Dell Inc. Latitude E6330 +* Dell Inc. Latitude E6420 +* Dell Inc. Latitude E6520 +* Dell Inc. Latitude E6530 +* Dell Inc. OptiPlex 3050 Micro +* Erying Polestar G613 Pro (TGL-H) +* GIGABYTE GA-H77M-D3H +* Google -> Fatcat_ish +* Google -> Fatcatite +* Google -> Fatcatnuvo +* Google -> Felino +* Google -> Francka +* Google -> Hylia +* Google -> Kanix +* Google -> Navi +* Google -> Pujjogatwin +* Google -> Rull +* Google -> Skywalker +* Google -> Telith +* Google -> Uldrenite +* Hardkernel ODROID-H4 / H4+ / H4 Ultra +* HP Compaq 8200 Elite USDT +* HP Compaq 8300 Elite SFF +* Intel Frost Creek +* LattePanda LattePanda Mu +* Lenovo ThinkCentre M920 Tiny +* MiTAC Computing Whitestone 2 +* Star Labs Star Labs Byte Mk II (N200) +* Star Labs Star Labs StarFighter Mk I (i3-1315U, i7-13700H and i9-13900H) +* Topton X2F_N100 +* VIA EPIA-EX (work in progress) + + +### Updated CPUs/SoCs + +* Via C7 +* Intel Pantherlake +* Intel Snowridge +* Intel Xeon SP +* MediaTek MT8196 + + + +Statistics from the 24.08 to the 24.12 release +---------------------------------------------- + +* Total commits: 970 +* Total authors: 126 +* New authors: 20 + + + +coreboot Links and Contact Information +-------------------------------------- + +* Main Web site: <https://www.coreboot.org> +* Downloads: <https://coreboot.org/downloads.html> +* Source control: <https://review.coreboot.org> +* Documentation: <https://doc.coreboot.org> +* Issue tracker: <https://ticket.coreboot.org/projects/coreboot> +* Donations: <https://coreboot.org/donate.html> diff --git a/Documentation/releases/index.md b/Documentation/releases/index.md index f474514..29ba2d4 100644 --- a/Documentation/releases/index.md +++ b/Documentation/releases/index.md @@ -6,7 +6,7 @@ ```{toctree} :maxdepth: 1 -24.11 - November 2024 <coreboot-24.11-relnotes.md> +24.12 - December 2024 <coreboot-24.12-relnotes.md> ``` The [checklist] contains instructions to ensure that a release covers all -- To view, visit https://review.coreboot.org/c/coreboot/+/85683?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifeb88a1bb4f05183ac9274de9b26970b6155017d Gerrit-Change-Number: 85683 Gerrit-PatchSet: 8 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: abrecovery: Add setting boot status and corrupt type
by ritul guru (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Bao Zheng, Julius Werner, Zheng Bao. ritul guru has posted comments on this change by Bao Zheng. ( https://review.coreboot.org/c/coreboot/+/85645?usp=email ) Change subject: abrecovery: Add setting boot status and corrupt type ...................................................................... Patch Set 3: (1 comment) File src/lib/cbfs.c: https://review.coreboot.org/c/coreboot/+/85645/comment/3e21b23f_d4432a6e?us… : PS3, Line 187: PSP_AB_RECOVERY this is for test purpose, so can this be PSP_AB_RECOVERY_TEST -- To view, visit https://review.coreboot.org/c/coreboot/+/85645?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I55a379b9c9f85fabbd8a1f98fbef3f57d7d8118d Gerrit-Change-Number: 85645 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Fri, 20 Dec 2024 05:04:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: abrecovery: Add setting boot status and corrupt type
by ritul guru (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Bao Zheng, Julius Werner, Zheng Bao. ritul guru has posted comments on this change by Bao Zheng. ( https://review.coreboot.org/c/coreboot/+/85645?usp=email ) Change subject: abrecovery: Add setting boot status and corrupt type ...................................................................... Patch Set 3: (1 comment) File src/lib/prog_loaders.c: https://review.coreboot.org/c/coreboot/+/85645/comment/a61d4ce7_b4edf362?us… : PS3, Line 198: set_boot_status can you define what boot status 1 means? can have macro/enum for this? -- To view, visit https://review.coreboot.org/c/coreboot/+/85645?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I55a379b9c9f85fabbd8a1f98fbef3f57d7d8118d Gerrit-Change-Number: 85645 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Fri, 20 Dec 2024 05:02:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/fatcat: Keep GSPIx interface default PCI
by Pranava Y N (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Subrata Banik. Pranava Y N has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/85686?usp=email ) Change subject: mb/google/fatcat: Keep GSPIx interface default PCI ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Why are we keeping this default to PCI instead of disabled? -- To view, visit https://review.coreboot.org/c/coreboot/+/85686?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia3348f78614e61259333ccf2babf20eaf4666a0e Gerrit-Change-Number: 85686 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 04:52:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Rename GSPI2 to GSPI0A
by Pranava Y N (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Kapil Porwal, Subrata Banik. Pranava Y N has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/85685?usp=email ) Change subject: soc/intel/pantherlake: Rename GSPI2 to GSPI0A ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85685?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9b87d38e44c07a053104b53df38ee1ce14a86c7f Gerrit-Change-Number: 85685 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 04:45:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/intel/alderlake: Add function to force disable memory channels
by Kapil Porwal (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Eric Lai, Jamie Chen, Jayvik Desai, Jeremy Soller, Lean Sheng Tan, Michał Kopeć, Michał Żygowski, Nick Vaccaro, Paul Menzel, Piotr Król, Sean Rhodes, Subrata Banik, Tim Crawford. Kapil Porwal has posted comments on this change by Kapil Porwal. ( https://review.coreboot.org/c/coreboot/+/85529?usp=email ) Change subject: soc/intel/alderlake: Add function to force disable memory channels ...................................................................... Patch Set 8: (2 comments) File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/85529/comment/3e2ae1b8_349ffa25?us… : PS1, Line 252: if (ch_disable_mask == 0) { > After consulting our memory expert, the first channel of DRAM chip must be connected. Updated the patch. File src/soc/intel/alderlake/meminit.c: https://review.coreboot.org/c/coreboot/+/85529/comment/0ec5f25c_40f29ff8?us… : PS6, Line 260: if ((ch_disable_mask & BIT(0)) && : !((ch_disable_mask & 0xf) == (BIT(0) | BIT(1))) : ) { > That is correct. […] Updated the patch as per https://review.coreboot.org/c/coreboot/+/85529/comment/9166abbc_80078807/. Now, All other channels can be disabled except channel 0 (Mc0Ch0). -- To view, visit https://review.coreboot.org/c/coreboot/+/85529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfeca4509cb3d88bc1bac2ac2d480e665d895bc5 Gerrit-Change-Number: 85529 Gerrit-PatchSet: 8 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 04:41:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <ericllai(a)google.com> Comment-In-Reply-To: Jamie Chen <jamie.chen(a)intel.corp-partner.google.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[L] Change in coreboot[main]: docs: Add 24.12 release notes
by Matt DeVillier (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Angel Pons, Felix Singer, Jason Glenesk, Martin L Roth. Matt DeVillier has posted comments on this change by Felix Singer. ( https://review.coreboot.org/c/coreboot/+/85683?usp=email ) Change subject: docs: Add 24.12 release notes ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85683?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifeb88a1bb4f05183ac9274de9b26970b6155017d Gerrit-Change-Number: 85683 Gerrit-PatchSet: 7 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 20 Dec 2024 04:23:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: docs: Add 24.12 release notes
by Felix Singer (Code Review) 20 Dec '24

20 Dec '24

Attention is currently required from: Angel Pons, Felix Singer, Jason Glenesk, Martin L Roth, Matt DeVillier. Hello Angel Pons, Jason Glenesk, Martin L Roth, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85683?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Code-Review+2 by Matt DeVillier Change subject: docs: Add 24.12 release notes ...................................................................... docs: Add 24.12 release notes Also drop the 24.11 release notes template. Change-Id: Ifeb88a1bb4f05183ac9274de9b26970b6155017d Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- D Documentation/releases/coreboot-24.11-relnotes.md A Documentation/releases/coreboot-24.12-relnotes.md M Documentation/releases/index.md 3 files changed, 338 insertions(+), 100 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/85683/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/85683?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifeb88a1bb4f05183ac9274de9b26970b6155017d Gerrit-Change-Number: 85683 Gerrit-PatchSet: 7 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>

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