coreboot-gerrit November 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: soc/intel/jasperlake: add support for RP LTR mechanism
by Lawrence Chang (Code Review) 01 Nov '24

01 Nov '24

Attention is currently required from: Curtis Chen, David Ruth, Jamie Chen, Nick Vaccaro, Paul Menzel, Simon Yang. Lawrence Chang has posted comments on this change by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/84866?usp=email ) Change subject: soc/intel/jasperlake: add support for RP LTR mechanism ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84866/comment/7d9540ce_4a953c5f?us… : PS3, Line 13: Tested on Awasuki with RTL8852BE > Please add these details, and the command how to dump the root port configuration space. Add details to the commit message -- To view, visit https://review.coreboot.org/c/coreboot/+/84866?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I85e50b01cc9fb5522d457cfce3700b7c85d7012f Gerrit-Change-Number: 84866 Gerrit-PatchSet: 4 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.com> Gerrit-Reviewer: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Reviewer: David Ruth <druth(a)chromium.org> Gerrit-Reviewer: David Ruth <druth(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: David Ruth <druth(a)google.com> Gerrit-Attention: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Comment-Date: Fri, 01 Nov 2024 08:16:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Lawrence Chang <lawrence.chang(a)intel.com>

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[XS] Change in coreboot[main]: soc/intel/jasperlake: add support for RP LTR mechanism
by Lawrence Chang (Code Review) 01 Nov '24

01 Nov '24

Attention is currently required from: Curtis Chen, David Ruth, Jamie Chen, Lawrence Chang, Nick Vaccaro, Simon Yang. Hello Curtis Chen, David Ruth, David Ruth, Jamie Chen, Nick Vaccaro, Simon Yang, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84866?usp=email to look at the new patch set (#4). Change subject: soc/intel/jasperlake: add support for RP LTR mechanism ...................................................................... soc/intel/jasperlake: add support for RP LTR mechanism Reserve Root Port LTR mechanism in FSP, in case some devices need to optimize LTR. BUG=366383364 TEST=Tested on Awasuki with RTL8852BE use lspci -xxx to get PCIE config space dump, and LTR Mechanism Enable bit is offset 68h[10]. 00:1c.0 PCI bridge: Intel Corporation Device 4dbf (rev 01) 00: 86 80 bf 4d 07 05 10 00 01 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 20 20 00 20 20: c0 7f c0 7f f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 04 12 00 40: 10 80 42 01 00 80 00 00 00 00 10 00 13 4c 72 08 50: 43 00 11 70 00 b2 3c 00 00 00 40 01 08 00 00 00 60: 00 00 00 00 37 08 00 00 00 04 00 00 0e 00 00 00 70: 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 01 00 38 02 e0 fe 00 00 00 00 00 00 00 00 90: 0d a0 00 00 86 80 bf 4d 00 00 00 00 00 00 00 00 a0: 01 00 03 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 10 00 07 42 18 01 40 08 00 9e 09 00 00 00 00 e0: 00 03 e3 00 00 00 00 00 16 00 10 00 00 00 00 00 f0: 50 01 00 00 00 00 00 4c b5 0f 02 01 04 00 00 84 Change-Id: I85e50b01cc9fb5522d457cfce3700b7c85d7012f Signed-off-by: Lawrence Chang <lawrence.chang(a)intel.com> --- M src/soc/intel/jasperlake/chip.h M src/soc/intel/jasperlake/fsp_params.c 2 files changed, 7 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/84866/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/84866?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I85e50b01cc9fb5522d457cfce3700b7c85d7012f Gerrit-Change-Number: 84866 Gerrit-PatchSet: 4 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.com> Gerrit-Reviewer: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Reviewer: David Ruth <druth(a)chromium.org> Gerrit-Reviewer: David Ruth <druth(a)google.com> Gerrit-Reviewer: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Chen <jamie.chen(a)intel.com> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: David Ruth <druth(a)google.com> Gerrit-Attention: Curtis Chen <curtis.chen(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.com>

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[S] Change in coreboot[main]: soc/intel/common/gpio: add function to lock GPIO configuration
by Subrata Banik (Code Review) 01 Nov '24

01 Nov '24

Attention is currently required from: Bora Guvendik, Cliff Huang, Hannah Williams, Jérémy Compostella, Pranava Y N, Wonkyu Kim. Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84901?usp=email ) Change subject: soc/intel/common/gpio: add function to lock GPIO configuration ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/common/block/gpio/gpio.c: https://review.coreboot.org/c/coreboot/+/84901/comment/c6f1cbc8_7b9be86e?us… : PS3, Line 485: /* Clear lock for the exception PADs */ > I think it's implementation way difference. > We can lock each pin mux table by using existing _LOCK macro but it may be work if we want to lock some of pin's configuration. > Basic assumption for this change(having exception table for lock) is for locking most of pin configuration for system safety. And it'll require less change compared to changing entire pin configuration in gpio.c. unless you populate a mainboard table the one you called as exception table, I'm unable to understand how this is not any more duplication between using LOCK macro in gpio.c vs adding one more table in mainboard for locking the PAD configuration. Eventually both should do the same. Also, please don't take the ability for changing the PAD configuration if not required to lock, we are using feature like FW shell or UEFI shell to alter the GPIO configuration to debug some critical issue w/o need to flash the entire AP FW> Therefore, I don't see a need to lock every GPIOs, rather we should only lock the required GPIOs like wake capable and IRQ ones (rests are harmless). -- To view, visit https://review.coreboot.org/c/coreboot/+/84901?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iabe4e4b1d282a5f6cae8f330100c9139e0c2691d Gerrit-Change-Number: 84901 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Fri, 01 Nov 2024 07:39:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hannah Williams <hannah.williams(a)intel.com> Comment-In-Reply-To: Cliff Huang <cliff.huang(a)intel.com> Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/alderlake: Fix uninitialized usb_cfg pointer
by Subrata Banik (Code Review) 01 Nov '24

01 Nov '24

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Karthik Ramasubramanian, Nick Vaccaro. Subrata Banik has posted comments on this change by Karthik Ramasubramanian. ( https://review.coreboot.org/c/coreboot/+/84939?usp=email ) Change subject: soc/intel/alderlake: Fix uninitialized usb_cfg pointer ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/alderlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/84939/comment/788762e3_0f30a9c9?us… : PS2, Line 908: : usb_cfg = port->chip_info; can we add a NULL check here ? -- To view, visit https://review.coreboot.org/c/coreboot/+/84939?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I764fed561dfe2a571f3404fe505997edd7aa5ff7 Gerrit-Change-Number: 84939 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 01 Nov 2024 07:34:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brya/var/banshee: select SOC_INTEL_RAPTORLAKE
by Subrata Banik (Code Review) 01 Nov '24

01 Nov '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84949?usp=email ) Change subject: mb/google/brya/var/banshee: select SOC_INTEL_RAPTORLAKE ...................................................................... mb/google/brya/var/banshee: select SOC_INTEL_RAPTORLAKE Select SOC_INTEL_RAPTORLAKE to force coreboot to use the RPL FSP headers for FSP as banshee is using a converged firmware image. This effort also helps to save banshee boot time by 80-100ms as RPL FSP is better optimized. Additionally, Raptor Lake platform only needs 1 SIPI-SIPI which saves 10ms of the boot time. BUG=b:358254132 TEST=Able to build and boot google/banshee. cold boot time w/o this CL ``` Total Time: 1,399,888 ``` cold boot time w/ this CL ``` Total Time: 1,295,334 ``` Change-Id: If22e07a4c1b35fe1d060ca523743c6c503937287 Signed-off-by: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84949 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Eric Lai <ericllai(a)google.com> Reviewed-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: Eric Lai: Looks good to me, approved Dtrain Hsu: Looks good to me, approved Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 2981ea7..20207f4 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -169,6 +169,7 @@ select DRIVERS_GENERIC_GPIO_KEYS select INTEL_GMA_HAVE_VBT select MEMORY_SODIMM + select SOC_INTEL_RAPTORLAKE config BOARD_GOOGLE_BRASK select BOARD_GOOGLE_BASEBOARD_BRASK -- To view, visit https://review.coreboot.org/c/coreboot/+/84949?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If22e07a4c1b35fe1d060ca523743c6c503937287 Gerrit-Change-Number: 84949 Gerrit-PatchSet: 3 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com>

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[XS] Change in coreboot[main]: mb/google/brya/var/banshee: select SOC_INTEL_RAPTORLAKE
by Subrata Banik (Code Review) 01 Nov '24

01 Nov '24

Attention is currently required from: Dinesh Gehlot, Ian Feng, Jayvik Desai, Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change by Ian Feng. ( https://review.coreboot.org/c/coreboot/+/84949?usp=email ) Change subject: mb/google/brya/var/banshee: select SOC_INTEL_RAPTORLAKE ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84949?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If22e07a4c1b35fe1d060ca523743c6c503937287 Gerrit-Change-Number: 84949 Gerrit-PatchSet: 2 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 01 Nov 2024 07:23:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/alderlake: Do lazy reset after disabling UFS
by Paul Menzel (Code Review) 01 Nov '24

01 Nov '24

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Karthik Ramasubramanian, Nick Vaccaro. Paul Menzel has posted comments on this change by Karthik Ramasubramanian. ( https://review.coreboot.org/c/coreboot/+/84935?usp=email ) Change subject: soc/intel/alderlake: Do lazy reset after disabling UFS ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/84935?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4399555302ec23a76f89f406f437f311eea0ef99 Gerrit-Change-Number: 84935 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 01 Nov 2024 07:16:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/brox: Hint romstage init about upcoming reset
by Paul Menzel (Code Review) 01 Nov '24

01 Nov '24

Attention is currently required from: Karthik Ramasubramanian. Paul Menzel has posted comments on this change by Karthik Ramasubramanian. ( https://review.coreboot.org/c/coreboot/+/84937?usp=email ) Change subject: mb/google/brox: Hint romstage init about upcoming reset ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/84937?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ieed3f9013dee9aa501a3f0403f3a28722a3878f1 Gerrit-Change-Number: 84937 Gerrit-PatchSet: 4 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 01 Nov 2024 07:16:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/asus/p8z77-m: Revert SIO IRQ settings carried from OEM
by Paul Menzel (Code Review) 01 Nov '24

01 Nov '24

Attention is currently required from: Fabian Groffen, Keith Hui, Keith Hui. Paul Menzel has posted comments on this change by Fabian Groffen. ( https://review.coreboot.org/c/coreboot/+/75137?usp=email ) Change subject: mb/asus/p8z77-m: Revert SIO IRQ settings carried from OEM ...................................................................... Patch Set 10: Code-Review+1 (1 comment) Patchset: PS8: > I have edited the commit message right on gerrit (so there's no new code being pushed). […] Awesome. Thank you. -- To view, visit https://review.coreboot.org/c/coreboot/+/75137?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iae526762e79e9e2d46d06e12c338f375e5555e8c Gerrit-Change-Number: 75137 Gerrit-PatchSet: 10 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Attention: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Comment-Date: Fri, 01 Nov 2024 07:16:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Keith Hui <buurin(a)gmail.com>

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[M] Change in coreboot[main]: mb/google/nissa/var/glassway: Add initial LTE related settings
by Paul Menzel (Code Review) 01 Nov '24

01 Nov '24

Attention is currently required from: Daniel Peng, Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Paul Menzel has posted comments on this change by Daniel Peng. ( https://review.coreboot.org/c/coreboot/+/84925?usp=email ) Change subject: mb/google/nissa/var/glassway: Add initial LTE related settings ...................................................................... Patch Set 5: Code-Review+1 (1 comment) Patchset: PS5: Thank you! -- To view, visit https://review.coreboot.org/c/coreboot/+/84925?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ida56ff338d82f48aef419a65830a3380c83123d5 Gerrit-Change-Number: 84925 Gerrit-PatchSet: 5 Gerrit-Owner: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Fri, 01 Nov 2024 07:15:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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coreboot-gerrit November 2024