Attention is currently required from: Arthur Heymans, Felix Held, Varshit Pandya.
Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/blobs/+/76445?usp=email )
Change subject: mb/amd/onyx: Add 1P Genoa reference board APCB blobs
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
> since we added the apcsb for the chromebooks to the main coreboot tree, i wonder if we should also a […]
We've already added the google ABCBs to the coreboot mainboard as data.apcb files. Let's move these into the coreboot mainboard directories.
We have a note in the top level readme saying that the .apcb files are not copyrightable, so should be considered public domain.
--
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Gerrit-Project: blobs
Gerrit-Branch: main
Gerrit-Change-Id: I0689dabd90e06190c3b3779675586d8220f7076a
Gerrit-Change-Number: 76445
Gerrit-PatchSet: 4
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com>
Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com>
Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Comment-Date: Mon, 22 Jan 2024 15:51:57 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Varshit Pandya <pandyavarshit(a)gmail.com>
Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-MessageType: comment
Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80049?usp=email )
Change subject: mb/hp/snb_ivb_laptops: Remove superfluous comments about PCI devices
......................................................................
mb/hp/snb_ivb_laptops: Remove superfluous comments about PCI devices
Since all devicetrees from hp/snb_ivb_desktops are using the reference
names for PCI devices now, remove the equivalent comments documenting
their function.
Change-Id: I42b680f753fb2ed8bc0ae8b5bfb20ee8a7cf8bdb
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80049
Reviewed-by: Riku Viitanen <riku.viitanen(a)protonmail.com>
Reviewed-by: Thomas Heijligen <src(a)posteo.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/mainboard/hp/snb_ivb_laptops/devicetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
M src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
11 files changed, 129 insertions(+), 129 deletions(-)
Approvals:
build bot (Jenkins): Verified
Thomas Heijligen: Looks good to me, approved
Riku Viitanen: Looks good to me, but someone else must approve
diff --git a/src/mainboard/hp/snb_ivb_laptops/devicetree.cb b/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
index 42dc4bd..e051512 100644
--- a/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
@@ -19,7 +19,7 @@
device domain 0 on
- device ref host_bridge on end # Host bridge
+ device ref host_bridge on end
chip southbridge/intel/bd82x6x # Intel Cougar or Panther Point PCH
register "pcie_port_coalesce" = "true"
@@ -27,24 +27,24 @@
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0"
- device ref mei1 on end # Management Engine Interface 1
- device ref mei2 off end # Management Engine Interface 2
- device ref me_ide_r off end # Management Engine IDE-R
- device ref me_kt off end # Management Engine KT
- device ref gbe on end # Intel Gigabit Ethernet
- device ref ehci2 on end # USB2 EHCI #2
- device ref hda on end # HD Audio controller
- device ref ehci1 on end # USB2 EHCI #1
- device ref pci_bridge off end # PCI bridge
- device ref lpc on # LPC bridge
+ device ref mei1 on end
+ device ref mei2 off end
+ device ref me_ide_r off end
+ device ref me_kt off end
+ device ref gbe on end
+ device ref ehci2 on end
+ device ref hda on end
+ device ref ehci1 on end
+ device ref pci_bridge off end
+ device ref lpc on
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
- device ref sata1 on end # SATA Controller 1
- device ref smbus on end # SMBus
- device ref sata2 off end # SATA Controller 2
- device ref thermal off end # Thermal
+ device ref sata1 on end
+ device ref smbus on end
+ device ref sata2 off end
+ device ref thermal off end
end
end
end
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
index 433d798..8e9688f 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x1815 inherit
- device ref peg10 off end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -24,17 +24,17 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref mei1 on end # Management Engine KT
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 off end # PCIe Port #2
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
- device ref pcie_rp4 on end # PCIe Port #4, WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref xhci on end
+ device ref mei1 on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 off end
+ device ref pcie_rp3 on end # SD/MMC
+ device ref pcie_rp4 on end # WLAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
index a7b36e8..c73786a 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x162b inherit
- device ref peg10 off end # PEG
- device ref igd on end # iGPU
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -21,24 +21,24 @@
# HDD(0), ODD(1), eSATA(4), dock eSATA(5)
register "sata_port_map" = "0x33"
- device ref pcie_rp1 off end # PCIe Port #1
- device ref pcie_rp2 on # PCIe Port #2, ExpressCard
+ device ref pcie_rp1 off end
+ device ref pcie_rp2 on
smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort"
"ExpressCard Slot" "SlotDataBusWidth1X"
end
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC Host Controller
- device ref pcie_rp4 on # PCIe Port #4, WLAN
+ device ref pcie_rp3 on end # SD/MMC Host Controller
+ device ref pcie_rp4 on # WLAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthShort" "Mini PCIe" "SlotDataBusWidth1X"
end
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 on # PCIe Port #7, WWAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 on # WWAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthLong" "Mini PCIe" "SlotDataBusWidth1X"
end
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
index ced850a..b1cc9fe 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x17df inherit
- device ref peg10 off end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -23,16 +23,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
- device ref pcie_rp4 on end # PCIe Port #4, WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref xhci on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end # ExpressCard
+ device ref pcie_rp3 on end # SD/MMC
+ device ref pcie_rp4 on end # WLAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
index bd976bc..8299cce 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x162a inherit
- device ref peg10 off end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -20,15 +20,15 @@
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
register "sata_port_map" = "0x21"
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end # ExpressCard
+ device ref pcie_rp3 on end # SD/MMC
device ref pcie_rp4 on end # WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 on end # PCIe Port #7, WWAN
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 on end # WWAN
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
index 8d4d23f..b87c80a 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x161c inherit
- device ref peg10 on end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 on end # discrete graphics
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -21,16 +21,16 @@
# HDD(0), ODD(1), docking(3,5), eSATA(4)
register "sata_port_map" = "0x3b"
- device ref me_kt on end # Management Engine KT
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
- device ref pcie_rp4 on end # PCIe Port #4, WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 on end # PCIe Port #7, WWAN
- device ref pcie_rp8 on end # PCIe Port #8, NEC USB 3.0 Host Controller
- device ref lpc on # LPC bridge
+ device ref me_kt on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end # ExpressCard
+ device ref pcie_rp3 on end # SD/MMC
+ device ref pcie_rp4 on end # WLAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 on end # WWAN
+ device ref pcie_rp8 on end # NEC USB 3.0 Host Controller
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
register "ec_cmd_port" = "0x64"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
index 653c5ab..b02b2f9 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x179b inherit
- device ref peg10 on end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 on end # discrete graphics
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -24,17 +24,17 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref me_kt on end # Management Engine KT
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on end # PCIe Port #2, ExpressCard
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC
- device ref pcie_rp4 on end # PCIe Port #4, WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref xhci on end
+ device ref me_kt on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end # ExpressCard
+ device ref pcie_rp3 on end # SD/MMC
+ device ref pcie_rp4 on end # WLAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
index 548a70f..d30f179 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb
@@ -5,11 +5,11 @@
device domain 0 on
subsystemid 0x103c 0x176c inherit
- device ref peg10 on # PCIe Bridge for discrete graphics
+ device ref peg10 on # discrete graphics
device pci 00.0 on end # GPU
device pci 00.1 on end # HDMI Audio on GPU
end
- device ref igd off end # Internal graphics
+ device ref igd off end
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
register "docking_supported" = "0"
@@ -25,16 +25,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on end # PCIe Port #2
+ device ref xhci on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end
device ref pcie_rp3 on end # Media Card and FireWire host controller
device ref pcie_rp4 on end # Wireless LAN Adapter
device ref pcie_rp5 on end # SATA Controller 2 for dock
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
index 2f38cb6..1e690b5 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x18df inherit
- device ref peg10 off end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -23,16 +23,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 off end # PCIe Port #2
- device ref pcie_rp3 on end # PCIe Port #3 SDHCI
- device ref pcie_rp4 on end # PCIe Port #4 WLAN
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref xhci on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 off end
+ device ref pcie_rp3 on end # SDHCI
+ device ref pcie_rp4 on end # WLAN
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
index 16551d2..b76fe5b 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb
@@ -6,8 +6,8 @@
device domain 0 on
subsystemid 0x103c 0x1621 inherit
- device ref peg10 off end # PEG
- device ref igd on end # iGPU
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
register "gen1_dec" = "0x007c0201"
@@ -20,20 +20,20 @@
# FIXME: ports 3, 5 are untested
register "sata_port_map" = "0x3b"
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 on # PCIe Port #2, ExpressCard
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on
smbios_slot_desc "SlotTypePcmcia" "SlotLengthShort"
"ExpressCard Slot" "SlotDataBusWidth1X"
end
- device ref pcie_rp3 on end # PCIe Port #3, SD/MMC and FireWire
- device ref pcie_rp4 on # PCIe Port #4, WLAN
+ device ref pcie_rp3 on end # SD/MMC and FireWire
+ device ref pcie_rp4 on # WLAN
smbios_slot_desc "SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthShort" "Mini PCIe" "SlotDataBusWidth1X"
end
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 on end # PCIe Port #7, WWAN
- device ref pcie_rp8 off end # PCIe Port #8
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 on end # WWAN
+ device ref pcie_rp8 off end
device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x60"
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
index 6701733..2e36371 100644
--- a/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb
@@ -7,8 +7,8 @@
device domain 0 on
subsystemid 0x103c 0x18f8 inherit
- device ref peg10 off end # PCIe Bridge for discrete graphics
- device ref igd on end # Internal graphics
+ device ref peg10 off end
+ device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# mailbox at 0x200/0x201 and PM1 at 0x220
@@ -23,16 +23,16 @@
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
- device ref xhci on end # USB 3.0 Controller
- device ref pcie_rp1 on end # PCIe Port #1
- device ref pcie_rp2 off end # PCIe Port #2
- device ref pcie_rp3 on end # PCIe Port #3
- device ref pcie_rp4 on end # PCIe Port #4
- device ref pcie_rp5 off end # PCIe Port #5
- device ref pcie_rp6 off end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
- device ref lpc on # LPC bridge
+ device ref xhci on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 off end
+ device ref pcie_rp3 on end
+ device ref pcie_rp4 on end
+ device ref pcie_rp5 off end
+ device ref pcie_rp6 off end
+ device ref pcie_rp7 off end
+ device ref pcie_rp8 off end
+ device ref lpc on
chip ec/hp/kbc1126
register "ec_data_port" = "0x62"
register "ec_cmd_port" = "0x66"
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Change subject: device/device_util: Add method to retrieve the domain
......................................................................
Patch Set 1:
(1 comment)
File src/device/device_util.c:
https://review.coreboot.org/c/coreboot/+/80090/comment/dd767cdd_f93c9699 :
PS1, Line 267: while (dev->bus) {
> That's good to know. Why not check for `dev->path. […]
*shrug* idk. Both should always be the case in sconfig's output and both shouldn't
change at runtime. I guess it doesn't matter.
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Change subject: mb/hp/snb_ivb_laptops: Remove superfluous comments about PCI devices
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Patch Set 4: Code-Review+2
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Change subject: soc/intel/xeon_sp: Scan and allocate resources on all stacks
......................................................................
Patch Set 20: Code-Review+2
(1 comment)
Patchset:
PS19:
> could you help me to understand - what is the implication for this patch? what was the issue to need […]
Done
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