coreboot-gerrit January 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/intel/xeon_sp: Find VTD devices by PCI DEV ID
by Patrick Rudolph (Code Review) 22 Jan '24

22 Jan '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Tim Chu. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80092?usp=email ) Change subject: soc/intel/xeon_sp: Find VTD devices by PCI DEV ID ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/xeon_sp/memmap.c: https://review.coreboot.org/c/coreboot/+/80092/comment/7a547e5d_66211a66 : PS1, Line 71: PCI_VID_INTEL, MMAP_VTD_STACK_CFG_REG_DEVID > > The code pulls in the soc specific headers and those might have a different PCI IDs. […] Isn't the MMAP_VTD_CFG_REG_DEVID case covered by VTD_DEV(0) which the other stacks are compared against? -- To view, visit https://review.coreboot.org/c/coreboot/+/80092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1c24d26e105c3dcbd9cca0e7197ab1362344aa96 Gerrit-Change-Number: 80092 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 22 Jan 2024 07:36:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: device/device_util: Add method to retrieve the domain
by Patrick Rudolph (Code Review) 22 Jan '24

22 Jan '24

Attention is currently required from: Nico Huber. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80090?usp=email ) Change subject: device/device_util: Add method to retrieve the domain ...................................................................... Patch Set 1: (1 comment) File src/device/device_util.c: https://review.coreboot.org/c/coreboot/+/80090/comment/4cc0f16e_3056006f : PS1, Line 267: while (dev->bus) { > The root device is identified by `dev == dev->bus->dev`. So the cannonical […] That's good to know. Why not check for `dev->path.type == DEVICE_PATH_ROOT`? -- To view, visit https://review.coreboot.org/c/coreboot/+/80090?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0068b82e139fe7a35e6b1b91b7d386b750c80748 Gerrit-Change-Number: 80090 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Mon, 22 Jan 2024 07:23:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brya/var/dochi: Adjust I2C3 Waveform to meet SPEC
by Morris Hsu (Code Review) 22 Jan '24

22 Jan '24

Morris Hsu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80146?usp=email ) Change subject: mb/google/brya/var/dochi: Adjust I2C3 Waveform to meet SPEC ...................................................................... mb/google/brya/var/dochi: Adjust I2C3 Waveform to meet SPEC Tuning i2c3 frequency ,timing ,Waveform to meet SPEC BUG=b:318339970 TEST=emerge-brya coreboot and Touchpanel can work. Change-Id: Iad3bf3810fa794dd3852274d4532035a83c064e0 Signed-off-by: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/dochi/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/80146/1 diff --git a/src/mainboard/google/brya/variants/dochi/overridetree.cb b/src/mainboard/google/brya/variants/dochi/overridetree.cb index 19ace7b..4f76579 100644 --- a/src/mainboard/google/brya/variants/dochi/overridetree.cb +++ b/src/mainboard/google/brya/variants/dochi/overridetree.cb @@ -75,6 +75,12 @@ .rise_time_ns = 550, .fall_time_ns = 400, .data_hold_time_ns = 50, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 190, + .scl_hcnt = 110, + .sda_hold = 40, + } }, .i2c[5] = { .speed = I2C_SPEED_FAST, -- To view, visit https://review.coreboot.org/c/coreboot/+/80146?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iad3bf3810fa794dd3852274d4532035a83c064e0 Gerrit-Change-Number: 80146 Gerrit-PatchSet: 1 Gerrit-Owner: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: mb/google/brya/var/pujjo: Add i2c device for Parade touch screen
by Leo Chou (Code Review) 22 Jan '24

22 Jan '24

Attention is currently required from: Derek Huang, Eric Lai, Felix Held, Kapil Porwal, Nick Vaccaro, Subrata Banik. Hello Derek Huang, Eric Lai, Felix Held, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80024?usp=email to look at the new patch set (#7). Change subject: mb/google/brya/var/pujjo: Add i2c device for Parade touch screen ...................................................................... mb/google/brya/var/pujjo: Add i2c device for Parade touch screen Add new i2c address 0x24 of touch IC for Parade touch panel. BUG=b:320731709 Test=emerge-nissa coreboot Change-Id: I51bd89beffd912fc147da11d19f38cb44cbe570a Signed-off-by: leo.chou <leo.chou(a)lcfc.corp-partner.google.com> --- M src/mainboard/google/brya/variants/pujjo/overridetree.cb 1 file changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/80024/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/80024?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I51bd89beffd912fc147da11d19f38cb44cbe570a Gerrit-Change-Number: 80024 Gerrit-PatchSet: 7 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: mb/google/brya/var/pujjo: Add i2c device for Parade touch screen
by Leo Chou (Code Review) 22 Jan '24

22 Jan '24

Attention is currently required from: Derek Huang, Eric Lai, Felix Held, Kapil Porwal, Nick Vaccaro, Subrata Banik. Leo Chou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80024?usp=email ) Change subject: mb/google/brya/var/pujjo: Add i2c device for Parade touch screen ...................................................................... Patch Set 6: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/80024?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I51bd89beffd912fc147da11d19f38cb44cbe570a Gerrit-Change-Number: 80024 Gerrit-PatchSet: 6 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 22 Jan 2024 06:53:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/common: Add lunarlake device IDs
by Ashish Kumar Mishra (Code Review) 22 Jan '24

22 Jan '24

Attention is currently required from: Appukuttan V K, Bora Guvendik. Ashish Kumar Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79900?usp=email ) Change subject: soc/intel/common: Add lunarlake device IDs ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/79900?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id31d567287b9921d60909b1eb617c7cfaf6672c9 Gerrit-Change-Number: 79900 Gerrit-PatchSet: 2 Gerrit-Owner: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Comment-Date: Mon, 22 Jan 2024 06:09:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: cpu/x86: Add 1GiB pages for memory access up to 512GiB
by Ashish Kumar Mishra (Code Review) 22 Jan '24

22 Jan '24

Attention is currently required from: Ashish Kumar Mishra, Jérémy Compostella, Subrata Banik, Wonkyu Kim. Hello Jérémy Compostella, Subrata Banik, Wonkyu Kim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80088?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: cpu/x86: Add 1GiB pages for memory access up to 512GiB ...................................................................... cpu/x86: Add 1GiB pages for memory access up to 512GiB Current pagetable implementation allows memory access up to 4GiB using 2MiB pages. If user wants to access more than 4GiB with a 2MiB page it will require more pagetable entries. By using a 1GiB page table, users can access more than 4GiB of memory while reducing the number of pagetable entries. This patch enables memory access up to 512GiB through 1GiB pages by selecting USE_1G_PAGETABLES in Kconfig. TEST: Verified in 64bit mode boot and access above 4GiB Change-Id: Id569ae5b50abf5b72e4db33b5e4cd802399e76ec Signed-off-by: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> --- M src/cpu/x86/64bit/Makefile.inc A src/cpu/x86/64bit/pt1G.S M src/cpu/x86/Kconfig 3 files changed, 43 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/80088/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/80088?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id569ae5b50abf5b72e4db33b5e4cd802399e76ec Gerrit-Change-Number: 80088 Gerrit-PatchSet: 3 Gerrit-Owner: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel: Add Lunar Lake device IDs
by Ashish Kumar Mishra (Code Review) 22 Jan '24

22 Jan '24

Attention is currently required from: Appukuttan V K, Bora Guvendik. Ashish Kumar Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79899?usp=email ) Change subject: soc/intel: Add Lunar Lake device IDs ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/79899?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic0aae6fd7aa8ba3a6a794f8af5ecf3967509b704 Gerrit-Change-Number: 79899 Gerrit-PatchSet: 2 Gerrit-Owner: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Comment-Date: Mon, 22 Jan 2024 03:35:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[main]: device/device.h: Drop multiple links
by Jincheng Li (Code Review) 22 Jan '24

22 Jan '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Fred Reitberger, Jason Glenesk, Jérémy Compostella, Martin L Roth, Matt DeVillier. Jincheng Li has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78328?usp=email ) Change subject: device/device.h: Drop multiple links ...................................................................... Patch Set 10: (1 comment) Patchset: PS10: Per tests on SPR, APIC devices will link under a null attribute bus path_type after adding drop multiple links. is_cpu() will check the bus path_type to be one CPU_CLUSTER and that will lead to the failure return: bool is_cpu(const struct device *cpu) { return cpu->path.type == DEVICE_PATH_APIC && cpu->bus->dev->path.type == DEVICE_PATH_CPU_CLUSTER; } Append device tree print: [0m[SPEW ] Show all devs... After init.[0m [0m[SPEW ] Root Device: enabled 1[0m [0m[SPEW ] CPU_CLUSTER: 0: enabled 1[0m [0m[SPEW ] DOMAIN: 0000: enabled 1[0m [0m[SPEW ] PCI: 00:00.0: enabled 1[0m [0m[SPEW ] PCI: 00:18.0: enabled 0[0m ... [0m[SPEW ] DOMAIN: 0001: enabled 1[0m ... [0m[SPEW ] PCI: 00:00.3: enabled 1[0m [0m[SPEW ] PCI: 00:14.4: enabled 1[0m [0m[SPEW ] PCI: 01:00.0: enabled 1[0m [0m[SPEW ] PCI: 02:00.0: enabled 1[0m [0m[SPEW ] PCI: 03:00.0: enabled 1[0m [0m[SPEW ] PNP: 002e.4: enabled 1[0m [0m[SPEW ] PNP: 002e.5: enabled 1[0m [0m[SPEW ] PNP: 002e.7: enabled 1[0m [0m[SPEW ] PNP: 002e.d: enabled 1[0m [0m[SPEW ] PNP: 002e.e: enabled 1[0m [0m[SPEW ] PCI: 15:00.0: enabled 1[0m [0m[SPEW ] PCI: 15:00.1: enabled 1[0m ... [0m[SPEW ] GENERIC: 0.0: enabled 1[0m [0m[SPEW ] GENERIC: 0.0: enabled 1[0m [0m[SPEW ] GENERIC: 0.0: enabled 1[0m [0m[SPEW ] GENERIC: 0.0: enabled 1[0m [0m[SPEW ] APIC: 00: enabled 1[0m [0m[SPEW ] APIC: 05: enabled 1[0m [0m[SPEW ] APIC: 07: enabled 1[0m ... [0m[DEBUG] BS: BS_DEV_INIT run times (exec / console): 4100 / 3120 ms[0m Suggest to delete "cpu->bus->dev->path.type == DEVICE_PATH_CPU_CLUSTER;" check in is_cpu() -- To view, visit https://review.coreboot.org/c/coreboot/+/78328?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iab6fe269faef46ae77ed1ea425440cf5c7dbd49b Gerrit-Change-Number: 78328 Gerrit-PatchSet: 10 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Mon, 22 Jan 2024 03:24:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/intel/cmn/block/pmc: Fix prev_sleep_state string name mapping
by Subrata Banik (Code Review) 22 Jan '24

22 Jan '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80144?usp=email ) Change subject: soc/intel/cmn/block/pmc: Fix prev_sleep_state string name mapping ...................................................................... soc/intel/cmn/block/pmc: Fix prev_sleep_state string name mapping commit d078ef2152052b5ce8686249dcd05ebd50010889 ("soc/intel/cmn/block/pmc: Add previous sleep state strings in log") used SLP_TYP numbers to map ACPI sleep state value. This incorrectly printed wrong string for prev_sleep_state during S5. ex: after a cold reset the previous sleep state printed was [DEBUG] prev_sleep_state 5 (S3) This patch corrects this by using ACPI sleep state numbers for mapping the prev_sleep_state values. TEST=test the logs on google/rex board after cold reset [DEBUG] prev_sleep_state 5 (S5) Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com> Change-Id: I9bcdacc4d01a8d827a6abdf9af2b9e5d686ed847 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80144 Reviewed-by: Jamie Ryu <jamie.m.ryu(a)intel.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/common/block/pmc/pmclib.c 1 file changed, 5 insertions(+), 5 deletions(-) Approvals: Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified Jamie Ryu: Looks good to me, but someone else must approve diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c index f11926c..c58b3a4 100644 --- a/src/soc/intel/common/block/pmc/pmclib.c +++ b/src/soc/intel/common/block/pmc/pmclib.c @@ -463,11 +463,11 @@ { /* Define the sleep state string */ static const char * const acpi_sleep_states[] = { - [SLP_TYP_S0] = "S0", - [SLP_TYP_S1] = "S1", - [SLP_TYP_S3] = "S3", - [SLP_TYP_S4] = "S4", - [SLP_TYP_S5] = "S5", + [ACPI_S0] = "S0", + [ACPI_S1] = "S1", + [ACPI_S3] = "S3", + [ACPI_S4] = "S4", + [ACPI_S5] = "S5", }; pmc_fill_pm_reg_info(ps); -- To view, visit https://review.coreboot.org/c/coreboot/+/80144?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9bcdacc4d01a8d827a6abdf9af2b9e5d686ed847 Gerrit-Change-Number: 80144 Gerrit-PatchSet: 3 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Marx Wang <marx.wang(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit January 2024