coreboot-gerrit January 2024

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[NoOp] Change in blobs[main]: mb/amd/onyx: Add 1P Genoa reference board APCB blobs
by Varshit Pandya (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Arthur Heymans, Felix Held, Martin L Roth. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/blobs/+/76445?usp=email ) Change subject: mb/amd/onyx: Add 1P Genoa reference board APCB blobs ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > We've already added the google ABCBs to the coreboot mainboard as data.apcb files. […] done, https://review.coreboot.org/c/coreboot/+/80204 I think this patch can be abandoned now -- To view, visit https://review.coreboot.org/c/blobs/+/76445?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I0689dabd90e06190c3b3779675586d8220f7076a Gerrit-Change-Number: 76445 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Jan 2024 11:23:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Varshit Pandya <pandyavarshit(a)gmail.com> Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: vc/amd/opensil/genoa_poc/opensil_console: fix host debug print function
by Felix Held (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Varshit Pandya. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80203?usp=email ) Change subject: vc/amd/opensil/genoa_poc/opensil_console: fix host debug print function ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/80203/comment/06bf73b9_d80deb8f : PS1, Line 1: Parent: 204703db (vc/amd/opensil/genoa_poc/mpio: rename mpio_config to configure_mpio) > do you think it will be a good idea, to include an example of what in console text/print is changing […] i'll update the commit message -- To view, visit https://review.coreboot.org/c/coreboot/+/80203?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia931cc80dea5b7eabb75cfb19f8baa9a09cd2dbf Gerrit-Change-Number: 80203 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Comment-Date: Thu, 25 Jan 2024 11:08:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/amd/onyx_poc: Add and use APCB configuration data
by Felix Held (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Matt DeVillier, Varshit Pandya. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80204?usp=email ) Change subject: mb/amd/onyx_poc: Add and use APCB configuration data ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80204?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1c34528fa0fd15b847c22c995713078c60ac3873 Gerrit-Change-Number: 80204 Gerrit-PatchSet: 2 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Thu, 25 Jan 2024 11:07:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/rex: Organize models configs alphabetically
by Subrata Banik (Code Review) 25 Jan '24

25 Jan '24

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80206?usp=email ) Change subject: mb/google/rex: Organize models configs alphabetically ...................................................................... mb/google/rex: Organize models configs alphabetically This patch ensures the baseboard and variant configs (inside Kconfig and Kconfig.name) are organized in alphabetic order. TEST=execute make menuconfig and verify the google/rex variants order are alphabetically correct. Change-Id: I0acc2cec21b4607856127b04c400ec416f0c0dd2 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/rex/Kconfig M src/mainboard/google/rex/Kconfig.name 2 files changed, 60 insertions(+), 60 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/80206/1 diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index a253c8c..046f1d9 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -30,6 +30,22 @@ select SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY_V2 select SOC_INTEL_CSE_SEND_EOP_ASYNC +config BOARD_GOOGLE_BASEBOARD_OVIS + def_bool n + select BOARD_GOOGLE_REX_COMMON + select DRIVERS_INTEL_PMC + select ENABLE_TCSS_DISPLAY_DETECTION if RUN_FSP_GOP + select HAVE_SLP_S0_GATE + select MAINBOARD_HAS_CHROMEOS + select MEMORY_SOLDERDOWN + select RT8168_GEN_ACPI_POWER_RESOURCE + select RT8168_GET_MAC_FROM_VPD + select RT8168_SET_LED_MODE + select SOC_INTEL_IOE_DIE_SUPPORT + select SOC_INTEL_METEORLAKE_U_H + select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES + select TPM_GOOGLE_TI50 + config BOARD_GOOGLE_BASEBOARD_REX def_bool n select BOARD_GOOGLE_REX_COMMON @@ -47,6 +63,19 @@ select SYSTEM_TYPE_LAPTOP select TPM_GOOGLE_TI50 +config BOARD_GOOGLE_MODEL_DEKU + def_bool n + select BOARD_GOOGLE_BASEBOARD_OVIS + +config BOARD_GOOGLE_MODEL_KARIS + def_bool n + select BOARD_GOOGLE_BASEBOARD_REX + select CHROMEOS_WIFI_SAR if CHROMEOS + +config BOARD_GOOGLE_MODEL_OVIS + def_bool n + select BOARD_GOOGLE_BASEBOARD_OVIS + config BOARD_GOOGLE_MODEL_REX def_bool n select BOARD_GOOGLE_BASEBOARD_REX @@ -70,44 +99,11 @@ select DRIVERS_GENERIC_ALC1015 select DRIVERS_GENESYSLOGIC_GL9750 -config BOARD_GOOGLE_MODEL_KARIS - def_bool n - select BOARD_GOOGLE_BASEBOARD_REX - select CHROMEOS_WIFI_SAR if CHROMEOS +config BOARD_GOOGLE_DEKU + select BOARD_GOOGLE_MODEL_DEKU -config BOARD_GOOGLE_BASEBOARD_OVIS - def_bool n - select BOARD_GOOGLE_REX_COMMON - select DRIVERS_INTEL_PMC - select ENABLE_TCSS_DISPLAY_DETECTION if RUN_FSP_GOP - select HAVE_SLP_S0_GATE - select MAINBOARD_HAS_CHROMEOS - select MEMORY_SOLDERDOWN - select RT8168_GEN_ACPI_POWER_RESOURCE - select RT8168_GET_MAC_FROM_VPD - select RT8168_SET_LED_MODE - select SOC_INTEL_IOE_DIE_SUPPORT - select SOC_INTEL_METEORLAKE_U_H - select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES - select TPM_GOOGLE_TI50 - -config BOARD_GOOGLE_MODEL_OVIS - def_bool n - select BOARD_GOOGLE_BASEBOARD_OVIS - -config BOARD_GOOGLE_MODEL_DEKU - def_bool n - select BOARD_GOOGLE_BASEBOARD_OVIS - -config BOARD_GOOGLE_REX0 - select BOARD_GOOGLE_MODEL_REX - -config BOARD_GOOGLE_SCREEBO - select BOARD_GOOGLE_MODEL_SCREEBO - -config BOARD_GOOGLE_SCREEBO4ES - select BOARD_GOOGLE_MODEL_SCREEBO - select SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON +config BOARD_GOOGLE_DEKU4ES + select BOARD_GOOGLE_MODEL_DEKU config BOARD_GOOGLE_KARIS select BOARD_GOOGLE_MODEL_KARIS @@ -116,22 +112,19 @@ select BOARD_GOOGLE_MODEL_KARIS select SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON -config BOARD_GOOGLE_REX_EC_ISH - select BOARD_GOOGLE_MODEL_REX_EC_ISH - config BOARD_GOOGLE_OVIS select BOARD_GOOGLE_MODEL_OVIS -config BOARD_GOOGLE_DEKU - select BOARD_GOOGLE_MODEL_DEKU - -config BOARD_GOOGLE_DEKU4ES - select BOARD_GOOGLE_MODEL_DEKU - config BOARD_GOOGLE_OVIS4ES select BOARD_GOOGLE_MODEL_OVIS select SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON +config BOARD_GOOGLE_REX0 + select BOARD_GOOGLE_MODEL_REX + +config BOARD_GOOGLE_REX_EC_ISH + select BOARD_GOOGLE_MODEL_REX_EC_ISH + config BOARD_GOOGLE_REX4ES select BOARD_GOOGLE_MODEL_REX select SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON @@ -140,6 +133,13 @@ select BOARD_GOOGLE_MODEL_REX_EC_ISH select SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON +config BOARD_GOOGLE_SCREEBO + select BOARD_GOOGLE_MODEL_SCREEBO + +config BOARD_GOOGLE_SCREEBO4ES + select BOARD_GOOGLE_MODEL_SCREEBO + select SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON + if BOARD_GOOGLE_REX_COMMON config BASEBOARD_DIR diff --git a/src/mainboard/google/rex/Kconfig.name b/src/mainboard/google/rex/Kconfig.name index 7717458..7a17f87 100644 --- a/src/mainboard/google/rex/Kconfig.name +++ b/src/mainboard/google/rex/Kconfig.name @@ -1,13 +1,10 @@ comment "Rex" -config BOARD_GOOGLE_REX0 - bool "-> Rex 0" +config BOARD_GOOGLE_DEKU + bool "-> Deku" -config BOARD_GOOGLE_SCREEBO - bool "-> Screebo" - -config BOARD_GOOGLE_SCREEBO4ES - bool "-> Screebo4ES" +config BOARD_GOOGLE_DEKU4ES + bool "-> Deku4ES" config BOARD_GOOGLE_KARIS bool "-> Karis" @@ -15,23 +12,26 @@ config BOARD_GOOGLE_KARIS4ES bool "-> Karis4ES" -config BOARD_GOOGLE_REX_EC_ISH - bool "-> Rex EC ISH" - config BOARD_GOOGLE_OVIS bool "-> Ovis" config BOARD_GOOGLE_OVIS4ES bool "-> Ovis4ES" -config BOARD_GOOGLE_DEKU - bool "-> Deku" +config BOARD_GOOGLE_REX0 + bool "-> Rex 0" -config BOARD_GOOGLE_DEKU4ES - bool "-> Deku4ES" +config BOARD_GOOGLE_REX_EC_ISH + bool "-> Rex EC ISH" config BOARD_GOOGLE_REX4ES bool "-> Rex4ES" config BOARD_GOOGLE_REX4ES_EC_ISH bool "-> Rex4ES EC ISH" + +config BOARD_GOOGLE_SCREEBO + bool "-> Screebo" + +config BOARD_GOOGLE_SCREEBO4ES + bool "-> Screebo4ES" -- To view, visit https://review.coreboot.org/c/coreboot/+/80206?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0acc2cec21b4607856127b04c400ec416f0c0dd2 Gerrit-Change-Number: 80206 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: mb/google/dedede/var/metaknight:Add fw_config probe for multi codec a...
by Felix Held (Code Review) 25 Jan '24

25 Jan '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79831?usp=email ) Change subject: mb/google/dedede/var/metaknight:Add fw_config probe for multi codec and amplifier ...................................................................... mb/google/dedede/var/metaknight:Add fw_config probe for multi codec and amplifier Compatible headphone codec "ALC5682I-VS" and speaker amplifier "ALC1015Q-VB" BUG=b:183305590 TEST=ALC5682I-VD and ALC1015Q-VB can work normally Change-Id: I4f212f063a1180d7a1c14769f61b0afef7565cad Signed-off-by: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79831 Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/dedede/variants/metaknight/overridetree.cb 1 file changed, 23 insertions(+), 1 deletion(-) Approvals: Eric Lai: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/dedede/variants/metaknight/overridetree.cb b/src/mainboard/google/dedede/variants/metaknight/overridetree.cb index e01dee9..3337f6a 100644 --- a/src/mainboard/google/dedede/variants/metaknight/overridetree.cb +++ b/src/mainboard/google/dedede/variants/metaknight/overridetree.cb @@ -1,3 +1,10 @@ +fw_config + field AUDIO_CODEC_SOURCE 49 51 + option AUDIO_CODEC_RT5682 0 + option AUDIO_CODEC_ALC5682I_VS 1 + end +end + chip soc/intel/jasperlake # USB Port Configuration @@ -247,7 +254,22 @@ register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].name" = ""realtek,jd-src"" register "property_list[0].integer" = "1" - device i2c 1a on end + device i2c 1a on + probe AUDIO_CODEC_SOURCE AUDIO_CODEC_RT5682 + end + end + chip drivers/i2c/generic + register "hid" = ""RTL5682"" + register "name" = ""RT58"" + register "desc" = ""Realtek RT5682"" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D16)" + register "property_count" = "1" + register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" + register "property_list[0].name" = ""realtek,jd-src"" + register "property_list[0].integer" = "1" + device i2c 1a on + probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682I_VS + end end chip drivers/i2c/generic register "hid" = ""10EC1015"" -- To view, visit https://review.coreboot.org/c/coreboot/+/79831?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4f212f063a1180d7a1c14769f61b0afef7565cad Gerrit-Change-Number: 79831 Gerrit-PatchSet: 6 Gerrit-Owner: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Evan Green <evgreen(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[main]: mb/google/fizz: Update OEM name list
by Felix Held (Code Review) 25 Jan '24

25 Jan '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80181?usp=email ) Change subject: mb/google/fizz: Update OEM name list ...................................................................... mb/google/fizz: Update OEM name list Endeavour and Karma were missing, leading those devices to have empty SMBIOS mainboard names. Fix by adding the missing entries. TEST=build/boot google/fizz (endeavour), verify SMBIOS name correctly shown via dmidecode. Change-Id: I1d4fb2473d27ff5611f9d2b962aae2d6bf6d1da0 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80181 Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/fizz/mainboard.c 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c index f37b70f..0d631cc 100644 --- a/src/mainboard/google/fizz/mainboard.c +++ b/src/mainboard/google/fizz/mainboard.c @@ -187,9 +187,9 @@ "Wukong", "Wukong", "Teemo", - "", + "Karma", "Jax", - "", + "Endeavour", "Excelsior" }; -- To view, visit https://review.coreboot.org/c/coreboot/+/80181?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1d4fb2473d27ff5611f9d2b962aae2d6bf6d1da0 Gerrit-Change-Number: 80181 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: soc/intel/xeon_sp: Initial support for PCI multi segment groups
by Arthur Heymans (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Annie Chen, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Naresh Solanki, Nill Ge, Patrick Rudolph, Shuo Liu, TangYiwei, Tim Chu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79878?usp=email ) Change subject: soc/intel/xeon_sp: Initial support for PCI multi segment groups ...................................................................... Patch Set 4: (1 comment) File src/soc/intel/xeon_sp/spr/ioat.c: https://review.coreboot.org/c/coreboot/+/79878/comment/3a57635c_02d352db : PS4, Line 57: domain_to_pcie_segment_group(domain); Information like busses are passed via arguments. I think doing that for segment makes sense too. Then then there is probably no need for a separate function to parse segment as it can be done as part of the loop over sockets. -- To view, visit https://review.coreboot.org/c/coreboot/+/79878?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0ba5e426123234979d746d3bdfc1ddfbd71c3447 Gerrit-Change-Number: 79878 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 25 Jan 2024 10:04:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/intel/xeon_sp: Initial support for PCI multi segment groups
by Patrick Rudolph (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Annie Chen, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Naresh Solanki, Nill Ge, Shuo Liu, TangYiwei, Tim Chu. Hello Annie Chen, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Naresh Solanki, Nill Ge, Shuo Liu, TangYiwei, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79878?usp=email to look at the new patch set (#4). Change subject: soc/intel/xeon_sp: Initial support for PCI multi segment groups ...................................................................... soc/intel/xeon_sp: Initial support for PCI multi segment groups Add PCI enumeration support by reading the PCIeSegment reported in the FSP HOB and add it when creating the PCI domain for each stack. The PCI enumeration will be able to scan the additional PCI segment groups and properly handle those devices. Code that still hardcodes B:D:F numbers will not work when PCI multi segment support is enabled and need to be updated in future commits. In addition ACPI code generation needs to take PCI segment groups into account. Change-Id: I0ba5e426123234979d746d3bdfc1ddfbd71c3447 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/xeon_sp/chip_common.c M src/soc/intel/xeon_sp/include/soc/chip_common.h M src/soc/intel/xeon_sp/spr/ioat.c 3 files changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/79878/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/79878?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0ba5e426123234979d746d3bdfc1ddfbd71c3447 Gerrit-Change-Number: 79878 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: soc/intel/xeon_sp: Initial support for PCI multi segment groups
by Patrick Rudolph (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Annie Chen, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Naresh Solanki, Nill Ge, Shuo Liu, TangYiwei, Tim Chu. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79878?usp=email ) Change subject: soc/intel/xeon_sp: Initial support for PCI multi segment groups ...................................................................... Patch Set 3: (3 comments) Patchset: PS2: > I'll rebase on main. It would be nice to get https://review.coreboot. […] Dropped this code. PS2: > TODO: cxl_fill_srat Done File src/soc/intel/xeon_sp/spr/soc_acpi.c: https://review.coreboot.org/c/coreboot/+/79878/comment/ef652eab_0cbc2833 : PS2, Line 256: stack_enabled = false; > Adding a bit more background. […] Dropped this code. -- To view, visit https://review.coreboot.org/c/coreboot/+/79878?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0ba5e426123234979d746d3bdfc1ddfbd71c3447 Gerrit-Change-Number: 79878 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 25 Jan 2024 09:41:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Johnny Lin <Johnny_Lin(a)wiwynn.com> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/intel/xeon_sp: Initial support for PCI multi segment groups
by Patrick Rudolph (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Annie Chen, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Naresh Solanki, Nill Ge, Patrick Rudolph, TangYiwei, Tim Chu. Hello Annie Chen, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Naresh Solanki, Nill Ge, Shuo Liu, TangYiwei, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79878?usp=email to look at the new patch set (#3). Change subject: soc/intel/xeon_sp: Initial support for PCI multi segment groups ...................................................................... soc/intel/xeon_sp: Initial support for PCI multi segment groups Add PCI enumeration support by reading the PCIeSegment reported in the FSP HOB and add it when creating the PCI domain for each stack. The PCI enumeration will be able to scan the additional PCI segment groups and properly handle those devices. Code that still hardcodes B:D:F numbers will not work when PCI multi segment support is enabled and need to be updated in future commits. In addition ACPI code generation needs to take PCI segment groups into account. Change-Id: I0ba5e426123234979d746d3bdfc1ddfbd71c3447 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/xeon_sp/chip_common.c M src/soc/intel/xeon_sp/include/soc/chip_common.h M src/soc/intel/xeon_sp/spr/ioat.c 3 files changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/79878/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/79878?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0ba5e426123234979d746d3bdfc1ddfbd71c3447 Gerrit-Change-Number: 79878 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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