Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79902?usp=email )
Change subject: util/ifdtool: Enable Read Access for SPI Padding Region
......................................................................
util/ifdtool: Enable Read Access for SPI Padding Region
As per Intel Meteor Lake SPI programming doc, the BIOS region should
have a read access enabled for SPI padding region (aka region 9).
This patch ensures that BIOS region is able to read the SPI padding
region.
BUG=b:274356894
BRANCH=firmware-rex-15709.B
TEST=Able to flash screebo AP FW image using flashrom on DUT.
Without this patch:
> flashrom -p internal -r /tmp/bios.rom
flashrom 1.4.0-devel on Linux 6.1.67-09255-ge8ae3115f8b0 (x86_64)
...
...
Found Winbond flash chip "W25Q256JW_DTR" (32768 kB, Programmer-specific)
on internal.
Reading flash... Transaction error between offset 0x0072f000 and
0x0072f03f (= 0x0072f000 + 63)!
read_flash: failed to read (0x72f000..0x7fffff).
Read operation failed!
FAILED.
FAILED
With this patch:
> flashrom -p internal -r /tmp/bios.rom
flashrom 1.4.0-devel on Linux 6.1.68-09294-g001fdda5287d (x86_64)
...
...
Found Winbond flash chip "W25Q256JW_DTR" (32768 kB, Programmer-specific)
on internal.
Reading flash... done.
SUCCESS
Change-Id: I18c44aa9a0f890f01a889247da118b69a58936e8
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M util/ifdtool/ifdtool.c
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/79902/1
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
index 99a83e5..ca8f21e 100644
--- a/util/ifdtool/ifdtool.c
+++ b/util/ifdtool/ifdtool.c
@@ -1451,6 +1451,10 @@
fmba->flmstr5 |= (1 << REGION_EC) << rd_shift;
fmba->flmstr5 |= (1 << REGION_EC) << wr_shift;
}
+ if (check_region(frba, REGION_DEV_EXP2)) {
+ /* BIOS can read SPI padding region. */
+ fmba->flmstr1 |= (1 << REGION_DEV_EXP2) << rd_shift;
+ }
break;
case PLATFORM_DNV:
case PLATFORM_WBG:
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Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79877?usp=email )
Change subject: device: Add support for multiple PCI segment groups
......................................................................
Patch Set 2:
(5 comments)
Patchset:
PS2:
had a look at my local branch and it was in a worse shape than i remembered, so i'll try to integrate some of the things i did into this patch and push it with a new change-id so that you can have a look
File src/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/79877/comment/e0d9cf5b_d9d13405 :
PS1, Line 153: for (int i = 0; i < CONFIG_ECAM_SEGMENT_COUNT; i++) {
> another option that i'm planning to look into is to loop over the domains here and get the secondary […]
looks like i misread that part of the spec. this likely won't work; see one of my other comments
https://review.coreboot.org/c/coreboot/+/79877/comment/8cfca0bb_d1b95a21 :
PS1, Line 157: i * CONFIG_ECAM_MMCONF_BUS_NUMBER
> I assume that would alter how things are numbered in Linux (i.e. more PCI domains) […]
in a multi segment group system, each pci root needs to have _SEG which tells the host to which segment it belongs to, but the spec explicitly says that the mcfg table mustn't contain multiple entries corresponding to a single pci segment group. either misread or misremember that, so iterating over all domains and use the secondary, max_subordinate and segment from it won't be within the spec
File src/include/device/device.h:
https://review.coreboot.org/c/coreboot/+/79877/comment/99fcb4ab_6800a409 :
PS2, Line 428: DEVTREE_CONST struct device *pcidev_path_on_bus(unsigned int bus, pci_devfn_t devfn);
since this function isn't used that widely in the tree, i wonder if we should just add the segment_group parameter to it and and add a 0 as parameter on the call sites
File src/include/device/device.h:
https://review.coreboot.org/c/coreboot/+/79877/comment/9c322bc1_6e9207f5 :
PS1, Line 89: uint8_t segment; /* PCI segment */
> i think i used a macro to get the bus and segment number from the secondary/max_subordinate. […]
hmm, having looked at both approaches a bit more in detail, your approach might be the better one that also has a bit less possibilities of things becoming inconsistent. i know, i'm going a bit back and forward on this one, but it's probably good that we both looked at this. oh and i hope that i didn't sound too grumpy yesterday; was already quite late when i saw this patch and replied
i'd rename this to segment_group, so that it's in line with the spec; a segment might also refer to a pci bus
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Change subject: [RFC] region: Allow region_end() to return 64-bit numbers
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79906/comment/83478fd0_69726fc7 :
PS1, Line 9: We most likely operate on regions that end exactly at the 4GiB boundary
> Well, the idea of the region_create() functions is to avoid overflows. […]
We could also avoid much of the hassle if we'd use 64-bit
integers everywhere and limit offset & size to 63 bits or less.
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Change subject: [RFC] region: Allow region_end() to return 64-bit numbers
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79906/comment/ef4ebfa4_8e8a4dd5 :
PS1, Line 9: We most likely operate on regions that end exactly at the 4GiB boundary
> would it make sense to document that 64bit + overflow is still possible?
Well, the idea of the region_create() functions is to avoid overflows.
I realized only later that region_end() still can overflow. This is most
annoying, and only because region_end() doesn't return an inclusive value.
I'd prefer to discuss the implementations further.
Maybe, if nobody objects, we could make region_end() return an inclusive
offset. It's return value doesn't seem to be used much. My only concern
right now is that it could confuse developers that are used to the current
behaviour.
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Change subject: [RFC] region: Allow region_end() to return 64-bit numbers
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79906/comment/59a85e8b_4ae7af47 :
PS1, Line 9: We most likely operate on regions that end exactly at the 4GiB boundary
would it make sense to document that 64bit + overflow is still possible?
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Change subject: soc/intel/xeon_sp: Redesign resource allocation
......................................................................
Patch Set 19:
(1 comment)
File src/soc/intel/xeon_sp/spr/ioat.c:
https://review.coreboot.org/c/coreboot/+/78327/comment/1715bd50_75a4ea9a :
PS19, Line 75: HQM_BUS_OFFSET + HQM_RESERVED_BUS
I believe this is one too little now? HQM_BUS_OFFSET gives the number of buses
below HQM, then we need one for HQM and another reserved one.
(on the LHS we have the number of buses available, so on the RHS we want at least
1 for DINO, 2 for CPM and 2 for HQM, so 5. we could also hard-code the 5 to avoid
macro confusion)
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Change subject: [RFC] region: Hide struct region members
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
gotta love access modifiers in newer languages :-)
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Change subject: tree: Use accessor functions for struct region fields
......................................................................
Patch Set 1: Code-Review+2
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Change subject: [RFC] region: Introduce region_create() functions
......................................................................
Patch Set 1:
(1 comment)
File src/commonlib/include/commonlib/region.h:
https://review.coreboot.org/c/coreboot/+/79905/comment/1ace3bcf_13f15646 :
PS1, Line 99: assert(offset + size - 1 >= offset);
This would not allow empty regions. I don't know if we need to support such?
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Change subject: Documentation: Start administrator handbook
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Patch Set 1: Code-Review+2
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