coreboot-gerrit January 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: mb/google/nissa/var/craaskov: Modify 6W and 15W DPTF parameters
by Rex Chou (Code Review) 16 Jan '24

16 Jan '24

Attention is currently required from: Eric Lai, Ian Feng, Kenny Pan, Nick Vaccaro, Paul Menzel, Shou-Chieh Hsu, Sumeet R Pawnikar. Rex Chou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79890?usp=email ) Change subject: mb/google/nissa/var/craaskov: Modify 6W and 15W DPTF parameters ...................................................................... Patch Set 7: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79890/comment/4546d513_5a372df6 : PS6, Line 8: > Please describe the problem. Done https://review.coreboot.org/c/coreboot/+/79890/comment/087a36b1_5c9108f3 : PS6, Line 9: b:290705146#comment41 > I am not allowed to read this comment. Follow "Project_Craaskov_FW_Thermal_paramters_list_20240104_1.xlsx" to modify 6w/15w DPTF parameters https://review.coreboot.org/c/coreboot/+/79890/comment/e6b72d05_54832735 : PS6, Line 10: power(Watts) > Please add a space before the (. Done https://review.coreboot.org/c/coreboot/+/79890/comment/5572c9c8_b6783de7 : PS6, Line 10: change > increase Done -- To view, visit https://review.coreboot.org/c/coreboot/+/79890?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I15fa4b8f7c7088ff56da6493659ae45572913b5a Gerrit-Change-Number: 79890 Gerrit-PatchSet: 7 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kenny Pan <kennypan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Kenny Pan <kennypan(a)google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Wed, 17 Jan 2024 01:34:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/nissa/var/craaskov: Modify 6W and 15W DPTF parameters
by Rex Chou (Code Review) 16 Jan '24

16 Jan '24

Attention is currently required from: Eric Lai, Ian Feng, Kenny Pan, Nick Vaccaro, Rex Chou, Shou-Chieh Hsu, Sumeet R Pawnikar. Hello Dtrain Hsu, Eric Lai, Ian Feng, Kenny Pan, Nick Vaccaro, Shou-Chieh Hsu, Subrata Banik, Sumeet R Pawnikar, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79890?usp=email to look at the new patch set (#7). Change subject: mb/google/nissa/var/craaskov: Modify 6W and 15W DPTF parameters ...................................................................... mb/google/nissa/var/craaskov: Modify 6W and 15W DPTF parameters 1. Modify 6w/15w DPTF parameters based on b:290705146#comment41. 2. 6W MSR power limit_1 power (Watts) increase to 20. 3. 15W MSR power limit_1 power (Watts) increase to 20. BUG=b:290705146 TEST=emerge-nissa coreboot chromeos-bootimage Thermal team test pass. Change-Id: I15fa4b8f7c7088ff56da6493659ae45572913b5a Signed-off-by: Rex Chou <rex_chou(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/variants/craaskov/overridetree.cb 1 file changed, 50 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/79890/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/79890?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I15fa4b8f7c7088ff56da6493659ae45572913b5a Gerrit-Change-Number: 79890 Gerrit-PatchSet: 7 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Kenny Pan <kennypan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Kenny Pan <kennypan(a)google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: mb/google/dedede/var/galtic: Correct name for mem-part K4U6E3S4AA-MGCR
by Daniel Peng (Code Review) 16 Jan '24

16 Jan '24

Attention is currently required from: Karthik Ramasubramanian, Paul Menzel. Daniel Peng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79976?usp=email ) Change subject: mb/google/dedede/var/galtic: Correct name for mem-part K4U6E3S4AA-MGCR ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: Hi Googler, Please kindly help to submit this CL if no concern. Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/79976?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7c158eb7b4455cde839a335913e6a18895c12b41 Gerrit-Change-Number: 79976 Gerrit-PatchSet: 5 Gerrit-Owner: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-CC: Hank Lin <hank2_lin(a)pegatron.corp-partner.google.com> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 17 Jan 2024 01:26:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/dedede/var/pirika: Add initial fw_config configuration setting
by Daniel Peng (Code Review) 16 Jan '24

16 Jan '24

Attention is currently required from: Anson Tseng, Derek Huang, Karthik Ramasubramanian, Paul Menzel. Daniel Peng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79930?usp=email ) Change subject: mb/google/dedede/var/pirika: Add initial fw_config configuration setting ...................................................................... Patch Set 8: (1 comment) Patchset: PS8: Hi Googler, If no concern, please kindly help to review and submit the CL. Thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/79930?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic4f38928d24c4398d90df226cfe0788a30075bf2 Gerrit-Change-Number: 79930 Gerrit-PatchSet: 8 Gerrit-Owner: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Anson Tseng <ansontseng(a)google.com> Gerrit-Reviewer: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Anson Tseng <ansontseng(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 17 Jan 2024 01:22:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/brox: Enable WLAN on root port 5
by Shelley Chen (Code Review) 16 Jan '24

16 Jan '24

Attention is currently required from: Paul Menzel. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79888?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/brox: Enable WLAN on root port 5 ...................................................................... mb/google/brox: Enable WLAN on root port 5 BUG=b:311450057,b:300690448 BRANCH=None TEST=to be tested on device with lspci Change-Id: I361bef13ebd073b6fccb729a1960d3832cf2681a Signed-off-by: Shelley Chen <shchen(a)google.com> --- M src/mainboard/google/brox/variants/brox/overridetree.cb 1 file changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/79888/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/79888?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I361bef13ebd073b6fccb729a1960d3832cf2681a Gerrit-Change-Number: 79888 Gerrit-PatchSet: 7 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: [RFC] region: Turn region_end() into an inclusive region_last()
by Julius Werner (Code Review) 16 Jan '24

16 Jan '24

Attention is currently required from: Jakub Czapiga, Jérémy Compostella, Nico Huber, Werner Zeh. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79946?usp=email ) Change subject: [RFC] region: Turn region_end() into an inclusive region_last() ...................................................................... Patch Set 5: (2 comments) File src/commonlib/region.c: https://review.coreboot.org/c/coreboot/+/79946/comment/6c284c6d_b1322ffa : PS5, Line 16: if (region_last(c) < region_offset(p)) What's the point of this change? All this is trying to check is that `c` doesn't wrap, so the equivalent of that should be `region_last(c) < region_offset(c)` (technically `region_last(c) + 1 < region_offset(c)` but the difference doesn't matter in this case so you can leave out the `+ 1`). I don't get why you'd want to check against `p` instead? File tests/commonlib/region-test.c: https://review.coreboot.org/c/coreboot/+/79946/comment/610a48a8_1f3d4e92 : PS5, Line 338: assert_true((uintptr_t)backing <= SIZE_MAX); > Ah, sorry, didn't mean to commit this. I ran into a problem here […] I think a lot of our code assumes that coreboot is built and run on a flat linear address space, and that's fine. If we're worried about accidentally running on those kinds of host environments we should maybe rather assert that in some central place (e.g. have xcompile check that `SIZE_MAX` equals `UINTPTR_MAX` or something like that?). -- To view, visit https://review.coreboot.org/c/coreboot/+/79946?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic4bd6eced638745b7e845504da74542e4220554a Gerrit-Change-Number: 79946 Gerrit-PatchSet: 5 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Wed, 17 Jan 2024 01:09:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Jakub Czapiga <czapiga(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: [RFC] region: Introduce region_create() functions
by Julius Werner (Code Review) 16 Jan '24

16 Jan '24

Attention is currently required from: Andrey Petrov, Jérémy Compostella, Martin L Roth, Maximilian Brune, Nico Huber, Ronak Kanabar. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79905?usp=email ) Change subject: [RFC] region: Introduce region_create() functions ...................................................................... Patch Set 6: (2 comments) File src/commonlib/include/commonlib/region.h: https://review.coreboot.org/c/coreboot/+/79905/comment/95cda181_d363b4f3 : PS1, Line 106: offset > SIZE_MAX || size > SIZE_MAX > size_t/SIZE_MAX are implementation defined. I'm rather sure that compiled […] I agree with Max, I don't really see the point of this (and changing all the types to `unsigned long long`). Are you worried about someone calling `region_create()` with a literal `0x100000000ULL`? That seems unrealistic in practice to me, I can't think of a scenario where that would happen. And in all examples where regions are created from values that are passed in as parameters from elsewhere, those parameters ought to already be `size_t`s. Also, `SIZE_MAX` may be different in cbfstool than in coreboot, so if this is supposed to protect against larger values from cbfstool getting encoded somewhere that coreboot later interprets as a region, it wouldn't do that either. File util/cbfstool/cbfstool.c: https://review.coreboot.org/c/coreboot/+/79905/comment/ca2adaec_86d6b8e5 : PS1, Line 334: if (region_create_untrusted( > These regions can come from the command line. It's a minor difference with […] They're parsed via `strtol()` so they already cannot overflow a `size_t`. I think we should do all argument validation at the moment of parsing and then we don't need to worry about it later. -- To view, visit https://review.coreboot.org/c/coreboot/+/79905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4ae3e6274c981c9ab4fb1263c2a72fa68ef1c32b Gerrit-Change-Number: 79905 Gerrit-PatchSet: 6 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Wed, 17 Jan 2024 00:46:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: tree: More use accessor functions for struct region fields
by Julius Werner (Code Review) 16 Jan '24

16 Jan '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Nico Huber. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79955?usp=email ) Change subject: tree: More use accessor functions for struct region fields ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79955?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I18f1e37a06783aecde9024c15876b67bfeed70ee Gerrit-Change-Number: 79955 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 17 Jan 2024 00:29:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: [NEEDS TEST] region: Check for overflows after offset calculation
by Julius Werner (Code Review) 16 Jan '24

16 Jan '24

Attention is currently required from: Nico Huber. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79945?usp=email ) Change subject: [NEEDS TEST] region: Check for overflows after offset calculation ...................................................................... Patch Set 3: (1 comment) File src/commonlib/region.c: https://review.coreboot.org/c/coreboot/+/79945/comment/c67917ec_7bf59294 : PS3, Line 16: if (region_end(c) < region_offset(c)) I don't think this patch is necessary because this check here basically already checks for exactly the same thing. (I already looked at this and think I got it right in CB:34892.) -- To view, visit https://review.coreboot.org/c/coreboot/+/79945?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia6054e6e9b6f13502351a2d94c8a0af15266e43e Gerrit-Change-Number: 79945 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Wed, 17 Jan 2024 00:29:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/intel/apollolake: Fix PCI memory resource alloc
by Felix Held (Code Review) 16 Jan '24

16 Jan '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79957?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/intel/apollolake: Fix PCI memory resource alloc ...................................................................... soc/intel/apollolake: Fix PCI memory resource alloc There is a mismatch in how PCI memory resources are allocated on Apollo Lake with the current configuration. While the ACPI code expects resources to be below PCR_BASE_ADDRESS (i.e. PMAX), the coreboot C code allocates them above, leading to the following error messages on Linux: pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window] pci_bus 0000:00: root bus resource [mem 0x80000000-0xd0000000 window] pci_bus 0000:00: root bus resource [mem 0x280000000-0x7fffffffff window] pci 0000:00:13.1: can't claim BAR 14 [mem 0xdeb00000-0xdebfffff]: no compatible bridge window pci 0000:00:13.1: can't claim BAR 15 [mem 0xdec00000-0xdecfffff 64bit pref]: no compatible bridge window pci 0000:00:13.1: BAR 14: assigned [mem 0x80000000-0x800fffff] pci 0000:00:13.1: BAR 15: assigned [mem 0x281300000-0x2813fffff 64bit pref] Tested on up/squared with Linux kernel version 6.1.0. Fix this by setting the DOMAIN_RESOURCE_32BIT_LIMIT to PCR_BASE_ADDRESS, and by moving the UART base address into the expected range. Thanks to Nico Huber for the help in writing this patch. Change-Id: I3a805beb47ab4d19cf8dfce0942485e7982861b1 Signed-off-by: Reto Buerki <reet(a)codelabs.ch> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79957 Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/soc/intel/apollolake/Kconfig 1 file changed, 4 insertions(+), 1 deletion(-) Approvals: Arthur Heymans: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve build bot (Jenkins): Verified diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index f8de381..b22382b 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -338,7 +338,7 @@ config CONSOLE_UART_BASE_ADDRESS hex - default 0xddffc000 + default 0xcdffc000 depends on INTEL_LPSS_UART_FOR_CONSOLE # M and N divisor values for clock frequency configuration. @@ -396,4 +396,7 @@ bool default n +config DOMAIN_RESOURCE_32BIT_LIMIT + default PCR_BASE_ADDRESS + endif -- To view, visit https://review.coreboot.org/c/coreboot/+/79957?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3a805beb47ab4d19cf8dfce0942485e7982861b1 Gerrit-Change-Number: 79957 Gerrit-PatchSet: 4 Gerrit-Owner: Reto Buerki <reet(a)codelabs.ch> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit January 2024