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Change subject: mb/google/brya/var/quandiso: Add VBT data file
......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/77588/comment/4deac627_369917ec :
PS2, Line 11:
> Please mention that in the commit message.
Done
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Hello Nick Vaccaro, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/77588?usp=email
to look at the new patch set (#5).
Change subject: mb/google/brya/var/quandiso: Add VBT data file
......................................................................
mb/google/brya/var/quandiso: Add VBT data file
Add data.vbt file for quandiso recovery image. Select INTEL_GMA_HAVE_VBT
for quandiso as it has a VBT file now. The VBT file is copied from
chromeos internal source and based on yaviks VBT.
BUG=b:296506936
BRANCH=firmware-nissa-15217.B
TEST=emerge-nissa coreboot
Change-Id: Ia9f84b4f56171737a9e7a513b63549b3013775c4
Signed-off-by: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/Kconfig.name
A src/mainboard/google/brya/variants/quandiso/data.vbt
2 files changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/77588/5
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Change subject: soc/intel/xeon_sp: Use MRC_STASH_TO_CBMEM config
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS1:
> I based on the same upstream tip and pick your latest 2 changes:
> 77594/2 and 77557/3. They simply switch SAVE_MRC_AFTER_FSPS to MRC_STASH_TO_CBMEM but it doesn't work. Because from save_mrc_data.c, save_mrc_data() is moved to an earlier stage BS_PRE_DEVICE-ON_ENTRY which is before FSP-S is run, therefore it cannot find FSP_NON_VOLATILE_STORAGE_HOB and cannot stash it to cbmem:
>
> [NOTE ] coreboot-4.21-120-gb394816b329c-dirty Fri Sep 01 05:31:26 UTC 2023 x86_32 ramstage starting (log level: 7)...[0m
> [INFO ] POST: 0x39[0m
> [INFO ] POST: 0x6f[0m
> [ERROR] FSP_NON_VOLATILE_STORAGE_HOB missing![0m
> [DEBUG] BS: BS_PRE_DEVICE entry times (exec / console): 0 / 23 ms[0m
> [INFO ] POST: 0x70[0m
> [DEBUG] BS: BS_PRE_DEVICE run times (exec / console): 0 / 6 ms[0m
> [INFO ] POST: 0x71[0m
> [DEBUG] coreboot: calling fsp_silicon_init[0m
>
> At a later stage at BS_DEV_ENUMERATE, finalize_mrc_cache() tries to look for mrc data from cbmem but cannot find it:
> [DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 1348 / 4753 ms[0m
> [DEBUG] FMAP: area RW_MRC_CACHE found @ 3000000 (65536 bytes)[0m
> [INFO ] MRC: No data in cbmem for 'RW_MRC_CACHE'.
>
> If I only still make save_mrc_data runs at BS_DEV_INIT_CHIPS, it can work on my 2S AC.
Please pick all 4 cls
1. CB:77594
2. CB:77594
3. CB:77556
4. CB:77295
I might need to change the patch order to fix the problem you have mentioned. But my understanding and debug says, after picking all 4 CLs, you shouldn't see any problem on 1S AC or 2S AC.
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Hello Nick Vaccaro, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/77588?usp=email
to look at the new patch set (#4).
Change subject: mb/google/brya/var/quandiso: Add VBT data file
......................................................................
mb/google/brya/var/quandiso: Add VBT data file
Add data.vbt file for quandiso recovery image. Select
INTEL_GMA_HAVE_VBT for quandiso as it has a VBT file now. The VBT
file is copied from chromeos internal source and based on yaviks VBT.
BUG=b:296506936
BRANCH=firmware-nissa-15217.B
TEST=emerge-nissa coreboot
Change-Id: Ia9f84b4f56171737a9e7a513b63549b3013775c4
Signed-off-by: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/brya/Kconfig.name
A src/mainboard/google/brya/variants/quandiso/data.vbt
2 files changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/77588/4
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Change subject: soc/intel/xeon_sp: Use MRC_STASH_TO_CBMEM config
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS1:
> > > > The problem of seeing "SPI Transaction Timeout" at BS_DEV_RESOURCES is not related to your cls […]
I based on the same upstream tip and pick your latest 2 changes:
77594/2 and 77557/3. They simply switch SAVE_MRC_AFTER_FSPS to MRC_STASH_TO_CBMEM but it doesn't work. Because from save_mrc_data.c, save_mrc_data() is moved to an earlier stage BS_PRE_DEVICE-ON_ENTRY which is before FSP-S is run, therefore it cannot find FSP_NON_VOLATILE_STORAGE_HOB and cannot stash it to cbmem:
[NOTE ] coreboot-4.21-120-gb394816b329c-dirty Fri Sep 01 05:31:26 UTC 2023 x86_32 ramstage starting (log level: 7)...[0m
[INFO ] POST: 0x39[0m
[INFO ] POST: 0x6f[0m
[ERROR] FSP_NON_VOLATILE_STORAGE_HOB missing![0m
[DEBUG] BS: BS_PRE_DEVICE entry times (exec / console): 0 / 23 ms[0m
[INFO ] POST: 0x70[0m
[DEBUG] BS: BS_PRE_DEVICE run times (exec / console): 0 / 6 ms[0m
[INFO ] POST: 0x71[0m
[DEBUG] coreboot: calling fsp_silicon_init[0m
At a later stage at BS_DEV_ENUMERATE, finalize_mrc_cache() tries to look for mrc data from cbmem but cannot find it:
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 1348 / 4753 ms[0m
[DEBUG] FMAP: area RW_MRC_CACHE found @ 3000000 (65536 bytes)[0m
[INFO ] MRC: No data in cbmem for 'RW_MRC_CACHE'.
If I only still make save_mrc_data runs at BS_DEV_INIT_CHIPS, it can work on my 2S AC.
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Change subject: mb/google/brya/var/quandiso: Add VBT data file
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/77588/comment/83a94e2b_e68f0f1f :
PS2, Line 11:
> This CL is a refer to this one. […]
Please mention that in the commit message.
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