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Change subject: mb/siemens/mc_apl2: Set Full Reset Bit into Reset Control Register
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/siemens/mc_apl2: Set Full Reset Bit into Reset Control Register
......................................................................
mb/siemens/mc_apl2: Set Full Reset Bit into Reset Control Register
With the introduction of a new Linux version a problem has appeared
after a software initiated reset via CF9h register. The problem
manifests itself in the fact that the Linux kernel does not start after
the reboot. The problem is solved by setting bit 3 to 1 in Reset Control
Register (I/O port CF9h). This leads to the fact that the PCH will drive
SLP_S3 active low in the reset sequence. It leads to the same behavior
as in commit 04ea73ee78bc ("siemens/mc_apl3: Set Full Reset Bit into
Reset Control Register") explained.
Change-Id: Ibc6d538c939e38732f42995d5ec6c8b61f979a6a
Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com>
---
M src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c
1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/77603/1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c
index 430e67e..af9e25d 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <cf9_reset.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
@@ -17,4 +18,9 @@
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
}
}
+
+ /* Set Full Reset Bit in Reset Control Register (I/O port CF9h). When Bit 3 is set to 1
+ and then a warm reset is triggered the PCH will drive SLP_S3 active (low). SLP_S3 is
+ then used on the mainboard to generate the right reset timing. */
+ outb(FULL_RST, RST_CNT);
}
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Change subject: crossgcc: Upgrade GCC from 11.4.0 to 13.2.0
......................................................................
crossgcc: Upgrade GCC from 11.4.0 to 13.2.0
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Change subject: mb/google/rex/var/karis: Drop unused audio codecs and amplifiers
......................................................................
Patch Set 2:
This change is ready for review.
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Change subject: mb/google/rex/var/karis: Add audio codec ALC5650
......................................................................
Patch Set 11:
(1 comment)
This change is ready for review.
File src/mainboard/google/rex/variants/karis/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/77360/comment/2840a4a5_bca75619 :
PS8, Line 2: field AUDIO 3 4
: option ALC5650_NO_AMP_I2S 0
> do we plan to use any other codec ? […]
Done. Split this CL to 2 CLs:
1.Add audio codec ALC5650
2.Drop unused audio codecs and amplifiers
Will update fw_config afterward, thanks.
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Change subject: Documentation: Update coding_style.md with refactoring section
......................................................................
Patch Set 3: Code-Review+2
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Change subject: amdfwtool: Add FW type FUSE_CHAIN in the config file
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/77506/comment/2a3456d4_6a3e885e :
PS1, Line 9: to
> omit.
Done
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Change subject: amdfwtool: Add FW type FUSE_CHAIN in the config file
......................................................................
amdfwtool: Add FW type FUSE_CHAIN in the config file
We don't have file for the fuse chain, but we need to set the level
for some cases.
Change-Id: Idb546f761ae10b0d19a9879a9a644b788828d523
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M src/soc/amd/common/Makefile.inc
M util/amdfwtool/amdfwtool.c
M util/amdfwtool/data_parse.c
3 files changed, 13 insertions(+), 5 deletions(-)
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