coreboot-gerrit June 2023

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[S] Change in coreboot[master]: intelblocks/pep: Send All Monitor Off/On command only in FWCM case
by Martin L Roth (Code Review) 28 Jun '23

28 Jun '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75717?usp=email ) Change subject: intelblocks/pep: Send All Monitor Off/On command only in FWCM case ...................................................................... intelblocks/pep: Send All Monitor Off/On command only in FWCM case ALL_MONITOR_OFF command is sent using DPOF. TBT controller needs to be notified about ALL_MONITOR_OFF(TBT Displays OFF) only when Firmware Connection Manager(FWCM) is in use during S0ix Entry/Exit. When configured for SWCM this command should not be sent. BUG=b:288536417 TEST= Build and boot Rex Proto-1. Verify S0ix working. Signed-off-by: Usha P <usha.p(a)intel.com> Change-Id: I110fb971846f110e7d93a524ceda3bf4bfc15c13 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75717 Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Reviewed-by: Jamie Ryu <jamie.m.ryu(a)intel.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/common/block/acpi/pep.c 1 file changed, 10 insertions(+), 6 deletions(-) Approvals: Utkarsh H Patel: Looks good to me, but someone else must approve Kapil Porwal: Looks good to me, approved Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified Jamie Ryu: Looks good to me, but someone else must approve diff --git a/src/soc/intel/common/block/acpi/pep.c b/src/soc/intel/common/block/acpi/pep.c index b315019..5e03345 100644 --- a/src/soc/intel/common/block/acpi/pep.c +++ b/src/soc/intel/common/block/acpi/pep.c @@ -249,9 +249,11 @@ acpigen_write_if_end(); /* Handle Thunderbolt displays */ - acpigen_write_if_cond_ref_of(THUNDERBOLT_DEVICE); - acpigen_write_store_int_to_namestr(1, THUNDERBOLT_IOM_DPOF); - acpigen_write_if_end(); + if (CONFIG(FIRMWARE_CONNECTION_MANAGER)) { + acpigen_write_if_cond_ref_of(THUNDERBOLT_DEVICE); + acpigen_write_store_int_to_namestr(1, THUNDERBOLT_IOM_DPOF); + acpigen_write_if_end(); + } } static void lpi_s0ix_exit(void *unused) @@ -274,9 +276,11 @@ acpigen_write_if_end(); /* Handle Thunderbolt displays */ - acpigen_write_if_cond_ref_of(THUNDERBOLT_DEVICE); - acpigen_write_store_int_to_namestr(0, THUNDERBOLT_IOM_DPOF); - acpigen_write_if_end(); + if (CONFIG(FIRMWARE_CONNECTION_MANAGER)) { + acpigen_write_if_cond_ref_of(THUNDERBOLT_DEVICE); + acpigen_write_store_int_to_namestr(0, THUNDERBOLT_IOM_DPOF); + acpigen_write_if_end(); + } } static void lpi_display_on(void *unused) -- To view, visit https://review.coreboot.org/c/coreboot/+/75717?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I110fb971846f110e7d93a524ceda3bf4bfc15c13 Gerrit-Change-Number: 75717 Gerrit-PatchSet: 10 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Reviewer: Vikrant Jadeja Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Set system_configuration to 3 to avo...
by Martin L Roth (Code Review) 28 Jun '23

28 Jun '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76096?usp=email ) Change subject: mb/google/skyrim/var/winterhold: Set system_configuration to 3 to avoid SMU call ...................................................................... mb/google/skyrim/var/winterhold: Set system_configuration to 3 to avoid SMU call Update system_configuration to 3 for 15W. Specification "FT6 Infrastructure Roadmap #57316" incorrectly lists system config index of 4 for 15W. Setting to 4 will cause an additional call to the SMU that is not needed and will add boot delay. Both SMU and FSP interpret configs > 3 as 3. BUG=b:267294958 TEST=Confirm extra message "Service Request 0x5F" not in log. Change-Id: Ib12c73f95030625b52e26f86e932ee2aaa6ea522 Signed-off-by: Jason Glenesk <jason.glenesk(a)amd.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76096 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Reviewed-by: Tim Van Patten <timvp(a)google.com> Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> --- M src/mainboard/google/skyrim/variants/winterhold/overridetree.cb 1 file changed, 4 insertions(+), 2 deletions(-) Approvals: Tim Van Patten: Looks good to me, but someone else must approve build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved Eric Lai: Looks good to me, approved Martin Roth: Looks good to me, approved diff --git a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb index 57e2cab..490b415 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb @@ -11,8 +11,10 @@ # Set DPTC multi-profile common parameters # Refer the spec "FT6 Infrastructure Roadmap"#57316 - # Set system_configuration to 4 for 15W - register "system_configuration" = "4" + # Set system_configuration to 3 for 15W. Spec lists 4 for 15W, + # however, setting to 3 will avoid an additional communication + # with the SMU and save boot time. + register "system_configuration" = "3" register "thermctl_limit_degreeC" = "97" register "stt_control" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/76096?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib12c73f95030625b52e26f86e932ee2aaa6ea522 Gerrit-Change-Number: 76096 Gerrit-PatchSet: 4 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: mb/google/skyrim/: Set system_configuration to 3 to avoid SMU call
by Martin L Roth (Code Review) 28 Jun '23

28 Jun '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76091?usp=email ) Change subject: mb/google/skyrim/: Set system_configuration to 3 to avoid SMU call ...................................................................... mb/google/skyrim/: Set system_configuration to 3 to avoid SMU call Update system_configuration to 3 for 15W. Specification "FT6 Infrastructure Roadmap #57316" incorrectly lists system config index of 4 for 15W. Setting to 4 will cause an additional call to the SMU that is not needed and will add boot delay. Both SMU and FSP interpret configs > 3 as 3. BUG=b:267294958 TEST=Confirm extra message "Service Request 0x5F" not in log. Change-Id: I1f3e305c48801b4e499de56d06c0dcd3eeacc626 Signed-off-by: Jason Glenesk <jason.glenesk(a)amd.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76091 Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Van Patten <timvp(a)google.com> --- M src/mainboard/google/skyrim/variants/baseboard/devicetree.cb 1 file changed, 4 insertions(+), 2 deletions(-) Approvals: Tim Van Patten: Looks good to me, but someone else must approve build bot (Jenkins): Verified Martin Roth: Looks good to me, approved Marshall Dawson: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb index b605e1c..77f23be 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb @@ -262,8 +262,10 @@ end # DPTC: Refer the spec "FT6 Infrastructure Roadmap"#57316 - # Set system_configuration to 4 for 15W - register "system_configuration" = "4" + # Set system_configuration to 3 for 15W. Spec lists 4 for 15W, + # however, setting to 3 will avoid an additional communication + # with the SMU and save boot time. + register "system_configuration" = "3" # Normal register "slow_ppt_limit_mW" = "25000" register "fast_ppt_limit_mW" = "30000" -- To view, visit https://review.coreboot.org/c/coreboot/+/76091?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1f3e305c48801b4e499de56d06c0dcd3eeacc626 Gerrit-Change-Number: 76091 Gerrit-PatchSet: 7 Gerrit-Owner: Jason Glenesk <jason.glenesk(a)amd.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: nb/intel/pineview: Drop unused attributes from sysinfo struct
by Martin L Roth (Code Review) 28 Jun '23

28 Jun '23

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76098?usp=email ) Change subject: nb/intel/pineview: Drop unused attributes from sysinfo struct ...................................................................... nb/intel/pineview: Drop unused attributes from sysinfo struct Change-Id: Iab582458a7dd87e10bf14fd34f15c592b600f706 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76098 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/northbridge/intel/pineview/raminit.h 1 file changed, 0 insertions(+), 10 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, but someone else must approve Eric Lai: Looks good to me, approved diff --git a/src/northbridge/intel/pineview/raminit.h b/src/northbridge/intel/pineview/raminit.h index 4a0547b..fb33976 100644 --- a/src/northbridge/intel/pineview/raminit.h +++ b/src/northbridge/intel/pineview/raminit.h @@ -95,19 +95,10 @@ u16 mediumphase; u16 readptrdelay; - int txt_enabled; - int cores; int boot_path; - int max_ddr2_mhz; - int max_ddr3_mt; - int max_fsb_mhz; - int max_render_mhz; - int enable_igd; - int enable_peg; u16 ggc; int dimm_config[2]; - int dimms_per_ch; int spd_type; int channel_capacity[2]; struct timings selected_timings; @@ -117,7 +108,6 @@ u8 nodll; u8 async; u8 dt0mode; - u8 mvco4x; /* 0 (8x) or 1 (4x) */ }; void sdram_initialize(int boot_path, const u8 *sdram_addresses); -- To view, visit https://review.coreboot.org/c/coreboot/+/76098?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab582458a7dd87e10bf14fd34f15c592b600f706 Gerrit-Change-Number: 76098 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: mb/google/hades: Update SD controller from GL9750 to GL9755
by 9elements QA (Code Review) 28 Jun '23

28 Jun '23

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76118?usp=email ) Change subject: mb/google/hades: Update SD controller from GL9750 to GL9755 ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 8 / 6 / 14 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/171003 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/171001 FAIL: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/171000 FAIL: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/170999 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/170998 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/170997 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/170996 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/170995 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/170994 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/170993 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/170992 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/170991 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/170990 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/170989 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/76118?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia5b3b17d76f02d5114af24535f9a1eecc14358a3 Gerrit-Change-Number: 76118 Gerrit-PatchSet: 2 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Wed, 28 Jun 2023 19:29:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/rex: Set AUX orientation at SoC to follow cable for kb8010
by Kapil Porwal (Code Review) 28 Jun '23

28 Jun '23

Attention is currently required from: Caveh Jalali, Jakub Czapiga, Subrata Banik, Tarun Tuli. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76137?usp=email ) Change subject: mb/google/rex: Set AUX orientation at SoC to follow cable for kb8010 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76137?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iad093e27617b80f8301008deb00b57fb9b3a48ba Gerrit-Change-Number: 76137 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Comment-Date: Wed, 28 Jun 2023 19:27:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/rex: Set AUX orientation at SoC to follow cable for kb8010
by Caveh Jalali (Code Review) 28 Jun '23

28 Jun '23

Attention is currently required from: Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun Tuli. Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76137?usp=email ) Change subject: mb/google/rex: Set AUX orientation at SoC to follow cable for kb8010 ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/76137/comment/b33cf9a3_9fa42f97 : PS1, Line 17: reworked kb8010 DB > Which rework? it's listed as #11 in the system rework instructions, if you want to look it up. this is a required rework to enable DP on kb8010 DBs. -- To view, visit https://review.coreboot.org/c/coreboot/+/76137?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iad093e27617b80f8301008deb00b57fb9b3a48ba Gerrit-Change-Number: 76137 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Wed, 28 Jun 2023 19:13:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/rex/var/ovis: Enable crashlog and IOE die
by 9elements QA (Code Review) 28 Jun '23

28 Jun '23

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76151?usp=email ) Change subject: mb/google/rex/var/ovis: Enable crashlog and IOE die ...................................................................... Patch Set 7: Automatic boot test returned (PASS/FAIL/TOTAL): 8 / 6 / 14 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/170988 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/170986 FAIL: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/170985 FAIL: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/170984 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/170983 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/170982 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/170981 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/170980 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/170979 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/170978 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/170977 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/170976 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/170975 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/170974 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/76151?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I43aac857e3ec7989c9ab5201cd8f24a7c877e76b Gerrit-Change-Number: 76151 Gerrit-PatchSet: 7 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Wed, 28 Jun 2023 19:07:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: acpi: Set checksum for SPCR table
by Nico Huber (Code Review) 28 Jun '23

28 Jun '23

Attention is currently required from: Felix Singer, Lance Zhao, Lean Sheng Tan, Tim Wawrzynczak. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76158?usp=email ) Change subject: acpi: Set checksum for SPCR table ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > FWIW rebasing CB:76127 to include SPCR would work too :-) Makes sense, you can either rebase on this one or master, your call. -- To view, visit https://review.coreboot.org/c/coreboot/+/76158?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0086a3e8c5b3a06da9edf40a7a288c534fc5a6b2 Gerrit-Change-Number: 76158 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 28 Jun 2023 18:53:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: cpu/intel/microcode: Have CPU microcode per CPUID into CBFS
by Arthur Heymans (Code Review) 28 Jun '23

28 Jun '23

Attention is currently required from: Himanshu Sahdev, Julius Werner, Lean Sheng Tan, Rizwan Qureshi, Subrata Banik, Tarun Tuli, Wonkyu Kim. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75357?usp=email ) Change subject: cpu/intel/microcode: Have CPU microcode per CPUID into CBFS ...................................................................... Patch Set 18: (1 comment) File src/cpu/Kconfig: https://review.coreboot.org/c/coreboot/+/75357/comment/46b4c9e9_681d1c3e : PS14, Line 123: bool "Include microcode per CPUID into CBFS" > > > > > > > This option will show on ALL platforms. Does it even make sense to have it as a user visible option? > > > > > > > > > > > > it will allow to override the default value from site-local rather forcing to enable from SoC/MB config using upstream coreboot. > > > > > > > > > > > > As we are not uploading the ucode blobs in coreboot upstream build hence it's easy to go by default value which is `n` and don't need to specify the split ucode blob path. > > > > > > > > > > @Arthur, ping! can you please take a relook. > > > > > > > > marking this resolved for now after keeping open for 1 week > > > > > > It's not about default values. If I run make menuconfig and select a mainboard I should not be able to see any option that makes no sense. > > > > Which is the case now. I can see the option to split microcode on platforms that would not boot when selecting it as they rely on concatenation. Also I would see the existing options to include microcode and this new method. This should be mutually exclusive. > > do you suggest to use a HAVE_ config to ensure this user visible prompt is only visible for the desired platform and not to others ? Would it make sense to have " choice prompt "Include CPU microcode in CBFS" if ARCH_X86 " depends on !CPU_INTEL_MICROCODE_CBFS_SPLIT_BINS ? -- To view, visit https://review.coreboot.org/c/coreboot/+/75357?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic7db73335ffa25399869cfb0d59129ee118f1012 Gerrit-Change-Number: 75357 Gerrit-PatchSet: 18 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 28 Jun 2023 18:48:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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