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Change subject: mb/google/myst: Add PCIe shutdown workaround
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75583/comment/5dc47b7a_9cd098ff :
PS3, Line 9: FSP
> Add a version in case FSP gets fixed in the future?
Early bringup, I don't have a version
File src/mainboard/google/myst/port_descriptors.c:
https://review.coreboot.org/c/coreboot/+/75583/comment/e27f2f98_dd3b2b7e :
PS2, Line 56: .turn_off_unused_lanes = true,
> What are the differences between the two in terms of unintended side effects? My preference would be […]
It's a workaround. We're merging this to get through functional testing. The workaround works.
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Change subject: allocator_v4: Treat above 4G resources more natively
......................................................................
Patch Set 3:
This change is ready for review.
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Change subject: mb/google/myst: Add USB config
......................................................................
Patch Set 3:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75574/comment/b8ef1c3b_a043abbc :
PS2, Line 7: to myst
> Redundant.
Acknowledged
https://review.coreboot.org/c/coreboot/+/75574/comment/c9115cee_0c3f44e6 :
PS2, Line 9: FSP
> If you know the version of the fixed FSP, please document it.
Early bringup, not an official release.
https://review.coreboot.org/c/coreboot/+/75574/comment/23ab5352_fca16efc :
PS2, Line 14: verify USB works
> It’d be great if you could specify how exactly. […]
We're still in early bringup. This enables testing. Observe connected devices with lsusb
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/myst: Add USB config
......................................................................
mb/google/myst: Add USB config
Add the phoenix usb config struct for Myst since the FSP has been
updated to accept the config from coreboot and the default values
do not work.
BUG=None
TEST=Boot to OS on Myst, verify devices are seen with lsusb
Change-Id: I329aba80f3003a3a5f343b8dcc3efa8502b98e24
Signed-off-by: Jon Murphy <jpmurphy(a)google.com>
---
M src/mainboard/google/myst/variants/baseboard/devicetree.cb
1 file changed, 139 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/75574/3
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Hello Arthur Heymans, Arthur Heymans, Jonathan Zhang, Kyösti Mälkki, Lean Sheng Tan, Tim Wawrzynczak, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Code-Review+2 by Arthur Heymans
Change subject: allocator_v4: Manually inline some thin functions
......................................................................
allocator_v4: Manually inline some thin functions
Inline functions that are only called once to improve readability. The
calling functions still have rather short bodies, and the reader won't
have to look down yet another layer to understand what they are doing.
Change-Id: Ib4aa5d61dfa88c804a1aaee028185e00c5fbb923
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M src/device/resource_allocator_v4.c
1 file changed, 22 insertions(+), 46 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/65422/10
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Change subject: allocator_v4: Factor resource printing out
......................................................................
allocator_v4: Factor resource printing out
Factor all the resource printing out into separate functions.
This results in one-liners in the actual program code which
hopefully will distract less during reading.
Change-Id: I766db379f3b62d641cb3c41ebe0394b60ba57f7a
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M src/device/resource_allocator_v4.c
1 file changed, 67 insertions(+), 48 deletions(-)
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Change subject: allocator_v4: Use memranges only for toplevel
......................................................................
allocator_v4: Use memranges only for toplevel
During phase 1 of the resource allocation we gather all the size
requirements. Starting from the leafs of our devicetree, we cal-
culate the requirements per bus, until we reach the resource do-
main.
However, because alignment plays a role, we can't just accumulate
the sizes of all resources on a bus. Instead, we already sort all
the resources per bus to predict their relative placement, inclu-
ding alignment gaps. Then, phase 2 has to perform the final allo-
cations with the exact same relative placement.
This patch introduces a very simple mechanism to avoid repeating
all the calculations: In phase 1, we note the relative `base` of
each resource on a bus. And after we allocated all the resources
directly below the domain in phase 2, we add the absolute `base`
of bridge resources to the relative `base` of child resources.
This saves most of the computational complexity in phase 2. How-
ever, with a shallow devicetree with most devices directly below
the domain, this won't have a measurable impact.
Example after phase 1:
domain
|
`-- bridge #0
| res #0, base 0x000000 (relative),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0x800000 (relative),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0x000000 (relative),
| size 8M, align 8M
|
`-- device #1
res #3, base 0x000000 (relative),
size 8M, align 8M
After phase 2 allocation at the domain level (assuming res #0 got
0xa000000 assigned):
domain
|
`-- bridge #0
| res #0, base 0xa000000 (absolute),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0x800000 (relative),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0x000000 (relative),
| size 8M, align 8M
|
`-- device #1
res #3, base 0x000000 (relative),
size 8M, align 8M
Now, all we need to do is to add the `base` of bridge resources
recursively. Starting with resources on the bus below bridge #0:
domain
|
`-- bridge #0
| res #0, base 0xa000000 (absolute),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0xa800000 (absolute),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0xa000000 (absolute),
| size 8M, align 8M
|
`-- device #1
res #3, base 0x000000 (relative),
size 8M, align 8M
And finally for resources on the bus below bridge #1:
domain
|
`-- bridge #0
| res #0, base 0xa000000 (absolute),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0xa800000 (absolute),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0xa000000 (absolute),
| size 8M, align 8M
|
`-- device #1
res #3, base 0xa000000 (absolute),
size 8M, align 8M
Change-Id: I70c700318a85f6760f27597730bc9c9a86dbe6b3
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M src/device/resource_allocator_v4.c
1 file changed, 123 insertions(+), 125 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/65420/18
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Hello build bot (Jenkins),
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Change subject: util/qemu: Revise q35 configs
......................................................................
util/qemu: Revise q35 configs
Add an NVMe drive and be more conservative with hotplug-capable PCIe
ports. QEMU treats everything as hotpluggable by default, so devices
can be added at runtime. However, this leads to unrealistic resource
allocations with PCIEXP_HOTPLUG enabled.
Tested recent allocator changes with QEMU/Q35 config and:
$ make qemu QEMU_EXTRA_CFGS=util/qemu/q35-alpine.cfg
Change-Id: I23746b642329356c6767b04ec177cd9411e3adb9
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M util/qemu/q35-alpine.cfg
M util/qemu/q35-base.cfg
2 files changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/67026/4
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Change subject: mb/google/rex/variants/ovis: Add SSD card config
......................................................................
Patch Set 1: Code-Review+1
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