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Change subject: Docs: Add a test target for the documentation
......................................................................
Docs: Add a test target for the documentation
The test target will run, but won't fail the build if there are issues.
This is so it can be added to the jenkins build and run until it passes.
At that point, it can be made to fail if there's an error.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I5810643ee143f9db4f1cd388531161d4398d596c
---
M Documentation/Makefile
1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/75497/2
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Change subject: Docs: Add a test target for the documentation
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
File Documentation/Makefile:
https://review.coreboot.org/c/coreboot/+/75497/comment/52ccd88d_b8169ce4 :
PS1, Line 61: -
> Are these dashes intended? What do they do?
Never mind. See https://stackoverflow.com/questions/3477292/what-do-and-do-as-prefixes-to-r…
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Change subject: Docs: Add a test target for the documentation
......................................................................
Patch Set 1:
(1 comment)
File Documentation/Makefile:
https://review.coreboot.org/c/coreboot/+/75497/comment/81a30ec6_a97b9fb2 :
PS1, Line 61: -
Are these dashes intended? What do they do?
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Change subject: Documentation: Move 4.20 release notes to 4.20.1
......................................................................
Patch Set 1: Code-Review+2
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Change subject: crossgcc: Upgrade LLVM version 16.0.4 to 16.0.5
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75635/comment/e540f4f9_591b0bd4 :
PS1, Line 7: LLVM version
nit: from version
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Change subject: crossgcc: Upgrade CMake from version 3.26.3 to 3.26.4
......................................................................
Patch Set 1: Code-Review+2
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Change subject: Documentation: Final 4.20 release notes
......................................................................
Patch Set 1: Code-Review+2
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75636/comment/95eb8f12_f7d2f40b :
PS1, Line 7: Final
nit: Finalize
https://review.coreboot.org/c/coreboot/+/75636/comment/3b133f49_60af17da :
PS1, Line 12: ,
nit: Remove comma
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Change subject: Documentation: Move 4.20 release notes to 4.20.1
......................................................................
Documentation: Move 4.20 release notes to 4.20.1
This moves the release notes to 4.20.1, as was done with the 4.8 release
when it went to 4.8.1. The index.md file is updated for both the 4.20.1
and 4.8.1 releases, and extra spacing was added. This doesn't get shown
in the output, but makes the text version look better.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: Ic2fb35f1bf9fa7dc16d324882cd6057a1a4b05ed
---
R Documentation/releases/coreboot-4.20.1-relnotes.md
M Documentation/releases/index.md
2 files changed, 20 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/75637/1
diff --git a/Documentation/releases/coreboot-4.20-relnotes.md b/Documentation/releases/coreboot-4.20.1-relnotes.md
similarity index 100%
rename from Documentation/releases/coreboot-4.20-relnotes.md
rename to Documentation/releases/coreboot-4.20.1-relnotes.md
diff --git a/Documentation/releases/index.md b/Documentation/releases/index.md
index c6bec6e..bc57d3f 100644
--- a/Documentation/releases/index.md
+++ b/Documentation/releases/index.md
@@ -15,26 +15,26 @@
## Previous releases
-* [4.20 - May 2023](coreboot-4.20-relnotes.md)
-* [4.19 - January 2023](coreboot-4.19-relnotes.md)
-* [4.18 - October 2022](coreboot-4.18-relnotes.md)
-* [4.17 - May 2022](coreboot-4.17-relnotes.md)
-* [4.16 - February 2022](coreboot-4.16-relnotes.md)
-* [4.15 - November 2021](coreboot-4.15-relnotes.md)
-* [4.14 - May 2021](coreboot-4.14-relnotes.md)
-* [4.13 - November 2020](coreboot-4.13-relnotes.md)
-* [4.12 - May 2020](coreboot-4.12-relnotes.md)
-* [4.11 - November 2019](coreboot-4.11-relnotes.md)
-* [4.10 - July 2019](coreboot-4.10-relnotes.md)
-* [4.9 - December 2018](coreboot-4.9-relnotes.md)
-* [4.8 - May 2018](coreboot-4.8.1-relnotes.md)
-* [4.7 - January 2018](coreboot-4.7-relnotes.md)
-* [4.6 - April 2017](coreboot-4.6-relnotes.md)
-* [4.5 - October 2016](coreboot-4.5-relnotes.md)
-* [4.4 - May 2016](coreboot-4.4-relnotes.md)
-* [4.3 - January 2016](coreboot-4.3-relnotes.md)
-* [4.2 - October 2015](coreboot-4.2-relnotes.md)
-* [4.1 - July 2015](coreboot-4.1-relnotes.md)
+* [4.20.1 - May 2023](coreboot-4.20.1-relnotes.md)
+* [4.19 - January 2023](coreboot-4.19-relnotes.md)
+* [4.18 - October 2022](coreboot-4.18-relnotes.md)
+* [4.17 - May 2022](coreboot-4.17-relnotes.md)
+* [4.16 - February 2022](coreboot-4.16-relnotes.md)
+* [4.15 - November 2021](coreboot-4.15-relnotes.md)
+* [4.14 - May 2021](coreboot-4.14-relnotes.md)
+* [4.13 - November 2020](coreboot-4.13-relnotes.md)
+* [4.12 - May 2020](coreboot-4.12-relnotes.md)
+* [4.11 - November 2019](coreboot-4.11-relnotes.md)
+* [4.10 - July 2019](coreboot-4.10-relnotes.md)
+* [4.9 - December 2018](coreboot-4.9-relnotes.md)
+* [4.8.1 - May 2018](coreboot-4.8.1-relnotes.md)
+* [4.7 - January 2018](coreboot-4.7-relnotes.md)
+* [4.6 - April 2017](coreboot-4.6-relnotes.md)
+* [4.5 - October 2016](coreboot-4.5-relnotes.md)
+* [4.4 - May 2016](coreboot-4.4-relnotes.md)
+* [4.3 - January 2016](coreboot-4.3-relnotes.md)
+* [4.2 - October 2015](coreboot-4.2-relnotes.md)
+* [4.1 - July 2015](coreboot-4.1-relnotes.md)
[checklist]: checklist.md
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Change subject: Documentation: Final 4.20 release notes
......................................................................
Documentation: Final 4.20 release notes
Update the 4.20 release notes to the final post-release version.
This fixes a few typos, updates the statistics to include the final few
patches, and adds a note about the licensing issues which required a
version bump to 4.20.1.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I350535b8aa531642e161f1cad4752452f9171647
---
M Documentation/releases/coreboot-4.20-relnotes.md
1 file changed, 41 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/75636/1
diff --git a/Documentation/releases/coreboot-4.20-relnotes.md b/Documentation/releases/coreboot-4.20-relnotes.md
index 8217ca7..3bfa993 100644
--- a/Documentation/releases/coreboot-4.20-relnotes.md
+++ b/Documentation/releases/coreboot-4.20-relnotes.md
@@ -1,10 +1,16 @@
-Upcoming release - coreboot 4.20
+coreboot 4.20 release
========================================================================
-The 4.20 release is being done on May 15, 2023.
+The 4.20 release was done on May 15, 2023. Unfortunately, a licensing
+issues was found immediately after the release was completed, and it
+was decided to hold the release until that was fixed.
+
+Please do not use the 4.20 tag, and use the 4.20.1 git tag instead. The
+4.20_branch will contain all code for 4.20, 4.20.1, and any further
+changes required for this release.
The coreboot community has done a tremendous amount of work on the
-codebase over the last three and a half month. We've had over 1600
+codebase over the last three and a half months. We've had over 1600
commits in that time period, doing ongoing cleanup and improvement.
It can be hard to remember at times how much the codebase really has
@@ -19,20 +25,23 @@
Many thanks to everyone involved!
-We plan to get the 4.21 release done in mid August, 2023,
+We plan to get the 4.21 release done in mid August, 2023.
+
Significant or interesting changes
----------------------------------
+
### cpu/mp_init.c: Only enable CPUs once they execute code
On some systems the BSP cannot know how many CPUs are present in the
system. A typical use case is a multi socket system. Setting the enable
flag only on CPUs that actually exist makes it more flexible.
+
### cpu/x86/smm: Add PCI resource store functionality
-In certain cases data within protected memmory areas like SMRAM could
+In certain cases data within protected memory areas like SMRAM could
be leaked or modified if an attacker remaps PCI BARs to point within
that area. Add support to the existing SMM runtime to allow storing
PCI resources in SMRAM and then later retrieving them.
@@ -40,10 +49,12 @@
This helps prevent moving BARs around to get SMM to access memory in
areas that shouldn't be accessed.
+
### acpi: Add SRAT x2APIC table support
For platforms using X2APIC mode add SRAT x2APIC table
-generation. This allows to setup proper SRAT tables.
+generation. This allows the setup of proper SRAT tables.
+
### drivers/usb/acpi: Add USB _DSM method to enable/disable USB LPM per port
@@ -57,10 +68,11 @@
to support this feature. Please see
https://git.kernel.org/pub/scm/linux/kernel/git/mnyman/xhci.git/log/?h=port…
+
### drivers/efi: Add EFI variable store option support
Add a driver to read and write EFI variables stored in a region device.
-This is particularly useful for EDK2 as payload and allows to reuse
+This is particularly useful for EDK2 as payload and allows it to reuse
existing EFI tools to set/get options used by the firmware.
The write implementation is fault tolerant and doesn't corrupt the
@@ -89,11 +101,11 @@
previous is marked invalid. This only works on PNOR flash that allow to
clear set bits, but keep cleared bits state.
This mechanisms allows a fault tolerant write, but it also requires to
-"clean" the variable store for time to time. This cleaning would remove
+"clean" the variable store from time to time. This cleaning would remove
variables that have been marked "deleted".
Such cleaning mechanism in turn must be fault tolerant and thus must use
a second partition in the SPI flash as backup/working region.
-For now to cleaning is done in coreboot.
+For now, cleaning is done in coreboot.
Fault checking:
The driver should check if a previous write was successful and if not
@@ -105,6 +117,7 @@
Add EWL (Enhanced Warning Log) driver which handles Intel EWL HOB
and prints EWL type 3 primarily associated with MRC training failures.
+
### Toolchain updates
* Upgrade MPC from version 1.2.1 to 1.3.1
@@ -114,6 +127,7 @@
* Upgrade GCC from version 11.2.0 to 11.3.0
* Upgrade binutils from version 2.37 to 2.40
+
Additional coreboot changes
---------------------------
@@ -135,8 +149,10 @@
* Do initial work on Xeon SPR
* CMOS defaults greater than 128 bytes long now extend to bank 1.
+
New Mainboards
--------------
+
* Asrock: B75M-ITX
* Dell: Latitude E6400
* Google: Aurash
@@ -162,16 +178,21 @@
* System76: oryp10
* System76: oryp9
+
Removed Mainboards
------------------
+
* Intel Icelake U DDR4/LPDDR4 RVP
* Intel Icelake Y LPDDR4 RVP
* Scaleway TAGADA
+
Updated SoCs
------------
+
* Removed soc/intel/icelake
+
Plans to move platform support to a branch
------------------------------------------
@@ -188,21 +209,23 @@
* Intel Quark SoC
* Intel Galileo mainboard
+
Statistics from the 4.19 to the 4.20 release
--------------------------------------------
-Total Commits: ~1625
-Average Commits per day: ~13.71
-Total lines added: ~101911
-Average lines added per commit: ~62.71
-Number of patches adding more than 100 lines: ~126
-Average lines added per small commit: ~37.98
-Total lines removed: ~34756
-Average lines removed per commit: ~21.39
-Total difference between added and removed: ~67155
+Total Commits: 1630
+Average Commits per day: 13.72
+Total lines added: 102592
+Average lines added per commit: 62.94
+Number of patches adding more than 100 lines: 128
+Average lines added per small commit: 37.99
+Total lines removed: 34824
+Average lines removed per commit: 21.36
+Total difference between added and removed: 67768
Total authors: ~170
New authors: ~35
+
Significant Known and Open Issues
---------------------------------
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Change subject: soc/amd/common/data_fabric/domain: provide amd_pci_domain_fill_ssdt
......................................................................
Patch Set 14:
(1 comment)
File src/soc/amd/common/block/data_fabric/domain.c:
https://review.coreboot.org/c/coreboot/+/74843/comment/01fe76d4_928a01a9 :
PS11, Line 169: if (base > PCI_IO_CONFIG_LAST_PORT || limit < PCI_IO_CONFIG_INDEX) {
> tested with https://review.coreboot. […]
i'd keep the code as it is right now with the updated comment that points out why this is done. when i have some time for that, i'll talk to one of our kernel engineers to look into linux not liking the dword io resource producer that covers the whole io range
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Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
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Gerrit-Comment-Date: Sat, 03 Jun 2023 16:20:22 +0000
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