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Change subject: mb/google/nissa/var/joxer: disable PCIE RP7
......................................................................
Patch Set 4:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75658/comment/095ba898_c13fe5c4 :
PS2, Line 9: joxer removed SD card from all SKUs, thus disabled pcie_rp7
> Please add a dot/period at the end of sentences.
Done
https://review.coreboot.org/c/coreboot/+/75658/comment/a601574d_109406a0 :
PS2, Line 9: disabled
> Present tense (imperative mood): disable
Updated.
File src/mainboard/google/brya/variants/joxer/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/75658/comment/bced9a81_ef65a946 :
PS2, Line 183: device ref pcie_rp7 off end #PCIE7 no SD card
> Please add a space after #.
Done
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Change subject: mb/google/nissa/var/joxer: disable PCIE RP7
......................................................................
mb/google/nissa/var/joxer: disable PCIE RP7
joxer removed SD card from all SKUs, thus disable pcie_rp7.
BUG=b:236576115
TEST=USE="project_joxer emerge-nissa coreboot"
Signed-off-by: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com>
Change-Id: I3486d665ddb1de521ab4e656addb2209055174c7
---
M src/mainboard/google/brya/variants/joxer/overridetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/75658/4
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Change subject: mb/google/nissa/var/joxer: disable PCIE RP7
......................................................................
Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75658/comment/846e4a36_f83b2e59 :
PS2, Line 9: disabled
Present tense (imperative mood): disable
https://review.coreboot.org/c/coreboot/+/75658/comment/4386b9f9_1c5dcf94 :
PS2, Line 9: joxer removed SD card from all SKUs, thus disabled pcie_rp7
Please add a dot/period at the end of sentences.
File src/mainboard/google/brya/variants/joxer/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/75658/comment/0cda8131_8857bf55 :
PS2, Line 183: device ref pcie_rp7 off end #PCIE7 no SD card
Please add a space after #.
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Change subject: mb/google/nissa/var/joxer: disable PCIE RP7
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75658/comment/dbed5914_42ba4fd6 :
PS1, Line 9: and
> no need "and"
Updated.
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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/nissa/var/joxer: disable PCIE RP7
......................................................................
mb/google/nissa/var/joxer: disable PCIE RP7
joxer removed SD card from all SKUs, thus disabled pcie_rp7
BUG=b:236576115
TEST=USE="project_joxer emerge-nissa coreboot"
Signed-off-by: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com>
Change-Id: I3486d665ddb1de521ab4e656addb2209055174c7
---
M src/mainboard/google/brya/variants/joxer/overridetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/75658/2
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Change subject: mb/google/nissa/var/joxer: disable PCIE RP7
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75658/comment/04ab9564_a6e89d2f :
PS1, Line 9: and
no need "and"
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Change subject: mb/google/myst: Enable USB WWAN
......................................................................
mb/google/myst: Enable USB WWAN
Add usb wwan device tree entry. Also set wwan_rst to high due to
HW design active high.
BUG=b:285792436
TEST=check FM101 can be detect in kernel.
Bus 002 Device 002: ID 2cb7:01a2 Fibocom Wireless Inc.
Signed-off-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
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---
M src/mainboard/google/myst/variants/baseboard/devicetree.cb
M src/mainboard/google/myst/variants/baseboard/gpio.c
2 files changed, 20 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/75660/3
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Hello Jon Murphy, Karthik Ramasubramanian, Tim Van Patten,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: mb/google/myst: Enable USB WWAN
......................................................................
mb/google/myst: Enable USB WWAN
Add usb wwan device tree entry. Also set wwan_rst to high due to
HW design active high.
BUG=b:285792436
TEST=check FM101 can be detect in kernel.
Bus 002 Device 002: ID 2cb7:01a2 Fibocom Wireless Inc. Fibocom FM101-GL
Signed-off-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Change-Id: I0aa60cb284d4b7f99e16643a92ee58467a355026
---
M src/mainboard/google/myst/variants/baseboard/devicetree.cb
M src/mainboard/google/myst/variants/baseboard/gpio.c
2 files changed, 20 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/75660/2
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Change subject: mb/google/myst: Enable USB WWAN
......................................................................
mb/google/myst: Enable USB WWAN
Add usb wwan device tree entry. Also set wwan_rst to high due to HW revert.
BUG=b:285792436
TEST=check FM101 can be detect in kernel.
Bus 002 Device 002: ID 2cb7:01a2 Fibocom Wireless Inc. Fibocom FM101-GL
Signed-off-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Change-Id: I0aa60cb284d4b7f99e16643a92ee58467a355026
---
M src/mainboard/google/myst/variants/baseboard/devicetree.cb
M src/mainboard/google/myst/variants/baseboard/gpio.c
2 files changed, 20 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/75660/1
diff --git a/src/mainboard/google/myst/variants/baseboard/devicetree.cb b/src/mainboard/google/myst/variants/baseboard/devicetree.cb
index f53f5b7..01a4389 100644
--- a/src/mainboard/google/myst/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/myst/variants/baseboard/devicetree.cb
@@ -293,6 +293,25 @@
end
end
end
+ device ref xhci_1 on
+ chip drivers/usb/acpi
+ register "type" = "UPC_TYPE_HUB"
+ device ref xhci_1_root_hub on
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 WWAN""
+ register "type" = "UPC_TYPE_INTERNAL"
+ register "has_power_resource" = "1"
+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_6)"
+ register "enable_delay_ms" = "20"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_11)"
+ register "reset_off_delay_ms" = "20"
+ device ref usb3_port7 on
+ probe WWAN WWAN_FM101GL
+ end
+ end
+ end
+ end
+ end
device ref acp on end # Audio Processor (ACP)
device ref mp2 on end # Sensor Fusion Hub (MP2)
end
diff --git a/src/mainboard/google/myst/variants/baseboard/gpio.c b/src/mainboard/google/myst/variants/baseboard/gpio.c
index 7979763..efd654e 100644
--- a/src/mainboard/google/myst/variants/baseboard/gpio.c
+++ b/src/mainboard/google/myst/variants/baseboard/gpio.c
@@ -28,7 +28,7 @@
/* EN_PP3300_WLAN */
PAD_GPO(GPIO_9, HIGH),
/* WWAN_RST */
- PAD_GPO(GPIO_11, LOW),
+ PAD_GPO(GPIO_11, HIGH),
/* Unused */
PAD_NC(GPIO_12),
/* GPIO_13 - GPIO_15: Not available */
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0aa60cb284d4b7f99e16643a92ee58467a355026
Gerrit-Change-Number: 75660
Gerrit-PatchSet: 1
Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
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Attention is currently required from: Felix Held, Jon Murphy, Karthik Ramasubramanian, Matt DeVillier.
Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75659?usp=email )
Change subject: drivers/usb/pci_xhci: Add xhci DID for phoenix
......................................................................
Patch Set 1:
(1 comment)
File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/75659/comment/834efb6e_27cb6964 :
PS1, Line 604: PCI_DID_AMD_FAM19H_MODEL70H_XHCI1
> Also how about DIDs 0x15C0 and 0x15C1
15C0 and 15C1 is USB4 I don't know where should I add?
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