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Change subject: drivers/usb/pci_xhci: Add xhci DID for phoenix
......................................................................
Patch Set 1:
(1 comment)
File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/75659/comment/28063aa1_43432a5d :
PS1, Line 604: PCI_DID_AMD_FAM19H_MODEL70H_XHCI1
Also how about DIDs 0x15C0 and 0x15C1
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Change subject: mb/google/nissa/var/joxer: disable PCIE RP7
......................................................................
Patch Set 1:
This change is ready for review.
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Change subject: src/mainboard: Add Inventec transfomers setting
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75598/comment/69d5faa1_6d946be6 :
PS1, Line 9: Modify Inventec transformers coreboot setting based on ArcherCity.
> how does it differ?
@Felix Singer
It's the same thing, in inventec our platform name is fransfomers so we create a new folder for this. We just modify some GPIO, PCIE hardware config in it based on our schmatic.
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Hello Angel Pons, Arthur Heymans, David Hendricks, Hung-Wei Chen, Johnny Lin, Lean Sheng Tan, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/75598?usp=email
to look at the new patch set (#2).
Change subject: src/mainboard: Add Inventec transfomers setting
......................................................................
src/mainboard: Add Inventec transfomers setting
CPU:
- 2 SPR sockets
- 64 total PCIe 5.0 lanes with up to 64 lanes of Flex Bus/CXL per CPU
- Up to 32 DDR5 DIMM
- 1Gbase-T NIC port
- 1 USB3.0 type A, 1 USB2.0 connector
- 1 VGA connector
BMC:
- ASPEED AST2600 BMC
- 1 DDR4 8Gb memory
- 1 8GB eMMC
Test:
The board boots to Linux 4.19.6 with all 192 cores available.
Change-Id: Ic9d99c3aadaa9f69e6d14d4b1a6c5157f5590684
Signed-off-by: Annie Chen <Chen.AnnieET(a)inventec.com>
---
A configs/builder/config.transformers
A src/mainboard/inventec/Kconfig
A src/mainboard/inventec/Kconfig.name
A src/mainboard/inventec/transformers/Kconfig
A src/mainboard/inventec/transformers/Kconfig.name
A src/mainboard/inventec/transformers/Makefile.inc
A src/mainboard/inventec/transformers/acpi/platform.asl
A src/mainboard/inventec/transformers/board.fmd
A src/mainboard/inventec/transformers/board_info.txt
A src/mainboard/inventec/transformers/bootblock.c
A src/mainboard/inventec/transformers/devicetree.cb
A src/mainboard/inventec/transformers/dsdt.asl
A src/mainboard/inventec/transformers/include/mainboard_ras.h
A src/mainboard/inventec/transformers/include/sprsp_ac_iio.h
A src/mainboard/inventec/transformers/include/sprsp_gpio.h
A src/mainboard/inventec/transformers/ipmi.c
A src/mainboard/inventec/transformers/ipmi.h
A src/mainboard/inventec/transformers/ramstage.c
A src/mainboard/inventec/transformers/romstage.c
19 files changed, 939 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/75598/2
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Change subject: libpayload/uhci: Re-write UHCI RH driver w/ generic_hub API
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75504/comment/eeb7e8a6_18e3d8c1 :
PS1, Line 21:
> Nice. Thank you. […]
I tried that on Debian sid/unstable with
$ git log --oneline --no-decorate -1
14e215b241 mb/google/rex/var/rex0: probe for i2c1 touchscreen
and FILO’s CLI was shown and my entered characters were shown. Do I need to do something else to make it hang?
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Change subject: libpayload/drivers/usb/uhci: Fix regression
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
I believe, Nico fixed this in commit 2a976f0d072c (libpayload/uhci: Return expected length for control/bulk transfers), Change-Id: I31d7de495a46af401e2cbe5a3b8f6349facad8ff [1], so this change-set could be abandoned.
[1]: https://review.coreboot.org/c/coreboot/+/75349
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Change subject: mb/google/nissa/var/joxer: Remove VBOOT_GSC_BOARD_ID config
......................................................................
Patch Set 2: Code-Review+1
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Change subject: cpu/x86: Support SMBASE relocation-only use-case
......................................................................
Patch Set 6:
(1 comment)
File src/cpu/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/70376/comment/e31e2af8_33152301 :
PS6, Line 139: COREBOOT
we are in coreboot repo, don't know if there is any way to avoid `COREBOOT` from the Kconfig name?
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Change subject: soc/intel/common: Make get_ramtop_addr non static
......................................................................
Patch Set 1: Code-Review+2
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