Attention is currently required from: Kapil Porwal, Subrata Banik.
Hello Kapil Porwal, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#6).
Change subject: {driver, mb, soc}: Store fw versions in CMOS memory for cold boot
......................................................................
{driver, mb, soc}: Store fw versions in CMOS memory for cold boot
During a cold reboot, the CBMEM memory resets and loses the stored
firmware versions. This causes the firmware versions to be fetched again
from the CSE, which increases the boot time by about 200 ms. This patch
stores a backup of the firmware version in CMOS and updates the CBMEM
memory during a cold reboot.
This patch also removes structure members that are no longer needed
after a CMOS backup.
BUG=b:280722061
Test=Verified the changes on nissa board.
Signed-off-by: Dinesh Gehlot <digehlot(a)google.com>
Change-Id: Ibc5a027aa2bb7217e5032f56fece0846783557a5
---
M src/drivers/intel/ish/ish.c
M src/soc/intel/common/block/cse/cse_lite.c
M src/soc/intel/common/block/include/intelblocks/cse.h
3 files changed, 32 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/75755/6
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Jan Samek has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75049?usp=email )
Change subject: util/docker: Add Alpine Dockerfile
......................................................................
Patch Set 3: Code-Review+2
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Change subject: util/docker: Add Alpine Dockerfile
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS2:
> Not at all :) And setting just this variable doesn't seem to be a big deal.
Then I would be happy about a +2 😄
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Attention is currently required from: Kapil Porwal, Sridhar Siricilla, Subrata Banik.
Hello Kapil Porwal, Sridhar Siricilla, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74995?usp=email
to look at the new patch set (#35).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: soc/intel/cmd/blk/cse: Implement APIs to access FW versions in CMOS
......................................................................
soc/intel/cmd/blk/cse: Implement APIs to access FW versions in CMOS
This patch implements APIs to access the FW versions in CMOS. The get
API allows users to retrieve the current version from CMOS memory.
The set API allows users to set the version in CMOS memory.
BUG=b:280722061
TEST=APIs verified on nivviks and marasov board.
Signed-off-by: Dinesh Gehlot <digehlot(a)google.com>
Change-Id: Idd0ee19575683691c0a82a291e1fd3b2ffb11786
---
M src/soc/intel/common/block/cse/Kconfig
M src/soc/intel/common/block/cse/Makefile.inc
A src/soc/intel/common/block/cse/cse_lite_cmos.c
A src/soc/intel/common/block/include/intelblocks/cse_lite_cmos.h
4 files changed, 185 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/74995/35
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Rui Zhou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75832?usp=email )
Change subject: mb/google/rex/var/screebo: rp2 change to rp1 and rp3
......................................................................
mb/google/rex/var/screebo: rp2 change to rp1 and rp3
change to enable both rp1 and rp3 for TCP1 and TCP3
BUG=b:286187816
BRANCH=none
TEST=emerge-rex coreboot and verify TBT works.
Change-Id: I1013d26c705f2a3f9378d944bd863d94f319d36c
Signed-off-by: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/rex/variants/screebo/overridetree.cb
1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/75832/1
diff --git a/src/mainboard/google/rex/variants/screebo/overridetree.cb b/src/mainboard/google/rex/variants/screebo/overridetree.cb
index bcc592a..bd0e02e 100644
--- a/src/mainboard/google/rex/variants/screebo/overridetree.cb
+++ b/src/mainboard/google/rex/variants/screebo/overridetree.cb
@@ -242,7 +242,8 @@
end
end
device ref tbt_pcie_rp0 on end
- device ref tbt_pcie_rp2 on end
+ device ref tbt_pcie_rp1 on end
+ device ref tbt_pcie_rp3 on end
device ref tcss_xhci on
chip drivers/usb/acpi
device ref tcss_root_hub on
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