coreboot-gerrit June 2023

coreboot-gerrit@coreboot.org

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5387 discussions

[L] Change in coreboot[master]: soc/intel/meteorlake: Add support for crashlog
by Subrata Banik (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Eric Lai, Kane Chen, Kapil Porwal, Paul Menzel, Pratikkumar V Prajapati, Tarun Tuli. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74769?usp=email ) Change subject: soc/intel/meteorlake: Add support for crashlog ...................................................................... Patch Set 23: (1 comment) Patchset: PS23: couple of questions 1. why redundant entries ? is that for soC PMC and IOE PMC? [DEBUG] Region[0x0].Tag=0x7 offset=0x9b, size=0x400 [DEBUG] Region[0x1].Tag=0x0 offset=0xa00, size=0x280 [DEBUG] Region[0x2].Tag=0x0 offset=0x2bb0, size=0xa [DEBUG] Region[0x3].Tag=0x0 offset=0x3a00, size=0x80 [DEBUG] Region[0x4].Tag=0x1 offset=0x780, size=0x280 [DEBUG] Region[0x5].Tag=0x1 offset=0x12d8, size=0xa [DEBUG] Region[0x6].Tag=0x1 offset=0x1600, size=0x6e [DEBUG] Region[0x7].Tag=0x0 offset=0x0, size=0x0 [DEBUG] Region[0x0].Tag=0x7 offset=0x9b, size=0x400 [DEBUG] Region[0x1].Tag=0x0 offset=0xa00, size=0x280 [DEBUG] Region[0x2].Tag=0x0 offset=0x2bb0, size=0xa [DEBUG] Region[0x3].Tag=0x0 offset=0x3a00, size=0x80 [DEBUG] Region[0x4].Tag=0x1 offset=0x780, size=0x280 [DEBUG] Region[0x5].Tag=0x1 offset=0x12d8, size=0xa [DEBUG] Region[0x6].Tag=0x1 offset=0x1600, size=0x6e 2. summation of all PMC crashlog size entries are not matching with below crashlog size. [DEBUG] PMC crashLog size : 0x2808 3. can you please make sure to either use hex or decimal and not the mix example: [DEBUG] cl_data 0x75b4b07c, cpu_record_size 25164 [DEBUG] CPU crash data collection. [DEBUG] cl_data 0x75b51330, pmc_record_size 7208 [DEBUG] PMC crash data collection. [DEBUG] cl_data 0x75b52fc0, ioe_record_size 2600 and crashlog size:pmc-0x1c28, ioe-pmc-0xa28 cpu-0x624c -- To view, visit https://review.coreboot.org/c/coreboot/+/74769?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0abd697fba35edf1c03d2a3a325b7785b985cd5 Gerrit-Change-Number: 74769 Gerrit-PatchSet: 23 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 11:29:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: src/arch/x86/smbios.c: Change smbios_fill_dimm_serial_number function...
by TangYiwei (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Arthur Heymans, Jeff Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nill Ge, Subrata Banik, lichenchen.carl, niehaitao(a)bytedance.com. TangYiwei has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75736?usp=email ) Change subject: src/arch/x86/smbios.c: Change smbios_fill_dimm_serial_number function to weak ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Why not override the information in CBMEM_ID_MEMINFO instead before smbios is created? In this function, the serial number format is fixed. But other formats may be used. -- To view, visit https://review.coreboot.org/c/coreboot/+/75736?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc28a56a577f98a2974407175783e32a1e234f86 Gerrit-Change-Number: 75736 Gerrit-PatchSet: 1 Gerrit-Owner: TangYiwei Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeff Li <lijinfeng01(a)inspur.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-Reviewer: niehaitao(a)bytedance.com Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: niehaitao(a)bytedance.com Gerrit-Attention: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Jeff Li <lijinfeng01(a)inspur.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 11:23:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/docker: Add Alpine Dockerfile
by Felix Singer (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Jan Samek, Martin L Roth. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75049?usp=email ) Change subject: util/docker: Add Alpine Dockerfile ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > Based on the discussion in the bug report, I think we'll need at least the workaround consisting of […] Yeah looks like. Is it blocking though? -- To view, visit https://review.coreboot.org/c/coreboot/+/75049?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If90412146acc94f01a89cd681539aad48e92dd2e Gerrit-Change-Number: 75049 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 11:17:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Jan Samek <jan.samek(a)siemens.com> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/bytedance: Add 2 SPR sockets server board bd_egs
by TangYiwei (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Arthur Heymans, Christian Walter, David Hendricks, Felix Singer, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Nill Ge, Patrick Rudolph, Paul Menzel, niehaitao(a)bytedance.com. TangYiwei has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75722?usp=email ) Change subject: mb/bytedance: Add 2 SPR sockets server board bd_egs ...................................................................... Patch Set 7: (14 comments) File src/mainboard/bytedance/Kconfig: https://review.coreboot.org/c/coreboot/+/75722/comment/0ea2a05b_a0808d5c : PS6, Line 15: config MAINBOARD_FAMILY : default "Family" > This is supposed to be configured in the mainboard Kconfig Done File src/mainboard/bytedance/bd_egs/Kconfig: https://review.coreboot.org/c/coreboot/+/75722/comment/4f3aa1cf_55978cca : PS6, Line 17: string > no need to redefine types, remove Done https://review.coreboot.org/c/coreboot/+/75722/comment/218c4850_3ac35972 : PS6, Line 21: string > remove Done https://review.coreboot.org/c/coreboot/+/75722/comment/b5b1d8d2_9b253489 : PS6, Line 25: string > remove Done https://review.coreboot.org/c/coreboot/+/75722/comment/6ed559f1_66112745 : PS6, Line 29: int > remove Done https://review.coreboot.org/c/coreboot/+/75722/comment/7986a559_a4bdb340 : PS6, Line 33: string > remove Done File src/mainboard/bytedance/bd_egs/bootblock.c: https://review.coreboot.org/c/coreboot/+/75722/comment/6b871830_e6ae457b : PS6, Line 1: /* SPDX-License-Identifier: GPL-2.0-only */ > Some of the files are licensed with GPL-2.0-or-later. […] Done File src/mainboard/bytedance/bd_egs/devicetree.cb: https://review.coreboot.org/c/coreboot/+/75722/comment/0d71ff26_c4aba6a6 : PS6, Line 4: # configure MSR_TURBO_RATIO_LIMIT, MSR_TURBO_RATIO_LIMIT_CORES msrs > Seems superfluous, please remove Done File src/mainboard/bytedance/bd_egs/dsdt.asl: https://review.coreboot.org/c/coreboot/+/75722/comment/2bef6261_7e1d388d : PS6, Line 14: // platform ACPI tables > Seems superfluous, please remove Done https://review.coreboot.org/c/coreboot/+/75722/comment/dc17fd9b_db634f84 : PS6, Line 17: // global NVS and variables > same Done https://review.coreboot.org/c/coreboot/+/75722/comment/0a332657_68133db3 : PS6, Line 22: // SPR-SP ACPI tables > same Done https://review.coreboot.org/c/coreboot/+/75722/comment/1cd9d3cd_f6f82638 : PS6, Line 25: // LPC related entries > same Done File src/mainboard/bytedance/bd_egs/gpio.h: https://review.coreboot.org/c/coreboot/+/75722/comment/72adc840_4f92ec16 : PS6, Line 4: > Missing header guards Done File src/mainboard/bytedance/bd_egs/ramstage.c: https://review.coreboot.org/c/coreboot/+/75722/comment/c88c27ff_8852507a : PS6, Line 8: void mainboard_silicon_init_params(FSPS_UPD *params) : { : } > remove Done -- To view, visit https://review.coreboot.org/c/coreboot/+/75722?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I091bc78e39cd76b3c6b9a10a1fcf58e9d671ef5d Gerrit-Change-Number: 75722 Gerrit-PatchSet: 7 Gerrit-Owner: TangYiwei Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: niehaitao(a)bytedance.com Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: niehaitao(a)bytedance.com Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 11:14:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/bytedance: Add 2 SPR sockets server board bd_egs
by TangYiwei (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Arthur Heymans, Christian Walter, David Hendricks, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Nill Ge, Patrick Rudolph, Paul Menzel, TangYiwei, niehaitao(a)bytedance.com. Hello Arthur Heymans, Christian Walter, David Hendricks, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Nill Ge, Patrick Rudolph, Paul Menzel, build bot (Jenkins), niehaitao(a)bytedance.com, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75722?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Code-Review+1 by Lean Sheng Tan, Verified+1 by build bot (Jenkins) Change subject: mb/bytedance: Add 2 SPR sockets server board bd_egs ...................................................................... mb/bytedance: Add 2 SPR sockets server board bd_egs Bytedance bd_egs is a dual socket MB with Intel Sapphire Rapids Scalable Processor chipset. It's utilising: - 2 SPR sockets - Max 32 DIMMs - 33x CPU PCIe slots - AST2600 for VGA and BMC remote management Test: The board boots to Linux 5.10 with all 192 cores available. All PCIe devices and DIMMS are working. Change-Id: I091bc78e39cd76b3c6b9a10a1fcf58e9d671ef5d Co-authored-by: Jinfeng Li <lijinfeng01(a)ieisystem.com> Co-authored-by: Long Cao <caolong01(a)inspur.com> Co-authored-by: Hao Wang <wanghao11(a)inspur.com> Co-authored-by: Chenyu Lan <lanchenyu(a)inspur.com> Co-authored-by: Lay Kong <lay.kong(a)intel.com> Co-authored-by: Kehong Chen <kehong.chen(a)intel.com> Co-authored-by: Ziang Wang <ziang.wang(a)intel.com> Co-authored-by: Dong Wei <weidong.wd(a)bytedance.com> Co-authored-by: Chenchen Li <lichenchen.carl(a)bytedance.com> Signed-off-by: Yiwei Tang <tangyiwei.2022(a)bytedance.com> Reviewed-by: Haitao Nie<niehaitao(a)bytedance.com> Reviewed-by: Shijian Ge<geshijian(a)bytedance.com> --- A src/mainboard/bytedance/Kconfig A src/mainboard/bytedance/Kconfig.name A src/mainboard/bytedance/bd_egs/Kconfig A src/mainboard/bytedance/bd_egs/Kconfig.name A src/mainboard/bytedance/bd_egs/Makefile.inc A src/mainboard/bytedance/bd_egs/acpi/platform.asl A src/mainboard/bytedance/bd_egs/board.fmd A src/mainboard/bytedance/bd_egs/board_info.txt A src/mainboard/bytedance/bd_egs/bootblock.c A src/mainboard/bytedance/bd_egs/devicetree.cb A src/mainboard/bytedance/bd_egs/dsdt.asl A src/mainboard/bytedance/bd_egs/gpio.c A src/mainboard/bytedance/bd_egs/gpio.h A src/mainboard/bytedance/bd_egs/include/sprsp_bd_iio.h A src/mainboard/bytedance/bd_egs/ramstage.c A src/mainboard/bytedance/bd_egs/romstage.c 16 files changed, 774 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/75722/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/75722?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I091bc78e39cd76b3c6b9a10a1fcf58e9d671ef5d Gerrit-Change-Number: 75722 Gerrit-PatchSet: 7 Gerrit-Owner: TangYiwei Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: niehaitao(a)bytedance.com Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: niehaitao(a)bytedance.com Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: TangYiwei Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: soc/intel/meteorlake: Add support for crashlog
by Subrata Banik (Code Review) 14 Jun '23

14 Jun '23

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[XL] Change in coreboot[master]: vendorcode/intel: Add edk2-stable202302 support
by Subrata Banik (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Arthur Heymans, Felix Singer, Kapil Porwal, Meera Ravindranath, Paul Menzel, Ronak Kanabar, Tarun Tuli. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75663?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: vendorcode/intel: Add edk2-stable202302 support ...................................................................... Patch Set 6: (1 comment) Patchset: PS4: > https://review.coreboot.org/c/coreboot/+/75817 Thanks, I'll give a try today and get back. -- To view, visit https://review.coreboot.org/c/coreboot/+/75663?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8d4deab0bd1d2c6df28e067894875b80413cd905 Gerrit-Change-Number: 75663 Gerrit-PatchSet: 6 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 10:50:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/docker: Add Alpine Dockerfile
by Jan Samek (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Felix Singer, Martin L Roth. Jan Samek has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75049?usp=email ) Change subject: util/docker: Add Alpine Dockerfile ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > Created a bug ticket: https://gitlab.alpinelinux. […] Based on the discussion in the bug report, I think we'll need at least the workaround consisting of `TOOLLDFLAGS=-no-pie` as this seems to be a tough problem to crack - there's probably gcc/binutils together with musl in play. Nevertheless not giving up to find the root cause. -- To view, visit https://review.coreboot.org/c/coreboot/+/75049?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If90412146acc94f01a89cd681539aad48e92dd2e Gerrit-Change-Number: 75049 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 10:42:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Jan Samek <jan.samek(a)siemens.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: arch/x86: Introduce DUMP_SMBIOS_TYPE17 config
by Subrata Banik (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Arthur Heymans, Eric Lai, Paul Menzel, Tarun Tuli. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75756?usp=email ) Change subject: arch/x86: Introduce DUMP_SMBIOS_TYPE17 config ...................................................................... Patch Set 11: (2 comments) File src/arch/x86/smbios.c: https://review.coreboot.org/c/coreboot/+/75756/comment/b0233983_d215555c : PS9, Line 226: /* skip old type for save static memory : "Other", : "Unknown", : "DRAM", : "EDRAM", : "VRAM", : "SRAM", : "RAM", : "ROM", : "Flash", : "EEPROM", : "FEPROM", : "EPROM", : "CDRAM", : "3DRAM", : "SDRAM", : "SGRAM", : "RDRAM", : "DDR", : "DDR2", : "DDR2 FB-DIMM", : "Reserved", : "Reserved", : "Reserved", : "DDR3", : "FBD2", : */ > I change the wording. may be i'm missing the point why you don't want to mention the older memory technology? those are not relevant today ? File src/arch/x86/smbios.c: https://review.coreboot.org/c/coreboot/+/75756/comment/ca9eab78_93ce7665 : PS11, Line 268: below MEMORY_TYPE_DDR4 or exceed MEMORY_TYPE_HBM3 don't kw if this statement is valuable -- To view, visit https://review.coreboot.org/c/coreboot/+/75756?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2b5ca1f4a59598531a6cba500672c2717f2a7b00 Gerrit-Change-Number: 75756 Gerrit-PatchSet: 11 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 10:15:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel: Add max memory speed into dimm info
by Subrata Banik (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Arthur Heymans, Christian Walter, Eric Lai, Felix Singer, Johnny Lin, Kapil Porwal, Sean Rhodes, Tarun Tuli, Tim Chu, Werner Zeh. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75810?usp=email ) Change subject: soc/intel: Add max memory speed into dimm info ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75810?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I854474bce8d6ed02f47f6dce8585b3ddfae73f80 Gerrit-Change-Number: 75810 Gerrit-PatchSet: 4 Gerrit-Owner: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 10:13:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit June 2023