coreboot-gerrit June 2023

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[M] Change in coreboot[master]: soc/intel/cmd/blk/cse: Cache CSE version in CMOS memory for cold boots
by Dinesh Gehlot (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Kapil Porwal, Sridhar Siricilla, Subrata Banik. Hello Kapil Porwal, Sridhar Siricilla, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74995?usp=email to look at the new patch set (#32). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/cmd/blk/cse: Cache CSE version in CMOS memory for cold boots ...................................................................... soc/intel/cmd/blk/cse: Cache CSE version in CMOS memory for cold boots This patch changes where the CSE version is stored. Previously, it was stored in volatile CBMEM memory, which resets during a cold reboot. Now, it is stored in persistent CMOS memory, which does not reset during a cold reboot. The CSE version is used to determine if the ISH version needs to be updated. If the CSE version is changed, then the ISH version will be updated. This change will improve the performance of cold reboots, because the ISH version will only be fetched when it is necessary. The cold boot performance is increased by around ~200ms. BUG=b:280722061 TEST=CSE and ISH version verified on nivviks and marasov board. Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> Change-Id: Idd0ee19575683691c0a82a291e1fd3b2ffb11786 --- M src/soc/intel/common/block/cse/Kconfig M src/soc/intel/common/block/cse/Makefile.inc A src/soc/intel/common/block/cse/cse_lite_cmos.c A src/soc/intel/common/block/include/intelblocks/cse_lite_cmos.h 4 files changed, 188 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/74995/32 -- To view, visit https://review.coreboot.org/c/coreboot/+/74995?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd0ee19575683691c0a82a291e1fd3b2ffb11786 Gerrit-Change-Number: 74995 Gerrit-PatchSet: 32 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/common: Introduce configs for TME exclusion range and new k...
by Subrata Banik (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Paul Menzel, Pratikkumar V Prajapati. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75625?usp=email ) Change subject: soc/intel/common: Introduce configs for TME exclusion range and new key generation ...................................................................... Patch Set 4: (13 comments) File src/soc/intel/common/block/cpu/Kconfig: https://review.coreboot.org/c/coreboot/+/75625/comment/89a6b786_5bd4213f : PS4, Line 146: reboot boot https://review.coreboot.org/c/coreboot/+/75625/comment/0275b237_4ff85541 : PS4, Line 150: reboot boot https://review.coreboot.org/c/coreboot/+/75625/comment/f2424ebd_68fb6077 : PS4, Line 151: reboot boot https://review.coreboot.org/c/coreboot/+/75625/comment/79e9abc1_5f1830dd : PS4, Line 152: reboot same https://review.coreboot.org/c/coreboot/+/75625/comment/aa869922_540cdb4a : PS4, Line 153: reboot same https://review.coreboot.org/c/coreboot/+/75625/comment/f769b98a_356adfd5 : PS4, Line 160: CBMEM not: this option allow to exclude the CBMEM region from being encrypted by the Intel TME. https://review.coreboot.org/c/coreboot/+/75625/comment/835e0d47_ad258cde : PS4, Line 166: reboot boot https://review.coreboot.org/c/coreboot/+/75625/comment/a4a9d8dc_5ab253e7 : PS4, Line 168: reboot boot https://review.coreboot.org/c/coreboot/+/75625/comment/ca90cbba_a32e9e00 : PS4, Line 169: and hence, https://review.coreboot.org/c/coreboot/+/75625/comment/86f50304_56515555 : PS4, Line 169: reboot boot https://review.coreboot.org/c/coreboot/+/75625/comment/8ccc39e7_96fd4ee0 : PS4, Line 171: CBMEM CBMEM region https://review.coreboot.org/c/coreboot/+/75625/comment/32a2160a_8d7a588c : PS4, Line 172: in warm reboot case also. nit: can be accessible irrespective of the type of the platform reset. https://review.coreboot.org/c/coreboot/+/75625/comment/cf216f31_fef27058 : PS4, Line 172: reboot boot -- To view, visit https://review.coreboot.org/c/coreboot/+/75625?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5008fee07b97faadc7dd585f445295425173782 Gerrit-Change-Number: 75625 Gerrit-PatchSet: 4 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 08:59:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/rex: LZ4 compress ramstage instead of LZMA
by Subrata Banik (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Jamie Ryu, Kapil Porwal, Paul Menzel, Raj Astekar, Tarun Tuli, Wonkyu Kim. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75769?usp=email ) Change subject: mb/google/rex: LZ4 compress ramstage instead of LZMA ...................................................................... Patch Set 5: (1 comment) Patchset: PS4: > > `dev` build is failing due to insufficient size. @Kapil, can u specify which build command is failing. I tried the release and debug build it's working fine. additionally, tried to enable the `FW_CONSOLE` using use flag, still don't see any issue. -- To view, visit https://review.coreboot.org/c/coreboot/+/75769?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6610f405d287bff2eb4eee6f09026e3361405ded Gerrit-Change-Number: 75769 Gerrit-PatchSet: 5 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 08:53:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: soc/intel/meteorlake: Add support for crashlog
by Subrata Banik (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Eric Lai, Kane Chen, Kapil Porwal, Paul Menzel, Pratikkumar V Prajapati, Tarun Tuli. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74769?usp=email ) Change subject: soc/intel/meteorlake: Add support for crashlog ...................................................................... Patch Set 23: (1 comment) File src/soc/intel/meteorlake/include/soc/pci_devs.h: https://review.coreboot.org/c/coreboot/+/74769/comment/c2070ecf_af361d6d : PS23, Line 63: TMT I don't believe TMT is a good short form of `telemetry` PCI_DEV_SLOT_TELEMETRY -- To view, visit https://review.coreboot.org/c/coreboot/+/74769?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib0abd697fba35edf1c03d2a3a325b7785b985cd5 Gerrit-Change-Number: 74769 Gerrit-PatchSet: 23 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 08:52:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: src/soc/intel/meteorlake: disable acpi timer for xtal shutdown
by Subrata Banik (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Kapil Porwal, Sukumar Ghorai, Tarun Tuli. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75814?usp=email ) Change subject: src/soc/intel/meteorlake: disable acpi timer for xtal shutdown ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/meteorlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/75814/comment/05d5449a_bf10d52d : PS1, Line 619: 0 > we don't need to set this UPD. fixing typo, we don't need to `reset` this UPD. > > Let me explain the reason why we have set this UPD. > > ``` > - Without this UPD being set, the FSP would expect to perform below operations > - disable the TCO timer > - enable the microcode emulation timer > ``` > > we wanted to skip FSP-S doing those two operations hence, we have set this UPD to 1. > > 1. disable the TCO timer: After control reaches the coreboot post FSP-S, we have disabled the TCO timer using below code > https://github.com/coreboot/coreboot/blob/master/src/soc/intel/meteorlake/p… > > kindly dump PMC MMIO + offset 0x18FC and check if BIT 1 is set. This will ensure that we are disabling the TCO timer. > > 2. Enabling ucode emulation timer using https://github.com/coreboot/coreboot/blob/master/src/soc/intel/common/block… > > hence, i don't believe the TCO timer is actually enabled. take a look into below output > > ``` > localhost ~ # iotools mmio_read32 0xfe0018fc > 0x00000002 > ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/75814?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b5f8f6647364d967ed96c45fe5a9d55fdc8a2c7 Gerrit-Change-Number: 75814 Gerrit-PatchSet: 1 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 08:46:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: src/soc/intel/meteorlake: disable acpi timer for xtal shutdown
by Subrata Banik (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Kapil Porwal, Sukumar Ghorai, Tarun Tuli. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75814?usp=email ) Change subject: src/soc/intel/meteorlake: disable acpi timer for xtal shutdown ...................................................................... Patch Set 1: Code-Review-1 (1 comment) File src/soc/intel/meteorlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/75814/comment/fe385f27_517a4492 : PS1, Line 619: 0 we don't need to set this UPD. Let me explain the reason why we have set this UPD. ``` - Without this UPD being set, the FSP would expect to perform below operations - disable the TCO timer - enable the microcode emulation timer ``` we wanted to skip FSP-S doing those two operations hence, we have set this UPD to 1. 1. disable the TCO timer: After control reaches the coreboot post FSP-S, we have disabled the TCO timer using below code https://github.com/coreboot/coreboot/blob/master/src/soc/intel/meteorlake/p… kindly dump PMC MMIO + offset 0x18FC and check if BIT 1 is set. This will ensure that we are disabling the TCO timer. 2. Enabling ucode emulation timer using https://github.com/coreboot/coreboot/blob/master/src/soc/intel/common/block… hence, i don't believe the TCO timer is actually enabled. take a look into below output ``` localhost ~ # iotools mmio_read32 0xfe0018fc 0x00000002 ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/75814?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b5f8f6647364d967ed96c45fe5a9d55fdc8a2c7 Gerrit-Change-Number: 75814 Gerrit-PatchSet: 1 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 08:45:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/nissa/var/joxer: Add DmaProperty for ISH
by Eric Lai (Code Review) 14 Jun '23

14 Jun '23

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75758?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/nissa/var/joxer: Add DmaProperty for ISH ...................................................................... mb/google/nissa/var/joxer: Add DmaProperty for ISH On nissa, the ISH is running closed source firmware, so the ChromeOS security requirements specify it must be behind an IOMMU. Add DmaProperty to the ISH _DSD on joxer. BUG=b:285477026 TEST=Kernel marks ISH (PCI device 12.0) as untrusted, and changes the IOMMU group type to "DMA". Also, device still goes to S0i3. Before: $ cat /sys/devices/pci0000\:00/0000\:00\:12.0/untrusted 0 $ ls /sys/kernel/iommu_groups/5/devices 0000:00:12.0 0000:00:12.7 $ cat /sys/kernel/iommu_groups/5/type DMA-FQ After: $ cat /sys/devices/pci0000\:00/0000\:00\:12.0/untrusted 1 $ ls /sys/kernel/iommu_groups/5/devices 0000:00:12.0 0000:00:12.7 $ cat /sys/kernel/iommu_groups/5/type DMA Signed-off-by: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Change-Id: I69b00f0281f4493db157783840d9cdcbb138017f Reviewed-on: https://review.coreboot.org/c/coreboot/+/75758 Reviewed-by: Derek Huang <derekhuang(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/joxer/overridetree.cb 1 file changed, 6 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Derek Huang: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/joxer/overridetree.cb b/src/mainboard/google/brya/variants/joxer/overridetree.cb index 59a9fdd..e591b13 100644 --- a/src/mainboard/google/brya/variants/joxer/overridetree.cb +++ b/src/mainboard/google/brya/variants/joxer/overridetree.cb @@ -197,7 +197,12 @@ end device ref pcie_rp7 off end # PCIE7 no SD card device ref emmc on end - device ref ish on end + device ref ish on + chip drivers/intel/ish + register "add_acpi_dma_property" = "true" + device generic 0 on end + end + end device ref ufs on end device ref pch_espi on chip ec/google/chromeec -- To view, visit https://review.coreboot.org/c/coreboot/+/75758?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69b00f0281f4493db157783840d9cdcbb138017f Gerrit-Change-Number: 75758 Gerrit-PatchSet: 3 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: mb/google/nissa/var/joxer: Add DmaProperty for ISH
by Mark Hsieh (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Eric Lai, Felix Held, Henry Sun, Sam McNally, Shou-Chieh Hsu, Tarun Tuli. Mark Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75758?usp=email ) Change subject: mb/google/nissa/var/joxer: Add DmaProperty for ISH ...................................................................... Patch Set 2: (1 comment) Patchset: PS1: > try rebase than I'll submit Rebased, Please help to submit, thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/75758?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69b00f0281f4493db157783840d9cdcbb138017f Gerrit-Change-Number: 75758 Gerrit-PatchSet: 2 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 14 Jun 2023 08:24:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: drivers/intel/fsp2_0: Correct FPDT timestamp unit and macro name
by Ronak Kanabar (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Andrey Petrov, Himanshu Sahdev, Jamie Ryu, Pratikkumar V Prajapati, Subrata Banik, Wonkyu Kim. Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75816?usp=email ) Change subject: drivers/intel/fsp2_0: Correct FPDT timestamp unit and macro name ...................................................................... Patch Set 3: (1 comment) File src/drivers/intel/fsp2_0/fsp_timestamp.c: https://review.coreboot.org/c/coreboot/+/75816/comment/1fe6aa32_57404e66 : PS2, Line 56: TIMESTAMP_MS > Thanks for clarification, better update in commit message: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/75816?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4aec4f63beddbd7ce6e8e3fc1b53a45da2ee0b00 Gerrit-Change-Number: 75816 Gerrit-PatchSet: 3 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Wed, 14 Jun 2023 08:22:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Comment-In-Reply-To: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: drivers/intel/fsp2_0: Correct FPDT timestamp unit and macro name
by Ronak Kanabar (Code Review) 14 Jun '23

14 Jun '23

Attention is currently required from: Andrey Petrov, Jamie Ryu, Pratikkumar V Prajapati, Ronak Kanabar, Subrata Banik, Wonkyu Kim. Hello Andrey Petrov, Jamie Ryu, Pratikkumar V Prajapati, Sridhar Siricilla, Subrata Banik, Wonkyu Kim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75816?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Jamie Ryu, Verified+1 by build bot (Jenkins) Change subject: drivers/intel/fsp2_0: Correct FPDT timestamp unit and macro name ...................................................................... drivers/intel/fsp2_0: Correct FPDT timestamp unit and macro name FSP performance timestamp is in nano second by default. This patch is to correct unit in FSP performance timestamp data print and macro name to avoid confusion. Change-Id: I4aec4f63beddbd7ce6e8e3fc1b53a45da2ee0b00 Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/drivers/intel/fsp2_0/fsp_timestamp.c 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/75816/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/75816?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4aec4f63beddbd7ce6e8e3fc1b53a45da2ee0b00 Gerrit-Change-Number: 75816 Gerrit-PatchSet: 3 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit June 2023