coreboot-gerrit June 2023

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[S] Change in coreboot[master]: soc/intel/apollolake: Fix FSP SATA speed limit configuraion
by Werner Zeh (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Eric Lai, Felix Singer, Jan Samek, Mario Scheithauer, Sean Rhodes. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75820?usp=email ) Change subject: soc/intel/apollolake: Fix FSP SATA speed limit configuraion ...................................................................... Patch Set 8: Code-Review+1 (2 comments) Patchset: PS7: > Oh wow. […] There can be hardware related topics on the PCB (layout, signal quality, ...) which can enforce one to step back to a lower speed grade than the maximum supported by both endpoints to guarantee a proper operation of the link in all circumstances. Since in some applications (which our case belongs to) the real data throughput an SSD device can provide is much more lower that the theoretical throughput of the SATA interface, there is no real point in having the higher speed grade enabled because it in the end will not provide a higher bandwidth. And in this cases it is better to get a reliable link by reducing the SATA speed grade. File src/soc/intel/apollolake/ahci.c: https://review.coreboot.org/c/coreboot/+/75820/comment/d3db37ac_779d4447 : PS7, Line 12: if (speed == SATA_DEFAULT) : > Done This was added in order to keep the interference with existing code as low as possible. When a mainboard does not provide the parameter in the devicetree nothing is changed and the behavior stays as it was. -- To view, visit https://review.coreboot.org/c/coreboot/+/75820?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f55f40941fa618e7de13a5cefe9e17ae34c5c99 Gerrit-Change-Number: 75820 Gerrit-PatchSet: 8 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-Comment-Date: Fri, 16 Jun 2023 06:21:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/joxer: enable ELAN and G2touch touchscreen
by Eric Lai (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Derek Huang, Felix Held, Henry Sun, Mark Hsieh, Sam McNally, Shou-Chieh Hsu, Tarun Tuli. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75762?usp=email ) Change subject: mb/google/nissa/var/joxer: enable ELAN and G2touch touchscreen ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > Could you help to share the sample code for reference? thanks. Like this https://review.coreboot.org/c/coreboot/+/74835, or you can just set C1 to high. -- To view, visit https://review.coreboot.org/c/coreboot/+/75762?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I236a2815f956929c6cd84c981cb15e9ab0f657b7 Gerrit-Change-Number: 75762 Gerrit-PatchSet: 3 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 16 Jun 2023 06:15:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/apollolake: Fix FSP SATA speed limit configuraion
by Felix Singer (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Eric Lai, Jan Samek, Mario Scheithauer, Sean Rhodes, Werner Zeh. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75820?usp=email ) Change subject: soc/intel/apollolake: Fix FSP SATA speed limit configuraion ...................................................................... Patch Set 8: (1 comment) Patchset: PS7: > The signal quality was measured with an oscilloscope and it was found that our boards are at the per […] Oh wow. I am just wondering, why would one configure a lower speed and not the maximum? -- To view, visit https://review.coreboot.org/c/coreboot/+/75820?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f55f40941fa618e7de13a5cefe9e17ae34c5c99 Gerrit-Change-Number: 75820 Gerrit-PatchSet: 8 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-Comment-Date: Fri, 16 Jun 2023 06:03:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/apollolake: Fix FSP SATA speed limit configuraion
by Mario Scheithauer (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Eric Lai, Felix Singer, Jan Samek, Sean Rhodes, Werner Zeh. Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75820?usp=email ) Change subject: soc/intel/apollolake: Fix FSP SATA speed limit configuraion ...................................................................... Patch Set 8: (3 comments) Patchset: PS7: > Is there anything on which the SATA speed depends on or what could limit it? The signal quality was measured with an oscilloscope and it was found that our boards are at the permissible limit with Gen 3. To be on the safe side, it was decided to switch to the next lower speed. File src/soc/intel/apollolake/ahci.c: https://review.coreboot.org/c/coreboot/+/75820/comment/6f3010c8_0ff5cc4c : PS7, Line 12: if (speed == SATA_DEFAULT) : > nit: I wouldn't care about default values and just write the bits in any case. Done File src/soc/intel/apollolake/include/soc/ahci.h: https://review.coreboot.org/c/coreboot/+/75820/comment/bbb13ec4_2376a701 : PS7, Line 11: 0x00F00000 > make it lowercase Done -- To view, visit https://review.coreboot.org/c/coreboot/+/75820?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f55f40941fa618e7de13a5cefe9e17ae34c5c99 Gerrit-Change-Number: 75820 Gerrit-PatchSet: 8 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-Comment-Date: Fri, 16 Jun 2023 05:58:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/nissa/var/joxer: enable ELAN and G2touch touchscreen
by Mark Hsieh (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Derek Huang, Eric Lai, Felix Held, Henry Sun, Sam McNally, Shou-Chieh Hsu, Tarun Tuli. Mark Hsieh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75762?usp=email ) Change subject: mb/google/nissa/var/joxer: enable ELAN and G2touch touchscreen ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > yes, this is why I said you should power the touch and de-assert the RST in coreboot. Could you help to share the sample code for reference? thanks. -- To view, visit https://review.coreboot.org/c/coreboot/+/75762?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I236a2815f956929c6cd84c981cb15e9ab0f657b7 Gerrit-Change-Number: 75762 Gerrit-PatchSet: 3 Gerrit-Owner: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-CC: Terry Chen <terry_chen(a)wistron.corp-partner.google.com> Gerrit-CC: Zoey Wu <zoey_wu(a)wistron.corp-partner.google.com> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 16 Jun 2023 05:58:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Comment-In-Reply-To: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/apollolake: Fix FSP SATA speed limit configuraion
by Mario Scheithauer (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Eric Lai, Jan Samek, Mario Scheithauer, Sean Rhodes, Werner Zeh. Hello Eric Lai, Felix Singer, Jan Samek, Sean Rhodes, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75820?usp=email to look at the new patch set (#8). The following approvals got outdated and were removed: Code-Review+1 by Eric Lai, Code-Review+1 by Jan Samek, Verified+1 by build bot (Jenkins) Change subject: soc/intel/apollolake: Fix FSP SATA speed limit configuraion ...................................................................... soc/intel/apollolake: Fix FSP SATA speed limit configuraion With commit f165bbdcf043 ("soc/intel/apollolake: Make SATA speed limit configurable") came the expansion to adjust the SATA speed. Unfortunately, APL FSP-S sets only the default value, so Gen 3, and ignores the passing parameter value. Since the corresponding register entry can only be changed once, the setting must be made on coreboot side before FSP-S is called. This patch fixes the SATA speed configuration for Apollo Lake CPUs. Link to Intel Pentium and Celeron N- and J- series datasheet volume 2: https://web.archive.org/web/20230614130311/https://www.intel.com/content/ww… BUG=none TEST=Boot into Linux and check SATA configuration via dmesg ahci 0000:00:12.0: AHCI 0001.0301 32 slots 1 ports 3 Gbps 0x1 impl SATA mode ata1: SATA max UDMA/133 abar m2048@0x9872a000 port 0x9872a100 irq 126 ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300) Change-Id: I6f55f40941fa618e7de13a5cefe9e17ae34c5c99 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/soc/intel/apollolake/Makefile.inc A src/soc/intel/apollolake/ahci.c M src/soc/intel/apollolake/chip.c A src/soc/intel/apollolake/include/soc/ahci.h 4 files changed, 45 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/75820/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/75820?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f55f40941fa618e7de13a5cefe9e17ae34c5c99 Gerrit-Change-Number: 75820 Gerrit-PatchSet: 8 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: doc/Makefile: Fix build dir setting
by Felix Singer (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Elyes Haouas, Felix Held, Jan Samek, Martin L Roth, Nico Huber. Hello Elyes Haouas, Felix Held, Jan Samek, Martin L Roth, Nicholas Chin, Nico Huber, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75893?usp=email to look at the new patch set (#4). Change subject: doc/Makefile: Fix build dir setting ...................................................................... doc/Makefile: Fix build dir setting The commit 4d8da8ed ("Docs: Update sphinx targets with the build directory") introduces an additional variable intending to allow an user to specify a different build directory. Since the variable is not writable from the outside and also the Docker container used to build doc.coreboot.org calls the Makefile with `BUILDDIR` instead of `SPHINXDIR`, building the documentation within the container doesn't work anymore. Thus, change the variable name to `BUILDDIR` and make it writable. Steps to reproduce: cd util/docker make doc.coreboot.org make docker-build-docs Change-Id: Ibc44134cf1996592597252aeb9dcf7ffb3378ee3 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M Documentation/Makefile 1 file changed, 8 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/75893/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/75893?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc44134cf1996592597252aeb9dcf7ffb3378ee3 Gerrit-Change-Number: 75893 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: doc/Makefile: Fix build dir setting
by Felix Singer (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Elyes Haouas, Felix Held, Jan Samek, Martin L Roth, Nico Huber. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75893?usp=email ) Change subject: doc/Makefile: Fix build dir setting ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: I would like to submit this early so that the documentation site is updated again. So I am looking for 2 more reviews. -- To view, visit https://review.coreboot.org/c/coreboot/+/75893?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc44134cf1996592597252aeb9dcf7ffb3378ee3 Gerrit-Change-Number: 75893 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Fri, 16 Jun 2023 05:23:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: doc/Makefile: Fix build dir setting
by Felix Singer (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Felix Singer. Hello Nicholas Chin, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75893?usp=email to look at the new patch set (#3). Change subject: doc/Makefile: Fix build dir setting ...................................................................... doc/Makefile: Fix build dir setting The commit 4d8da8ed ("Docs: Update sphinx targets with the build directory") introduces an additional variable intending to allow an user to specify a different build directory. Since the variable is not writable from the outside and also the Docker container used to build doc.coreboot.org calls the Makefile with `BUILDDIR` instead of `SPHINXDIR`, building the documentation within the container doesn't work anymore. Thus, change the variable name to `BUILDDIR` and make it writable. Change-Id: Ibc44134cf1996592597252aeb9dcf7ffb3378ee3 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M Documentation/Makefile 1 file changed, 8 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/75893/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/75893?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc44134cf1996592597252aeb9dcf7ffb3378ee3 Gerrit-Change-Number: 75893 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: doc/Makefile: Fix build dir setting
by Nicholas Chin (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Felix Singer. Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75893?usp=email ) Change subject: doc/Makefile: Fix build dir setting ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75893?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc44134cf1996592597252aeb9dcf7ffb3378ee3 Gerrit-Change-Number: 75893 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Comment-Date: Fri, 16 Jun 2023 05:02:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit June 2023