coreboot-gerrit June 2023

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[XS] Change in coreboot[master]: drivers/intel/fsp2_0: Correct FPDT timestamp unit and macro name
by Subrata Banik (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Andrey Petrov, Himanshu Sahdev, Jamie Ryu, Pratikkumar V Prajapati, Ronak Kanabar, Subrata Banik, Wonkyu Kim. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75816?usp=email ) Change subject: drivers/intel/fsp2_0: Correct FPDT timestamp unit and macro name ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/75816?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4aec4f63beddbd7ce6e8e3fc1b53a45da2ee0b00 Gerrit-Change-Number: 75816 Gerrit-PatchSet: 3 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Himanshu Sahdev <himanshu.sahdev(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Fri, 16 Jun 2023 09:35:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: {driver, soc}: Remove unused CBMEM structure members for fw versions
by Subrata Banik (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Dinesh Gehlot. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75890?usp=email ) Change subject: {driver, soc}: Remove unused CBMEM structure members for fw versions ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/include/intelblocks/cse.h: https://review.coreboot.org/c/coreboot/+/75890/comment/677cc0d5_a6f9b216 : PS2, Line 151: CSE and ISH version ```/* CSE FW Partition Table Version entries based on `enum cse_fpt_fw_type` */``` -- To view, visit https://review.coreboot.org/c/coreboot/+/75890?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3824b6429d2c665dd84da9b69ae4bd82ddde10b2 Gerrit-Change-Number: 75890 Gerrit-PatchSet: 2 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Comment-Date: Fri, 16 Jun 2023 09:15:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: intelblocks/pep: Restrict TBT displays (DPOF) on S0ix transition to FWCM
by Usha P (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Balaji Manigandan, Felix Singer, Hannah Williams, Jamie Ryu, Paul Menzel, Subrata Banik, Tarun Tuli, Utkarsh H Patel, Utkarsh H Patel, Vikrant Jadeja. Hello Balaji Manigandan, Hannah Williams, Jamie Ryu, Subrata Banik, Tarun Tuli, Utkarsh H Patel, Utkarsh H Patel, Vikrant Jadeja, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75717?usp=email to look at the new patch set (#5). Change subject: intelblocks/pep: Restrict TBT displays (DPOF) on S0ix transition to FWCM ...................................................................... intelblocks/pep: Restrict TBT displays (DPOF) on S0ix transition to FWCM IOM needs to be notified about DPOF (TBT Displays OFF) only when Firmware Connection Manager is in use during S0ix Entry/Exit. TEST= Build and boot Rex Proto-1. Verify S0ix working. Signed-off-by: Usha P <usha.p(a)intel.com> Change-Id: I110fb971846f110e7d93a524ceda3bf4bfc15c13 --- M src/soc/intel/common/block/acpi/pep.c 1 file changed, 10 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/75717/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/75717?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I110fb971846f110e7d93a524ceda3bf4bfc15c13 Gerrit-Change-Number: 75717 Gerrit-PatchSet: 5 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Reviewer: Vikrant Jadeja Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Vikrant Jadeja Gerrit-Attention: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/intel/cmd/blk/cse: Store fw versions in CMOS memory for cold boot
by Subrata Banik (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Dinesh Gehlot. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75755?usp=email ) Change subject: soc/intel/cmd/blk/cse: Store fw versions in CMOS memory for cold boot ...................................................................... Patch Set 9: (7 comments) File src/soc/intel/common/block/cse/cse_lite.c: https://review.coreboot.org/c/coreboot/+/75755/comment/f52f7cc2_19f37272 : PS9, Line 137: static bool is_cse_fw_updated, is_cold_boot; use a structure with two member variable (if needed) https://review.coreboot.org/c/coreboot/+/75755/comment/e3a6d9a9_0d08b6bf : PS9, Line 1205: /* cse has been updated*/ space? https://review.coreboot.org/c/coreboot/+/75755/comment/b3e14381_e0956ca2 : PS9, Line 1207: /* write cse rw fw version to CMOS and CBMEM */ ``` /* write cse rw fw version to CMOS */ set_cmos_cse_rw_fw_version(&(cse_bp->fw_ver)); /* write cse rw fw version to CBMEM */ memcpy(&(version->cur_cse_fw_version), &(cse_bp->fw_ver), size); ``` https://review.coreboot.org/c/coreboot/+/75755/comment/ad460203_020e189c : PS9, Line 1211: /* Current running CSE version is same as previous stored CSE version */ ``` /* Check if current running CSE version is same as previous stored CSE version aka CBMEM region is still valid */ ``` https://review.coreboot.org/c/coreboot/+/75755/comment/53496c0c_e0a7b1f8 : PS9, Line 1218: memcpy(&(version->cur_cse_fw_version), &(cse_bp->fw_ver), size); can we do something like this at line#1220 (outside loop) and drop this line here and from 1209 as well? ``` if (is_cold_boot || is_cse_fw_updated) memcpy(&(version->cur_cse_fw_version), &(cse_bp->fw_ver), size); ``` https://review.coreboot.org/c/coreboot/+/75755/comment/60e539cc_efe0ce13 : PS9, Line 1306: set_cmos_ish_version(&(resp.manifest_data.version)); : memcpy(&(version->ish_partition_info.cur_ish_fw_version), : &(resp.manifest_data.version), size); ``` /* write ISH rw fw version to CMOS */ set_cmos_ish_version(&(resp.manifest_data.version)); /* write ISH rw fw version to CBMEM */ memcpy(&(version->ish_partition_info.cur_ish_fw_version), &(resp.manifest_data.version), size); ``` https://review.coreboot.org/c/coreboot/+/75755/comment/59a2a190_33106cf7 : PS9, Line 1311: /* : * The CBMEM was reset during cold reboot, so the ISH version in CBMEM : * needs to be updated to the version stored in CMOS. : */ ``` /* * The CBMEM was reset during cold reboot, so the ISH version in CBMEM * needs to be updated based on CMOS entry. */ ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/75755?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc5a027aa2bb7217e5032f56fece0846783557a5 Gerrit-Change-Number: 75755 Gerrit-PatchSet: 9 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Comment-Date: Fri, 16 Jun 2023 09:12:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/intel/cmd/blk/cse: Implement APIs to access FW versions in CMOS
by Subrata Banik (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Dinesh Gehlot, Sridhar Siricilla. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74995?usp=email ) Change subject: soc/intel/cmd/blk/cse: Implement APIs to access FW versions in CMOS ...................................................................... Patch Set 38: (8 comments) File src/soc/intel/common/block/cse/cse_lite_cmos.c: https://review.coreboot.org/c/coreboot/+/74995/comment/be1773f9_0bb236c2 : PS38, Line 49: read_cmos_partition_version cmos_read_parition_version https://review.coreboot.org/c/coreboot/+/74995/comment/3d7a86e3_f52d9c74 : PS38, Line 75: write_cmos_partition_version start with cmos https://review.coreboot.org/c/coreboot/+/74995/comment/f24e0d02_70d74978 : PS38, Line 89: u8 i, *p, offset = PARTITION_FW_CMOS_OFFSET; please give one line break https://review.coreboot.org/c/coreboot/+/74995/comment/188c1add_fc672785 : PS38, Line 102: struct cse_fw_table version; same https://review.coreboot.org/c/coreboot/+/74995/comment/da50c202_26486cf4 : PS38, Line 103: if (read_cmos_partition_version(&version)) { : /* : * CMOS failed to read the CSE version. This may be because the firmware version at : * cmos has not yet been initialized. : */ : init_cmos_partition_version(&version); : } can we create a helper function? ``` static bool cmos_get_cse_fpt_data(struct cse_fw_table *data) { if (data == NULL) return false; /* * CMOS failed to read the CSE version. This may be because the firmware version at * cmos has not yet been initialized. */ if (read_cmos_partition_version(&data)) init_cmos_partition_version(&data); return true; } ``` ``` enum cse_fpt_fw_type { CSE_RW_FW, ISH_FW, MAX_SUPPORTED_TYPE, }; /* Helper function that allows users to read fw version stored from CMOS memory depending on the cse_fw_type */ static void cmos_read_cse_fpt_fw_version(enum cse_fpt_fw_type fw_type, struct fw_version *fw_version) { struct cse_fw_table data; if (!cmos_get_cse_fpt_data(&data)) return; switch (fw_type) { case CSE_RW_FW: memcpy(fw_version, &data.cse_version, sizeof(struct fw_version)); break; case ISH_FW: memcpy(fw_version, &data.ish_version, sizeof(struct fw_version)); break; default: // add some error msg as unsupported type } } ``` ``` /* Helper function that allows users to write fw version stored into CMOS memory depending on the cse_fw_type */ static void cmos_write_cse_fpt_fw_version(enum cse_fpt_fw_type fw_type, struct fw_version *fw_version) { struct cse_fw_table data; if (!cmos_get_cse_fpt_data(&data)) return; switch (fw_type) { case CSE_RW_FW: memcpy(&data.cse_version, fw_version, sizeof(struct fw_version)); break; case ISH_FW: memcpy(&data.ish_version, fw_version, sizeof(struct fw_version)); break; default: // add some error msg as unsupported type } write_cmos_partition_version(&data); } ``` ``` /* API that allows users to read CSE version stored in CMOS memory. */ void cmos_get_cse_rw_fw_version(struct fw_version *cse_version) { return cmos_read_cse_fpt_fw_version(CSE_RW_FW, cse_version); } ``` ``` /* API that allows users to write CSE version stored from CMOS memory. */ void cmos_set_cse_rw_fw_version(struct fw_version *cse_version) { return cmos_write_cse_fpt_fw_version(CSE_RW_FW, cse_version); } ``` Similarly for ISH ? https://review.coreboot.org/c/coreboot/+/74995/comment/7e653a60_ee8cb6fd : PS38, Line 116: struct cse_fw_table version; : if (read_cmos_partition_version(&version)) { : /* : * CMOS failed to read the CSE version. This may be because the firmware version at : * cmos has not yet been initialized. : */ : init_cmos_partition_version(&version); : } reuse the helper function https://review.coreboot.org/c/coreboot/+/74995/comment/66052068_26e760a8 : PS38, Line 132: if (read_cmos_partition_version(&version)) { : /* CMOS ISH read fail, possibly firmware version has not yet initialized. */ : init_cmos_partition_version(&version); : } same https://review.coreboot.org/c/coreboot/+/74995/comment/4764f31e_dcba4e4a : PS38, Line 143: if (read_cmos_partition_version(&version)) { : /* CMOS ISH read fail, possibly firmware version has not yet initialized. */ : init_cmos_partition_version(&version); : } same -- To view, visit https://review.coreboot.org/c/coreboot/+/74995?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd0ee19575683691c0a82a291e1fd3b2ffb11786 Gerrit-Change-Number: 74995 Gerrit-PatchSet: 38 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Fri, 16 Jun 2023 09:03:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: intelblocks/pep: Restrict TBT displays (DPOF) on S0ix transition to FWCM
by Usha P (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Balaji Manigandan, Felix Singer, Hannah Williams, Jamie Ryu, Paul Menzel, Subrata Banik, Tarun Tuli, Utkarsh H Patel, Utkarsh H Patel, Vikrant Jadeja. Usha P has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75717?usp=email ) Change subject: intelblocks/pep: Restrict TBT displays (DPOF) on S0ix transition to FWCM ...................................................................... Patch Set 4: (7 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/75717/comment/05b6b073_7c89cbd6 : PS3, Line 7: displays(DPOF) > Please add a space before the (. Done https://review.coreboot.org/c/coreboot/+/75717/comment/9bc1ed97_26c8674a : PS3, Line 7: . > No periods in commit titles. Done https://review.coreboot.org/c/coreboot/+/75717/comment/9b478042_d488135f : PS3, Line 9: DPOF(TBT Displays OFF) only > Please add a space before the (. Done https://review.coreboot.org/c/coreboot/+/75717/comment/01b3517c_862cb8fb : PS3, Line 9: Manager in > … is in … Done https://review.coreboot.org/c/coreboot/+/75717/comment/fbd85e60_2a88c98b : PS3, Line 9: needed > needs Done https://review.coreboot.org/c/coreboot/+/75717/comment/10f004d3_ed7ed61e : PS3, Line 9: IOM needed to be notified about DPOF(TBT Displays OFF) only when Firmware connection Manager in use during S0ix Entry/Exit. > Reflow for 72 chars per line Done File src/soc/intel/common/block/acpi/pep.c: https://review.coreboot.org/c/coreboot/+/75717/comment/b1ee2d8d_94e9bb47 : PS3, Line 278: #if CONFIG(FIRMWARE_CONNECTION_MANAGER) > Please don't use preprocessor ifs when possible. For cases like this, just go with C code. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/75717?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I110fb971846f110e7d93a524ceda3bf4bfc15c13 Gerrit-Change-Number: 75717 Gerrit-PatchSet: 4 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Reviewer: Vikrant Jadeja Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Vikrant Jadeja Gerrit-Attention: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-Comment-Date: Fri, 16 Jun 2023 09:01:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: intelblocks/pep: Restrict TBT displays (DPOF) on S0ix transition to FWCM
by Usha P (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Balaji Manigandan, Hannah Williams, Jamie Ryu, Subrata Banik, Tarun Tuli, Usha P, Utkarsh H Patel, Utkarsh H Patel, Vikrant Jadeja. Hello Balaji Manigandan, Hannah Williams, Jamie Ryu, Subrata Banik, Tarun Tuli, Utkarsh H Patel, Utkarsh H Patel, Vikrant Jadeja, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75717?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Code-Review+1 by Hannah Williams, Code-Review+1 by Utkarsh H Patel, Verified+1 by build bot (Jenkins) Change subject: intelblocks/pep: Restrict TBT displays (DPOF) on S0ix transition to FWCM ...................................................................... intelblocks/pep: Restrict TBT displays (DPOF) on S0ix transition to FWCM IOM needs to be notified about DPOF (TBT Displays OFF) only when Firmware Connection Manager is in use during S0ix Entry/Exit. TEST= Build and boot Rex Proto-1. Verify S0ix working. Signed-off-by: Usha P <usha.p(a)intel.com> Change-Id: I110fb971846f110e7d93a524ceda3bf4bfc15c13 --- M src/soc/intel/common/block/acpi/pep.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/75717/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/75717?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I110fb971846f110e7d93a524ceda3bf4bfc15c13 Gerrit-Change-Number: 75717 Gerrit-PatchSet: 4 Gerrit-Owner: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-Reviewer: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Reviewer: Vikrant Jadeja Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Vikrant Jadeja Gerrit-Attention: Utkarsh H Patel <utkarsh.h.patel(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Attention: Utkarsh H Patel <utkarsh.h.patel(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: [RFC] soc/intel/skylake: Use boolean type for s0ix_enable option
by Arthur Heymans (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Elyes Haouas, Felix Singer, Jan Samek, Mario Scheithauer, Michael Niewöhner, Michał Żygowski, Nico Huber, Piotr Król, Subrata Banik. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75871?usp=email ) Change subject: [RFC] soc/intel/skylake: Use boolean type for s0ix_enable option ...................................................................... Patch Set 3: Code-Review+1 (1 comment) File src/mainboard/acer/aspire_vn7_572g/devicetree.cb: https://review.coreboot.org/c/coreboot/+/75871/comment/0e64d38c_9457a6cd : PS3, Line 314: true Interesting. I would have expected "" to necessary. The tree is not consistent about this either. -- To view, visit https://review.coreboot.org/c/coreboot/+/75871?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I372dfb65e6bbfc79c3f036ce34bc399875d5ff16 Gerrit-Change-Number: 75871 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Jan Samek <jan.samek(a)siemens.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Comment-Date: Fri, 16 Jun 2023 08:43:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: src/arch/x86/smbios.c: Change smbios_fill_dimm_serial_number function...
by TangYiwei (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Arthur Heymans, Eric Lai, Jeff Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nill Ge, Subrata Banik, lichenchen.carl, niehaitao(a)bytedance.com. TangYiwei has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75736?usp=email ) Change subject: src/arch/x86/smbios.c: Change smbios_fill_dimm_serial_number function to weak ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > we can create 5 byte mask 0xffffffffff and &serial[4], I think there is no number will contain all 0 […] Ok, let me check with our storage engineer for more suggestions. -- To view, visit https://review.coreboot.org/c/coreboot/+/75736?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icc28a56a577f98a2974407175783e32a1e234f86 Gerrit-Change-Number: 75736 Gerrit-PatchSet: 1 Gerrit-Owner: TangYiwei Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jeff Li <lijinfeng01(a)inspur.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Ziang Wang <ziang.wang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-Reviewer: niehaitao(a)bytedance.com Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: niehaitao(a)bytedance.com Gerrit-Attention: lichenchen.carl <lichenchen.carl(a)bytedance.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Jeff Li <lijinfeng01(a)inspur.com> Gerrit-Comment-Date: Fri, 16 Jun 2023 08:26:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Comment-In-Reply-To: TangYiwei Gerrit-MessageType: comment

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[L] Change in coreboot[master]: soc/intel/alderlake/hsphy: Add possibility to cache HSPHY in flash
by Michał Żygowski (Code Review) 16 Jun '23

16 Jun '23

Attention is currently required from: Krystian Hebel, Martin L Roth, Paul Menzel, Subrata Banik, Tarun Tuli. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68987?usp=email ) Change subject: soc/intel/alderlake/hsphy: Add possibility to cache HSPHY in flash ...................................................................... Patch Set 10: (1 comment) Patchset: PS10: Weird, I didn't get the build error with the newest coreboot-sdk 2023-06-04_44f676afc9 -- To view, visit https://review.coreboot.org/c/coreboot/+/68987?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5a37f5b06706ff30d92f60f1bf5dc900edbde96f Gerrit-Change-Number: 68987 Gerrit-PatchSet: 10 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Fri, 16 Jun 2023 08:22:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit June 2023