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Change subject: [RFC] soc/intel/skylake: Use boolean type for s0ix_enable option
......................................................................
Patch Set 3:
(2 comments)
Patchset:
PS3:
> SG!
If we do this at a bigger scale, I would prefer an enum. Then it could
look as nice as
```
register s0ix = enabled
```
File src/mainboard/acer/aspire_vn7_572g/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/75871/comment/f79b9e6d_9bcf4dcd :
PS3, Line 314: true
> Interesting. I would have expected "" to necessary. The tree is not consistent about this either.
The quotes are only needed if there is whitespace, otherwise we have this rule:
```
[^ \n\t]+ {yylval.string = ... return(STRING);}
```
Never thought about it, but even filling arrays should be possible if one doesn't
add spaces (please don't) :D
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Change subject: superiotool/ite: Add IT8784E support
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74172/comment/fa43f29c_c5543c54 :
PS1, Line 7: .c
> Could be removed.
Done
https://review.coreboot.org/c/coreboot/+/74172/comment/c2913b23_527acbc0 :
PS1, Line 10: The
> There
Done
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Hello Felix Held, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: superiotool/ite: Add IT8784E support
......................................................................
superiotool/ite: Add IT8784E support
IT8784E is basically a IT8786E stripped from serial ports 3-6.
There are very few minor register differences in EC IO space and GPIO
LDN, which are covered by this patch.
Based on IT8784E-I Preliminary Specification V0.7.1 (non-public).
TEST=Dump SIO configuration on Protectli VP4670 (vault_cml).
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Change-Id: I5de8aeaff9697b854281391083f77a1083d12fe6
---
M util/superiotool/ite.c
1 file changed, 74 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/74172/2
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Hello Tarun Tuli,
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Change subject: mb/google/nissa/var/yavilla: Update eMMC DLL settings
......................................................................
mb/google/nissa/var/yavilla: Update eMMC DLL settings
Update eMMC DLL settings based on yaviks CB:75812 result.
BUG=b:287576045, b:265611305
TEST=executed 300 cycles of cold boot successfully on hynix 32/64G emmc
Change-Id: Ic99524fc04dd086f7839434e6ccd842e2495d367
Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>
---
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Change subject: [RFC] soc/intel/skylake: Use boolean type for s0ix_enable option
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/acer/aspire_vn7_572g/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/75871/comment/da0e7248_1aa1993c :
PS3, Line 314: true
> Interesting. I would have expected "" to necessary. The tree is not consistent about this either.
Which way do you prefer?
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Change subject: drivers/intel/fsp2_0: Read MRC version from FSP binary
......................................................................
Patch Set 12:
(3 comments)
File src/drivers/intel/fsp2_0/Kconfig:
https://review.coreboot.org/c/coreboot/+/75524/comment/5caf00b2_5d33df98 :
PS3, Line 405: MRC_VERSION_FROM_BIN
> > @traun ADL/RPL changes will take some more time. I will share more details on bug. […]
we can use FSP_HEADER_HAS_MRC_VERSION_INFO FSP_HEADER_HAS_MRC_VERSION_INFO_2.
let me do the change is accordingly.
File src/drivers/intel/fsp2_0/include/fsp/soc_binding.h:
https://review.coreboot.org/c/coreboot/+/75524/comment/4151b4b4_b981e3cb :
PS12, Line 30: MRC_VERSION_FROM_BIN
> FSP_HEADER_HAS_MRC_VERSION
Acknowledged
https://review.coreboot.org/c/coreboot/+/75524/comment/34825172_289ca8ff :
PS12, Line 32: TODO: Remove BUILD_TIME_STAMP_SIZE Macro from coreboot once Macro
: * definition is in 'FspProducerDataHeader.h'.
> what is the timeline ? like next EDK2 uprev ?
FSP 3205+ headers have the fix. mostly next release.
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Change subject: drivers/intel/fsp2_0: Read MRC version from FSP binary
......................................................................
Patch Set 12:
(3 comments)
File src/drivers/intel/fsp2_0/Kconfig:
https://review.coreboot.org/c/coreboot/+/75524/comment/382c7f43_bb77ae20 :
PS3, Line 405: MRC_VERSION_FROM_BIN
> @traun ADL/RPL changes will take some more time. I will share more details on bug.
> @subrata are we okay with MRC_VERSION_FROM_BIN given that we are planning to use MRC_VERSION_FROM_HEADER later ?
i don't kw how those would be different. IMO, we should try to create abstraction and make sure actual details being handled inside the driver. It’s too much expectation from soc users to kw to select between `version from binary` or `version from header`.
FSP_HEADER_HAS_MRC_VERSION_INFO_1 and FSP_HEADER_HAS_MRC_VERSION_INFO_2 with different help text would solve ur purpose.
File src/drivers/intel/fsp2_0/include/fsp/soc_binding.h:
https://review.coreboot.org/c/coreboot/+/75524/comment/83e148d0_b670b81b :
PS12, Line 30: MRC_VERSION_FROM_BIN
FSP_HEADER_HAS_MRC_VERSION
https://review.coreboot.org/c/coreboot/+/75524/comment/729e0c85_0e44184b :
PS12, Line 32: TODO: Remove BUILD_TIME_STAMP_SIZE Macro from coreboot once Macro
: * definition is in 'FspProducerDataHeader.h'.
what is the timeline ? like next EDK2 uprev ?
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