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Change subject: arch/x86/smbios: Add weak function for BIOS Vendor in SMBIOS Type0
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75737/comment/421f83b8_141e908b :
PS1, Line 8:
Why?
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Change subject: amdfwtool: Only use AMD_FW_RECOVERYAB_A on phoenix
......................................................................
Patch Set 7:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/74971/comment/e8879f76_92f948e4 :
PS7, Line 8:
Why?
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Hello Felix Singer, Martin L Roth, Nico Huber, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/70771?usp=email
to look at the new patch set (#16).
The following approvals got outdated and were removed:
Verified-1 by build bot (Jenkins)
Change subject: crossgcc: Upgrade GCC from 11.3.0 to 13.1.0
......................................................................
crossgcc: Upgrade GCC from 11.3.0 to 13.1.0
Change-Id: I4f2ed4de4811abaa13528906de71eee29a8f2910
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M util/crossgcc/buildgcc
D util/crossgcc/patches/gcc-11.3.0_ada-musl_workaround.patch
D util/crossgcc/patches/gcc-11.3.0_gnat.patch
R util/crossgcc/patches/gcc-13.1.0_asan_shadow_offset_callback.patch
R util/crossgcc/patches/gcc-13.1.0_libcpp.patch
R util/crossgcc/patches/gcc-13.1.0_libgcc.patch
D util/crossgcc/sum/gcc-11.3.0.tar.xz.cksum
A util/crossgcc/sum/gcc-13.1.0.tar.xz.cksum
M util/docker/coreboot-sdk/Dockerfile
9 files changed, 9 insertions(+), 170 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/70771/16
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Change subject: cbfs: Allow controlling decompression of unverified files
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Patch Set 3: Code-Review+1
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Change subject: mb/google/kahlee: Enable secure OS
......................................................................
Patch Set 5:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/75874/comment/aa3b794b_9287edf5 :
PS5, Line 7: secure
Secure
https://review.coreboot.org/c/coreboot/+/75874/comment/9685eeb7_10bc24b5 :
PS5, Line 15: secure
Secure
https://review.coreboot.org/c/coreboot/+/75874/comment/8509ffd7_861a58ae :
PS5, Line 17:
Resolves: https://ticket.coreboot.org/issues/495
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Change subject: mb/google/kahlee: Enable secure OS
......................................................................
Patch Set 5:
(2 comments)
Patchset:
PS4:
> Understood. AMD will need to upload a new PSP, but this will at least prep and enable it.
I’d be nice, if you updated the commit message, once your tests are done.
File src/mainboard/google/kahlee/Kconfig:
https://review.coreboot.org/c/coreboot/+/75874/comment/07ac9d49_c9ca8475 :
PS5, Line 148: # Don't use AMD's Secure OS if ChromeOS build.
Commit 09abb879a41a (mainboard/google/kahlee: Don't use AMD's secure OS, Change-Id https://review.coreboot.org/c/coreboot/+/31890) [1] does not give a reason, why it’s disabled.
If possible, it’d be great if you extended the comment.
[1]: https://review.coreboot.org/c/coreboot/+/31890
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Change subject: [RFC] soc/intel/skylake: Use boolean type for s0ix_enable devicetree option
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/skylake/chip.h:
https://review.coreboot.org/c/coreboot/+/75871/comment/df009a51_466638db :
PS4, Line 15: #include <stdbool.h>
: #include <stdint.h>
#include <types.h>
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Change subject: doc/Makefile: Fix build dir setting
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Patch Set 4: Code-Review+1
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Change subject: util/cbmem: add parsing of TPM logs per standard
......................................................................
Patch Set 19: Code-Review+1
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68749/comment/e91d2334_5b268108 :
PS19, Line 9: coreboot is made to export the range allocated for the log.
Sorry, I do not understand this sentence. This patch only changes the cbmem utility, doesn’t it?
https://review.coreboot.org/c/coreboot/+/68749/comment/44d5c403_ff49b1fa :
PS19, Line 12:
1. Could you please give some more background on the implementation. You check CBMEM for certain fields (`CBMEM_ID_TCPA_TCG_LOG`)?
2. Pleases add a TEST= line with the output printed by the new code.
Patchset:
PS19:
Thank you for your work. If my comments don’t make any sense, feel free to mark them resolved.
File util/cbmem/cbmem.c:
https://review.coreboot.org/c/coreboot/+/68749/comment/7e12af64_2dbd02bf :
PS19, Line 899: printf("\tEvent type: Unknown (0x%x)\n", event_type);
`ARRAY_SIZE(tpm_event_types)` could also be printed.
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