Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75860?usp=email )
Change subject: acpi/acpi.c: Fix printing all ACPI tables
......................................................................
acpi/acpi.c: Fix printing all ACPI tables
Loop over tables in xsdt instead of maintaining a list of local
variables to loop over. Some tables were not generated directly in the
write_acpi_tables function, like IVRS or SRAT. Now those tables are
printed too and the code is simpler.
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Change-Id: Ie0a6e2b6e2b72b5c8f59e730bea9b51007b507b6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75860
Reviewed-by: Lean Sheng Tan <sheng.tan(a)9elements.com>
Reviewed-by: Marvin Drees <marvin.drees(a)9elements.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
---
M src/acpi/acpi.c
1 file changed, 2 insertions(+), 6 deletions(-)
Approvals:
Marvin Drees: Looks good to me, but someone else must approve
Lean Sheng Tan: Looks good to me, approved
Felix Held: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c
index aa1cd1c..78135d7 100644
--- a/src/acpi/acpi.c
+++ b/src/acpi/acpi.c
@@ -2136,12 +2136,8 @@
if (CONFIG(DEBUG_ACPICA_COMPATIBLE)) {
printk(BIOS_DEBUG, "Printing ACPI tables in ACPICA compatible format\n");
- void *acpi_tables[] = { rsdt, xsdt, fadt, facs, slic, ssdt, dsdt,
- mcfg, tcpa, tpm2, madt, lpit, bert };
- for (size_t i = 0; i < ARRAY_SIZE(acpi_tables); i++) {
- if (acpi_tables[i] == NULL)
- continue;
- acpidump_print(acpi_tables[i]);
+ for (size_t i = 0; xsdt->entry[i] != 0; i++) {
+ acpidump_print((void *)(uintptr_t)xsdt->entry[i]);
}
printk(BIOS_DEBUG, "Done printing ACPI tables in ACPICA compatible format\n");
}
--
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75905?usp=email )
Change subject: Makefile.inc: Compress DSDT file
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
This might squize a ms or so of the boottime depending on the speed of the bootmedium ;-)
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Attention is currently required from: Lance Zhao, Tim Wawrzynczak.
Hello Lance Zhao, Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/75904?usp=email
to look at the new patch set (#3).
Change subject: UNTESTED acpi: Load DSDT directly into target location
......................................................................
UNTESTED acpi: Load DSDT directly into target location
Instead of first mapping DSDT and then copying it into the target
location, load it straight away.
This changes DSDT injections to be appended to DSDT file instead of
prepended. TOTEST: This is likely ok? Test on chromeos platform.
This makes compressing DSDT possible on platforms where cbfs_map only
does return a pointer to a memory mapped medium. On platforms that are
not doing memory mapping this avoid copying DSDT twice in memory (first
cbfs_map, second memcpy to current).
TESTED work on Foxconn G41M.
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Change-Id: I8f5e01da6ab33869c61801de1e7364bb680f44eb
---
M src/acpi/acpi.c
1 file changed, 43 insertions(+), 48 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/75904/3
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Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
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Attention is currently required from: Lance Zhao, Tim Wawrzynczak.
Hello Lance Zhao, Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/75904?usp=email
to look at the new patch set (#2).
Change subject: UNTESTED acpi: Load DSDT directly into target location
......................................................................
UNTESTED acpi: Load DSDT directly into target location
Instead of first mapping DSDT and then copying it into the target
location, load it straight away.
This changes DSDT injections to be appended to DSDT file instead of
prepended. TOTEST: This is likely ok? Test on chromeos platform.
This makes compressing DSDT possible on platforms where cbfs_map only
does return a pointer to a memory mapped medium.
TESTED work on Foxconn G41M.
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Change-Id: I8f5e01da6ab33869c61801de1e7364bb680f44eb
---
M src/acpi/acpi.c
1 file changed, 43 insertions(+), 48 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/75904/2
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Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75902?usp=email )
Change subject: acpi/acpi.c: Change signature of write_acpi_tables
......................................................................
acpi/acpi.c: Change signature of write_acpi_tables
The argument is copied into current and is never modified.
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Change-Id: I3084e43ccbe9749bc726af3120decfe8b52e1709
---
M src/acpi/acpi.c
M src/include/acpi/acpi.h
2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/75902/1
diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c
index aa1cd1c..9b4dafa 100644
--- a/src/acpi/acpi.c
+++ b/src/acpi/acpi.c
@@ -1854,7 +1854,7 @@
printk(BIOS_SPEW, "\n");
}
-unsigned long write_acpi_tables(unsigned long start)
+unsigned long write_acpi_tables(const unsigned long start)
{
unsigned long current;
acpi_rsdp_t *rsdp;
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h
index 09e1211..d3f209a 100644
--- a/src/include/acpi/acpi.h
+++ b/src/include/acpi/acpi.h
@@ -1335,7 +1335,7 @@
/* These are implemented by the target port or north/southbridge. */
void preload_acpi_dsdt(void);
-unsigned long write_acpi_tables(unsigned long addr);
+unsigned long write_acpi_tables(const unsigned long addr);
unsigned long acpi_fill_madt(unsigned long current);
void acpi_fill_fadt(acpi_fadt_t *fadt);
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Riku Viitanen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74906?usp=email )
Change subject: mb/hp: Add new port for compaq_8300_elite_usdt
......................................................................
Patch Set 5:
(2 comments)
File src/mainboard/hp/compaq_8300_elite_usdt/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/74906/comment/827834f5_c6811381 :
PS1, Line 9: register "gen2_dec" = "0x00fc0801"
> The latter seems like reasonable I/O decode for 0x800. […]
I have no idea. These magic numbers were decided by autoport. Can you help me figure out if they need changing?
https://review.coreboot.org/c/coreboot/+/74906/comment/8418aa26_d4ae4c7a :
PS1, Line 80: io 0x60 = 0x600
> LPC decode required from 0x600
How would I go about adding that? I'm a complete n00b.
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