coreboot-gerrit June 2023

coreboot-gerrit@coreboot.org

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[XL] Change in coreboot[master]: vc/intel/edk2: Remove edk2-stable202111 support
by 9elements QA (Code Review) 17 Jun '23

17 Jun '23

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75817?usp=email ) Change subject: vc/intel/edk2: Remove edk2-stable202111 support ...................................................................... Patch Set 4: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/169443 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/169441 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/169440 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/169439 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/169438 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/169437 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/169436 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/169435 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/169434 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/169433 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/169432 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/169431 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/169430 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/169429 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/169428 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/169427 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/75817?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide1864e0a42a4c0a81c3c94b1b1254f8fad062af Gerrit-Change-Number: 75817 Gerrit-PatchSet: 4 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Sat, 17 Jun 2023 11:11:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cbfstool: Correctly interpret uninitialized MMAP window ranges
by Arthur Heymans (Code Review) 17 Jun '23

17 Jun '23

Attention is currently required from: Julius Werner, Tim Wawrzynczak. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/65417?usp=email ) Change subject: cbfstool: Correctly interpret uninitialized MMAP window ranges ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/65417?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9e2afde0373aafebc95f9b717ea7e2d2c55bc6d5 Gerrit-Change-Number: 65417 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Mike Banon <mikebdp2(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Comment-Date: Sat, 17 Jun 2023 10:51:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: drivers/intel/fsp2_0: Read MRC version from FSP binary
by Ronak Kanabar (Code Review) 17 Jun '23

17 Jun '23

Ronak Kanabar has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/75524?usp=email ) Change subject: drivers/intel/fsp2_0: Read MRC version from FSP binary ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/75524?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f7b536929eafae692f0c1fad6ca15e4021dccd8 Gerrit-Change-Number: 75524 Gerrit-PatchSet: 12 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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[M] Change in coreboot[master]: drivers/intel/fsp2_0: Read MRC version from FSP binary
by Ronak Kanabar (Code Review) 17 Jun '23

17 Jun '23

Attention is currently required from: Andrey Petrov, Hannah Williams, Paul Menzel, Subrata Banik, Tarun Tuli. Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75524?usp=email ) Change subject: drivers/intel/fsp2_0: Read MRC version from FSP binary ...................................................................... Patch Set 12: (1 comment) Patchset: PS12: > > @Ronak, can you please allow me to land the MRC version API? […] okay -- To view, visit https://review.coreboot.org/c/coreboot/+/75524?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f7b536929eafae692f0c1fad6ca15e4021dccd8 Gerrit-Change-Number: 75524 Gerrit-PatchSet: 12 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Sat, 17 Jun 2023 10:07:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/hp: Add new port for compaq_8300_elite_usdt
by Riku Viitanen (Code Review) 17 Jun '23

17 Jun '23

Attention is currently required from: Riku Viitanen. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74906?usp=email to look at the new patch set (#5). Change subject: mb/hp: Add new port for compaq_8300_elite_usdt ...................................................................... mb/hp: Add new port for compaq_8300_elite_usdt New port based on autoport. This board has NPCD379 SuperIO, which seems similar to NPCD378. So I added the SuperIO code from hp8200sff. Seems to work fine. Fan speeds stay low when idling. (Before, they went 100%) The following is tested and is working: * Native raminit with both DIMMs * Libgfxinit textmode and framebuffer on both DisplayPorts and VGA * External USB2 and USB3 ports: they all work * USB 3.0 SuperSpeed on Linux-libre (rear, 4 ports) * Ethernet * Mini-PCIe WLAN * SATA: 2.5" SSD and optical drive bay * Booting Live Linuxes from DVD and USB with SeaBIOS 1.16.1 * PS/2 keyboard and mouse * S3 suspend and resume, wake using USB keyboard * Headphone output, line out, internal speaker * Wake on LAN * Rebooting * CMOS options & nvramcui Untested: * mSATA slot. The SATA port needs to be enabled on devicetree too, but I'm unable to test due to lack of hardware * Line in, mic input * MXM graphics card * EHCI debug Not working: * Mini-PCIe USB: I couldn't get it working on vendor BIOS either, so maybe it just isn't present * PS/2 keyboard wake from S3 Change-Id: I2dc31778c2aa1987d5acdf355973a203dd0bb3a3 Signed-off-by: Riku Viitanen <riku.viitanen(a)protonmail.com> --- A Documentation/mainboard/hp/compaq_8300_usdt.md A Documentation/mainboard/hp/compaq_8300_usdt_rom_header.jpg A src/mainboard/hp/compaq_elite_8300_usdt/Kconfig A src/mainboard/hp/compaq_elite_8300_usdt/Kconfig.name A src/mainboard/hp/compaq_elite_8300_usdt/Makefile.inc A src/mainboard/hp/compaq_elite_8300_usdt/acpi/ec.asl A src/mainboard/hp/compaq_elite_8300_usdt/acpi/platform.asl A src/mainboard/hp/compaq_elite_8300_usdt/acpi/superio.asl A src/mainboard/hp/compaq_elite_8300_usdt/acpi_tables.c A src/mainboard/hp/compaq_elite_8300_usdt/board_info.txt A src/mainboard/hp/compaq_elite_8300_usdt/cmos.default A src/mainboard/hp/compaq_elite_8300_usdt/cmos.layout A src/mainboard/hp/compaq_elite_8300_usdt/devicetree.cb A src/mainboard/hp/compaq_elite_8300_usdt/dsdt.asl A src/mainboard/hp/compaq_elite_8300_usdt/early_init.c A src/mainboard/hp/compaq_elite_8300_usdt/gma-mainboard.ads A src/mainboard/hp/compaq_elite_8300_usdt/gpio.c A src/mainboard/hp/compaq_elite_8300_usdt/hda_verb.c A src/mainboard/hp/compaq_elite_8300_usdt/mainboard.c 19 files changed, 753 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/74906/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/74906?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2dc31778c2aa1987d5acdf355973a203dd0bb3a3 Gerrit-Change-Number: 74906 Gerrit-PatchSet: 5 Gerrit-Owner: Riku Viitanen Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Riku Viitanen Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/intel/cmd/blk/cse: Implement APIs to access FW versions in CMOS
by Subrata Banik (Code Review) 17 Jun '23

17 Jun '23

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Sridhar Siricilla. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74995?usp=email ) Change subject: soc/intel/cmd/blk/cse: Implement APIs to access FW versions in CMOS ...................................................................... Patch Set 41: (1 comment) File src/soc/intel/common/block/include/intelblocks/cse_lite_cmos.h: https://review.coreboot.org/c/coreboot/+/74995/comment/bcf3d231_f434b606 : PS41, Line 19: wondering if we can make this header file local to the cse module itself? i don't believe any other common code would like to make a call into it or rather we don't want any other code should call it as is except the cse_lite.c hence better we keep it local to this directory. WDYT? -- To view, visit https://review.coreboot.org/c/coreboot/+/74995?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd0ee19575683691c0a82a291e1fd3b2ffb11786 Gerrit-Change-Number: 74995 Gerrit-PatchSet: 41 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Sat, 17 Jun 2023 09:24:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: vc/intel/edk2: Remove edk2-stable202111 support
by Subrata Banik (Code Review) 17 Jun '23

17 Jun '23

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75817?usp=email ) Change subject: vc/intel/edk2: Remove edk2-stable202111 support ...................................................................... vc/intel/edk2: Remove edk2-stable202111 support This patch removes the support for edk2-stable202111 as MTL has migrated to edk2-stable202302, and no other platform is utilizing edk2-stable202111. The support for edk2-stable202111 is no longer necessary. Change-Id: Ide1864e0a42a4c0a81c3c94b1b1254f8fad062af Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75817 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/vendorcode/intel/Kconfig M src/vendorcode/intel/Makefile.inc D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/FspEas.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/FspEas/FspApi.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/FspGlobalData.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/FspMeasurePointId.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/FspStatusCode.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Guid/FspNonVolatileStorageHob2.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Guid/GuidHobFspEas.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Library/CacheAsRamLib.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Library/CacheLib.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Library/DebugDeviceLib.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Library/FspCommonLib.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Library/FspPlatformLib.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Library/FspSecPlatformLib.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Library/FspSwitchStackLib.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Ppi/FspmArchConfigPpi.h D src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/AArch64/ProcessorBind.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Arm/ProcessorBind.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Base.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ebc/ProcessorBind.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/Acpi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/Apriori.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/AprioriFileName.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/Btt.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/CapsuleReport.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/Cper.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/DebugImageInfoTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/DxeServices.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/EventGroup.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/EventLegacyBios.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/FileInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/FileSystemInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/FileSystemVolumeLabelInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/FirmwareContentsSigned.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/FirmwareFileSystem2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/FirmwareFileSystem3.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/FmpCapsule.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/GlobalVariable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/Gpt.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/GraphicsInfoHob.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/HardwareErrorVariable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/HiiFormMapMethodGuid.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/HiiKeyBoardLayout.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/HiiPlatformSetupFormset.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/HobList.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/ImageAuthentication.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/JsonCapsule.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/LinuxEfiInitrdMedia.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/MdePkgTokenSpace.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/MemoryAllocationHob.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/MemoryAttributesTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/MemoryOverwriteControl.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/Mps.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/PcAnsi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/RtPropertiesTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/SmBios.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/SmramMemoryReserve.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/StatusCodeDataTypeId.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/SystemResourceTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/VectorHandoffTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/WinCertificate.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ia32/Nasm.inc D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ia32/ProcessorBind.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi10.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi20.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi30.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi40.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi50.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi51.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi60.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi61.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi62.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi63.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Acpi64.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/AcpiAml.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/AlertStandardFormatTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/ArmErrorSourceTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Atapi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Bluetooth.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Bmp.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Cxl.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Cxl11.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/DebugPort2Table.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/DebugPortTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Dhcp.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/ElTorito.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Emmc.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/HighPrecisionEventTimerTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Hsti.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Http11.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/IScsiBootFirmwareTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/IoRemappingTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Ipmi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/IpmiFruInformationStorage.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/IpmiNetFnApp.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/IpmiNetFnBridge.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/IpmiNetFnChassis.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/IpmiNetFnFirmware.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/IpmiNetFnGroupExtension.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/IpmiNetFnSensorEvent.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/IpmiNetFnStorage.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/IpmiNetFnTransport.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/LegacyBiosMpTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/LowPowerIdleTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Mbr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/MemoryOverwriteRequestControlLock.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Nvme.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Pci.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Pci22.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Pci23.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Pci30.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/PciCodeId.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/PciExpress21.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/PciExpress30.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/PciExpress31.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/PciExpress40.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/PciExpress50.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/PeImage.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Scsi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Sd.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/SdramSpd.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/SdramSpdDdr3.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/SdramSpdDdr4.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/SdramSpdLpDdr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/ServiceProcessorManagementInterfaceTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/SmBios.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/SmBus.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Spdm.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/TcgPhysicalPresence.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/TcgStorageCore.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/TcgStorageOpal.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/TcpaAcpi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Tls1.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Tpm12.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Tpm20.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Tpm2Acpi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/TpmPtp.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/TpmTis.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Udf.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/Usb.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/WatchdogActionTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/WatchdogResourceTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/WindowsSmmSecurityMitigationTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/WindowsUxCapsule.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/BaseLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/BaseMemoryLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/CacheMaintenanceLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/CpuLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/DebugLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/DebugPrintErrorLevelLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/DevicePathLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/DxeCoreEntryPoint.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/DxeServicesLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/DxeServicesTableLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/ExtractGuidedSectionLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/FileHandleLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/HobLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/HstiLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/IoLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/MemoryAllocationLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/MmServicesTableLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/MmUnblockMemoryLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/OrderedCollectionLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PcdLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PciCf8Lib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PciExpressLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PciLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PciSegmentInfoLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PciSegmentLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PeCoffExtraActionLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PeCoffGetEntryPointLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PeCoffLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PeiCoreEntryPoint.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PeiServicesLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PeiServicesTablePointerLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PeimEntryPoint.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PerformanceLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PostCodeLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/PrintLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/RegisterFilterLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/ReportStatusCodeLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/ResourcePublicationLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/RngLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/S3BootScriptLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/S3IoLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/S3PciLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/S3PciSegmentLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/S3SmbusLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/S3StallLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/SafeIntLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/SerialPortLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/SmbusLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/SmiHandlerProfileLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/SmmIoLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/SmmLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/SmmMemLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/SmmPeriodicSmiLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/SmmServicesTableLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/StandaloneMmDriverEntryPoint.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/SynchronizationLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/TimerLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/UefiApplicationEntryPoint.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/UefiBootServicesTableLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/UefiDecompressLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/UefiDriverEntryPoint.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/UefiLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/UefiRuntimeLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/UefiRuntimeServicesTableLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/UefiScsiLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/UefiUsbLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Library/UnitTestLib.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiBootMode.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiDependency.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiDxeCis.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiFirmwareFile.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiFirmwareVolume.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiHob.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiI2c.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiMmCis.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiMultiPhase.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiPeiCis.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiS3BootScript.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiSmmCis.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Pi/PiStatusCode.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/PiDxe.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/PiMm.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/PiPei.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/PiSmm.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/BlockIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/BlockIo2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/BootInRecoveryMode.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/Capsule.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/CpuIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/Decompress.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/DelayedDispatch.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/DeviceRecoveryModule.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/DxeIpl.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/EndOfPeiPhase.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/FirmwareVolume.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/FirmwareVolumeInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/FirmwareVolumeInfo2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/Graphics.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/GuidedSectionExtraction.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/I2cMaster.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/IsaHc.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/LoadFile.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/LoadImage.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/MasterBootMode.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/MemoryDiscovered.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/MmAccess.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/MmCommunication.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/MmConfiguration.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/MmControl.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/MpServices.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/MpServices2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/Pcd.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/PcdInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/PciCfg2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/PeiCoreFvLocation.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/PiPcd.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/PiPcdInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/ReadOnlyVariable2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/RecoveryModule.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/ReportStatusCodeHandler.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/Reset.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/Reset2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/S3Resume2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/SecHobData.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/SecPlatformInformation.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/SecPlatformInformation2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/Security2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/Smbus2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/Stall.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/StatusCode.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/SuperIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/TemporaryRamDone.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/TemporaryRamSupport.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Ppi/VectorHandoffInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/AbsolutePointer.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/AcpiSystemDescriptionTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/AcpiTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/AdapterInformation.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Arp.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/AtaPassThru.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/AuthenticationInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Bds.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Bis.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/BlockIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/BlockIo2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/BlockIoCrypto.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/BluetoothAttribute.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/BluetoothConfig.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/BluetoothHc.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/BluetoothIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/BluetoothLeConfig.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/BootManagerPolicy.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/BusSpecificDriverOverride.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Capsule.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/ComponentName.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/ComponentName2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Cpu.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/CpuIo2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DebugPort.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DebugSupport.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Decompress.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DeferredImageLoad.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DeviceIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DevicePath.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DevicePathFromText.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DevicePathToText.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DevicePathUtilities.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Dhcp4.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Dhcp6.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DiskInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DiskIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DiskIo2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Dns4.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Dns6.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DriverBinding.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DriverConfiguration.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DriverConfiguration2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DriverDiagnostics.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DriverDiagnostics2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DriverFamilyOverride.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DriverHealth.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DriverSupportedEfiVersion.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DxeMmReadyToLock.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/DxeSmmReadyToLock.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Eap.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/EapConfiguration.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/EapManagement.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/EapManagement2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Ebc.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/EdidActive.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/EdidDiscovered.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/EdidOverride.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/EraseBlock.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/FirmwareManagement.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/FirmwareVolume2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/FirmwareVolumeBlock.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/FormBrowser2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Ftp4.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/GraphicsOutput.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/GuidedSectionExtraction.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Hash.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Hash2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HiiConfigAccess.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HiiConfigKeyword.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HiiConfigRouting.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HiiDatabase.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HiiFont.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HiiImage.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HiiImageDecoder.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HiiImageEx.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HiiPackageList.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HiiPopup.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HiiString.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Http.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HttpBootCallback.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/HttpUtilities.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/I2cBusConfigurationManagement.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/I2cEnumerate.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/I2cHost.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/I2cIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/I2cMaster.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/IScsiInitiatorName.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/IdeControllerInit.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/IncompatiblePciDeviceSupport.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Ip4.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Ip4Config.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Ip4Config2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Ip6.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Ip6Config.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/IpSec.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/IpSecConfig.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/IsaHc.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Kms.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/LegacyRegion2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/LegacySpiController.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/LegacySpiFlash.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/LegacySpiSmmController.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/LegacySpiSmmFlash.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/LoadFile.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/LoadFile2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/LoadedImage.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/ManagedNetwork.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Metronome.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmAccess.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmBase.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmCommunication.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmCommunication2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmConfiguration.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmControl.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmCpu.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmCpuIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmEndOfDxe.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmGpiDispatch.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmIoTrapDispatch.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmMp.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmPciRootBridgeIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmPeriodicTimerDispatch.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmPowerButtonDispatch.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmReadyToLock.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmReportStatusCodeHandler.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmStandbyButtonDispatch.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmStatusCode.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmSwDispatch.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmSxDispatch.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MmUsbDispatch.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MonotonicCounter.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/MpService.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Mtftp4.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Mtftp6.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/NetworkInterfaceIdentifier.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/NvdimmLabel.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/NvmExpressPassthru.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PartitionInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Pcd.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PcdInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PciEnumerationComplete.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PciHotPlugInit.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PciHotPlugRequest.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PciIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PciOverride.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PciPlatform.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PciRootBridgeIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PiPcd.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PiPcdInfo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Pkcs7Verify.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PlatformDriverOverride.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PlatformToDriverConfiguration.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PxeBaseCode.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/PxeBaseCodeCallBack.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/RamDisk.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/RealTimeClock.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/RedfishDiscover.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/RegularExpressionProtocol.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/ReportStatusCodeHandler.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Reset.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/ResetNotification.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Rest.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/RestEx.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/RestJsonStructure.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Rng.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Runtime.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/S3SaveState.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/S3SmmSaveState.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/ScsiIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/ScsiPassThru.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/ScsiPassThruExt.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SdMmcPassThru.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Security.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Security2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SecurityPolicy.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SerialIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/ServiceBinding.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Shell.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/ShellDynamicCommand.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/ShellParameters.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SimpleFileSystem.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SimpleNetwork.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SimplePointer.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SimpleTextIn.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SimpleTextInEx.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SimpleTextOut.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmartCardEdge.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmartCardReader.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Smbios.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmbusHc.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmAccess2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmBase2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmCommunication.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmConfiguration.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmControl2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmCpu.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmCpuIo2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmEndOfDxe.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmGpiDispatch2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmIoTrapDispatch2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmPciRootBridgeIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmPeriodicTimerDispatch2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmPowerButtonDispatch2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmReadyToLock.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmReportStatusCodeHandler.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmStandbyButtonDispatch2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmStatusCode.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmSwDispatch2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmSxDispatch2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SmmUsbDispatch2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SpiConfiguration.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SpiHc.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SpiIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SpiNorFlash.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SpiSmmConfiguration.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SpiSmmHc.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SpiSmmNorFlash.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/StatusCode.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/StorageSecurityCommand.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SuperIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/SuperIoControl.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Supplicant.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/TapeIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Tcg2Protocol.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/TcgService.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Tcp4.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Tcp6.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Timer.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Timestamp.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Tls.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/TlsConfig.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/TrEEProtocol.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Udp4.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Udp6.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/UfsDeviceConfig.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/UgaDraw.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/UgaIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/UnicodeCollation.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Usb2HostController.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/UsbFunctionIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/UsbHostController.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/UsbIo.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/UserCredential.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/UserCredential2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/UserManager.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/Variable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/VariableWrite.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/VlanConfig.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/WatchdogTimer.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/WiFi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Protocol/WiFi2.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Amd/Cpuid.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Amd/Fam17Msr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Amd/Ghcb.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Amd/Msr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/ArchitecturalMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Cpuid.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/LocalApic.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Microcode.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/AtomMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/BroadwellMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/Core2Msr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/CoreMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/GoldmontMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/HaswellEMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/HaswellMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/IvyBridgeMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/NehalemMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/P6Msr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/Pentium4Msr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/PentiumMMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/PentiumMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/SandyBridgeMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/SilvermontMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/Xeon5600Msr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/XeonDMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/XeonE7Msr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/Msr/XeonPhiMsr.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/SmramSaveStateMap.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/StmApi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/StmResourceDescriptor.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Intel/StmStatusCode.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/RiscV64/ProcessorBind.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Uefi.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Uefi/UefiAcpiDataTable.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Uefi/UefiBaseType.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Uefi/UefiGpt.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Uefi/UefiInternalFormRepresentation.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Uefi/UefiMultiPhase.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Uefi/UefiPxe.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Uefi/UefiSpec.h D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/X64/Nasm.inc D src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/X64/ProcessorBind.h 584 files changed, 0 insertions(+), 237,964 deletions(-) Approvals: Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified Sridhar Siricilla: Looks good to me, approved -- To view, visit https://review.coreboot.org/c/coreboot/+/75817?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide1864e0a42a4c0a81c3c94b1b1254f8fad062af Gerrit-Change-Number: 75817 Gerrit-PatchSet: 4 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[XS] Change in coreboot[master]: mb/google/rex/variants/ovis: Add display configuration
by Subrata Banik (Code Review) 17 Jun '23

17 Jun '23

Attention is currently required from: Jakub Czapiga, Kapil Porwal, Paul Menzel, Tarun Tuli. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75579?usp=email ) Change subject: mb/google/rex/variants/ovis: Add display configuration ...................................................................... Patch Set 9: Code-Review+2 (1 comment) File src/mainboard/google/rex/variants/ovis/overridetree.cb: https://review.coreboot.org/c/coreboot/+/75579/comment/4249f1f9_f123b74f : PS1, Line 22: DDI_ENABLE_HPD > I think all GPIOs are configured correctly now - or at least they are matching the mapping document, […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/75579?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I40f967b12b11c10a1a9329bfb42ebec5a8d7738f Gerrit-Change-Number: 75579 Gerrit-PatchSet: 9 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Sat, 17 Jun 2023 09:16:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Jakub Czapiga <jacz(a)semihalf.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/rex/variants/ovis: Add display configuration
by Jakub Czapiga (Code Review) 17 Jun '23

17 Jun '23

Attention is currently required from: Kapil Porwal, Paul Menzel, Subrata Banik, Tarun Tuli. Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75579?usp=email ) Change subject: mb/google/rex/variants/ovis: Add display configuration ...................................................................... Patch Set 9: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/75579/comment/d09f250b_efc929bd : PS1, Line 7: configurarion > configuration Done https://review.coreboot.org/c/coreboot/+/75579/comment/65fbd49e_28f2cdee : PS1, Line 8: > Please elaborate. Done File src/mainboard/google/rex/variants/ovis/overridetree.cb: https://review.coreboot.org/c/coreboot/+/75579/comment/3d431b2c_45d4f725 : PS1, Line 22: DDI_ENABLE_HPD > please make sure u have taken care of the GPIO programming as well. I think all GPIOs are configured correctly now - or at least they are matching the mapping document, so everything should be fine. File src/mainboard/google/rex/variants/ovis/overridetree.cb: https://review.coreboot.org/c/coreboot/+/75579/comment/7bbfbfa9_cc24e151 : PS5, Line 184: device ref ipu on end > can we submit a separate CL for this ? I removed it for now. I will prepare appropriate patch when it's needed. -- To view, visit https://review.coreboot.org/c/coreboot/+/75579?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I40f967b12b11c10a1a9329bfb42ebec5a8d7738f Gerrit-Change-Number: 75579 Gerrit-PatchSet: 9 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Sat, 17 Jun 2023 09:06:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: util/docker: Remove set python3 as default
by Elyes Haouas (Code Review) 17 Jun '23

17 Jun '23

Attention is currently required from: Martin L Roth. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75875?usp=email ) Change subject: util/docker: Remove set python3 as default ...................................................................... Patch Set 1: (1 comment) File util/docker/coreboot-sdk/Dockerfile: https://review.coreboot.org/c/coreboot/+/75875/comment/403fab94_f8456e41 : PS1, Line 86: && ln -s /usr/bin/automake /usr/bin/automake-1.15 \ : && ln -s /usr/bin/aclocal /usr/bin/aclocal-1.15 maybe this work around is not needed anymore -- To view, visit https://review.coreboot.org/c/coreboot/+/75875?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibc3b2b047df7e1066624d4dd8aa9664ab1869222 Gerrit-Change-Number: 75875 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Sat, 17 Jun 2023 08:59:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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